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591ad24c6c
1352787 Commits
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591ad24c6c |
Renesas DTS updates for v6.16 (take four)
- Fix White Hawk ARD Audio breakage. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaC2VHgAKCRCKwlD9ZEnx cB5BAQDpVLaDLUXAGlQ4xRuVc+L6wBOEMCAzHXI7/Yc8kuyFiAEAncUTklmubjWl xX9KT9gnqpYNeOyOeY9wo46+8XDKCAE= =btrB -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguTVsACgkQmmx57+YA GNk4tg/9Fp7TqL9F7EydvHE/bRGk2vmn1AkBGuStJGSViYAXwvMNbb9Z3UDvY+6e CvaHHa1WQZyrRojIV0OoH+WI0EggSzFJiT4ze45KJfEABzOLAvYz9Lf2YdhWVrpv xp1ZaUNmiyacLEHsaHju4ZJvnTOe20NxmYnmCL6Ugvm5mrYomKY2C9gWIvDqOLHd xx0M34RhWVrZYypiPj6B8q/IrSpTfQ3mUBfppI9DzSN/gcOINy8l85VA/pJkK9m2 jMsylad/alI9dReMuruC6FrLpIPp1LrkDEm6s03uF+7wmUkdLLFs74jIvCh+sFkl 7+4zBoxSUp0t4QUPQLKS8+K7Gg6u9Mx5jx+OxrpPGDT6Jk5C9XdeqooTI1LZiXMh dJyFchYiBoGLJx+9a+A20/D4Z6e6hKwapxKoKIp+jOcUyEr4Lz81RI99YGc7f05p 3scD8cKzfxXJDK5U0iVX4vEEGALYxBdXLehaM8kTL0jzv+XKhmcZl108aMJm0yRR UNhD912xW2a+NLjUPUkvreekrRflicw/Ku/r5HWkV2FA+7JaAHhntHaJGedn7wti HS8+aWgjaDz20bny9PUh6uVM1Fh5sAvAydVdbDURI7O26jQuTWccOdXc9Yl9IGD0 uSk3Px2REpiCv+SKLm37hYqU9ZrhEzurzsXGMtHIeKULmDhKWeQ= =+u6R -----END PGP SIGNATURE----- Merge tag 'renesas-dts-for-v6.16-tag4' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.16 (take four) - Fix White Hawk ARD Audio breakage. * tag 'renesas-dts-for-v6.16-tag4' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groups Link: https://lore.kernel.org/r/cover.1747817851.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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17e6320b0d |
Renesas DTS updates for v6.16 (take three)
- Silence a DTC warning, - Add an extra compatible value to avoid future issues. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaCc0KAAKCRCKwlD9ZEnx cODAAPsEBAJevvDIsROI/UQhwsUEjB5e39zNAAO1RjflLZ7UrwD/XwLNY+wekDBj 4sncLWNlea1AuWinccy/2IHGDErOtQk= =ZMka -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguTNwACgkQmmx57+YA GNmGGhAAviiM819ipH8+T8A/rBmpiLj9jJ5UBEIEuO1mxwIZ4yasJYph/9O52vKd gL5qQSFBllQCz3gijtQS3iN6vlsbbycgNk+kxheeFjEjBBr+Cni1V0ppK+9WQq9t 0Dpgxm9ZsqL+o7DxIervv1mH8/KvDLERD7Ewiw56vyDaHevLuDfNy4PC2kCpUqdP 0N5N6NTR/k84TdXI5+NJODjdWgT1eSIg8aiMEZvJ9d/aHfjjBIffLam1dgl/636Z g0jkfgWps1JTjleo4EWGRTqLqa9d1vK8NoBN+XkJ0j8EFeL6yfRqhGKqqdNsT1fc BKVy32YWU9MY4ZrnphtufJTi63qGBm6blIVF9k5NMZvVxswjGLGBwkznFE+plChH W+EZe3E5xHjOKGk+qT9zv2BPKaPUrNqBsEKPiEJFJC2MH9dj6xsA5V2JCN6jYu/9 ScUoCX6vOzJuten6dd9l4AUzl+zLPZwJPPi3RoiAubhj2GVkvwvGPHT2qFXRyfT2 njWmtEyNX3NNI12xQlKW97Kck2X2lLj537IPHQigpVkRNe0ghRoHbd8N3t4TL5xl CpdaVJR6r5iofAKA+U7I7XYh37ZqdnexAy98jBd+y8GQepWGYvIF7RKMuaSAwADl 2cjTga3SCtARAhLfr57yHRo8Oty5QZPlRGtLpATJfVDkeWjNTEg= =D5fG -----END PGP SIGNATURE----- Merge tag 'renesas-dts-for-v6.16-tag3' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.16 (take three) - Silence a DTC warning, - Add an extra compatible value to avoid future issues. * tag 'renesas-dts-for-v6.16-tag3' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: riscv: dts: renesas: Add specific RZ/Five cache compatible arm64: dts: renesas: sparrow-hawk: Disable dtc spi_bus_bridge check Link: https://lore.kernel.org/r/cover.1747399860.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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00000994fe |
RISC-V Devicetrees for v6.16
Starfive: All Starfive this time (again), enabling the usb3 port on the framework laptop mainboard, and a few cleanup patches that are syncing things with the dts used by U-Boot. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaCcasQAKCRB4tDGHoIJi 0jKFAP4uxRVZi+8D8s+eBHV7wa6otq7EpUVxE6jssKzMD7IZhAD+JlMp+S5iweQR Ge1d/HIntnQLl5ssqiP6y1DWdioqnA0= =Fn/d -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguTF0ACgkQmmx57+YA GNmW1A//TJdf2AJNRQZmLrYpdfRkwYy+9xKD9rgBsuDbIQs2f61n8otPlPxeB89p WxIJejzmJnyUJm1AbakE7vNRwAkq8zQzvIhOncB8uzoOfZsWYD4/QcDxHACvmeWG +OQIoEADe9Z2T1nLhlCNejFmcbGuTlsM4EXtbwShRxx8djmDXKYPznKNbuDLHmKe l4RVrJET78DY+fvQsRYcEKkg1FDWblARVgwfFrVh1aTI2Wv1p9v4P3iSDG5YyJnj OPYRsogdGnKagPyU1rP3US3ecoFFu9bYNHfDcK9w8uKuR+qcZRkQOm7AuPLL6oaU JqT/Qxg15+mp/F6BN18LDNmTD96b7NUYlt0LbINLW9h3LBxIBe3NkGELVW+yQEQX PpHXDfOq+/sOIyar038Ee5xjmwT9h8cQxwXhAeDp94LBbmtxFUdtdsxz2pWcoHzO nfnET3UH+BRD+fcs+TXyGQMYVX904mPaHWJAAJRf9epOm1lFTcpYaQD02McqB5oE L/vBTvSg1tjpbB955SJ9GYk1MWZm9FFSOwmDrsukpDrJV//PDIul9aNSluv6XUtO yvNlbtl1GIvI1ar30R+4fZEYMilPNXNkFWY164mSakBDIRv7YqvwWRo93XXemBaj yljff1C819U4jhGRkSD0BAydF79gt0bZ8pBfaV/MHVk4spG4AVg= =Wsls -----END PGP SIGNATURE----- Merge tag 'riscv-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V Devicetrees for v6.16 Starfive: All Starfive this time (again), enabling the usb3 port on the framework laptop mainboard, and a few cleanup patches that are syncing things with the dts used by U-Boot. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader riscv: dts: starfive: jh7110-common: add eeprom node to i2c5 riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg riscv: dts: starfive: jh7110-common: use macros for MMC0 pins riscv: dts: starfive: fml13v01: enable USB 3.0 port Link: https://lore.kernel.org/r/20250516-gap-exploring-f8f516ab4e1c@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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ced334a21c |
Microchip ARM64 device tree updates for v6.16
This update includes: - fix CPU node "enable-method" property dependencies -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCaCbPewAKCRCejrg/N2X7 /WqgAP0Q9oqzqXEYIW2IN3q+Ah1E0A+i92fvSU7Jg/p3veYsMgEA+mSszEiEvGlK TivL6ZgcJavF+zviv+lFUyy/nzVzrQM= =544L -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguTEAACgkQmmx57+YA GNnl8A/+Mn6O8lruvi0dJrkHDUwk/opBEAVWagXd5e4JY1PUK/K3sq74gOREusMz oicm1zRPmSKQTQa7V58Tc+74dnR1jS11FV/6KWxHKFxhagbknTXOCBi8jZiDpyIz ELp7FKipLnIdYGsA7lk1XmWdsZ0kac08IMcs2cYBR8MTWqJO58tqbwtH8fh9rs8Q Q9EKYzEvythNL2qDp1Sw1EOFFwjuPp+h4OzlluTXzJBM0k1T+H8jEUqdb8pbKcpu kzmk6AEM4+6gT/QqOphWzSo0ekcF8+4X/nk/HbO7V5Z0WMF8BVUQeh+14S230GnP CgSwwoFAvc94zWAvnWR7tJVSz75J92AbB6tKJq3bFS09LHqPhKgFtUlhae4Ojaws 4BIf+nLQu+xguUTj8ooz+aEfhjFzsPlFAiiDyBZ/W4Ns+03NHWgjVNU46m+MGq/R e6GcIkUlRy4mA3Nkb65jVkxbWNL7BFJDWmJR2CO+QyyhoTsCDMI/l5GlcOW58v+s J7sDb5TNqXquY7XR3+LoldEMYNEGTbzUpfHqTVmmpTn4DXVi7zH2ekAfpjy/6DXf evPUbAx6weuXZ/x1Mk+u1nk6gSyFuDhAuRhYECAYugsIbZUfKXZW4sa9LFe4eqFB WU4tqdPQomB9ssX1X5hVYJm6i0/7jsAGQxQzot8PcFVNL+aA3uU= =R4Ym -----END PGP SIGNATURE----- Merge tag 'microchip-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt Microchip ARM64 device tree updates for v6.16 This update includes: - fix CPU node "enable-method" property dependencies * tag 'microchip-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: arm64: dts: microchip: sparx5: Fix CPU node "enable-method" property dependencies Link: https://lore.kernel.org/r/20250516055607.11248-1-claudiu.beznea@tuxon.dev Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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ea15963b26 |
Microchip AT91 device tree updates for v6.16
This update includes: - more controllers enabled for SAMA7D65 SoC (Ethernet, Flexcoms, SRAM, DRAM, RTC, RTT, GBPR) - cleanups and fixes for Calao boards -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCaCbPFgAKCRCejrg/N2X7 /YTwAP4lzxCNkodc/imWk8AaVMwmj9KjCt+8nlg3qg/CMvunvAEA6RSfBYndGJLA ll99NBekc6/PWboAAlcEj3pQlzhF9g8= =8Rwa -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguS8EACgkQmmx57+YA GNn17g//VkM+La/DS4N9Lm83/g9JulW4lRxn/HkX/M0tvBdOPwtPLdtQqwD5bScc RUO18pze4sO1o0Chg9yaDqADpMFx7zCO+WJBApyUxEaiqYHynkB2FzSB5EoH6O40 71jDM47w4dUY6AGOCWASzlIjKZAFAu4FpxC8J/8yoGMrBc1g5cyDwzaRPdG0D9q7 dPAtzNTlsCGN/Pqk2tlDhHwVLY7Dd5LmDgTGcsbiajjDIbBc3j0QAwY1M5pZEWfK DD7WpkSP51fr9dv9FPE3yl2XE9UhH4xKVzuoytPtdCeOKaSysATIuIwVlzDg2Jzc 1lQ1JGe39sP05KVSMBC3SsMWi5pAA/4XVurZTnXBsJJPL9/tOcuxLQy2179IzmXa cwvdY6XfxHDt/PeWg0VjKpnDOYNme92voIHASiUO3ki6p7yJ/NvXEU92MRMYrUCu OymRSqWBnQT+t1wcvLeEGCDb0kMayk9bmXZVG54eVp3mQMhRiJC6bFMHVpx5amvn P9utH0LGWJPu4PalBCBw5p0lDtYeVSfej7qc0X+lbbY0mwp/S8AmBV9jQ8C56nIZ luaLU57SX9ghN0RkXPePv4dwGugi/lMMbd483G7pmFQcw+Nx1tj/82ODuyvbWFhe ++HCukg8OhNS4EpDHI58cM5HUv6hCLvmMOry3EJfflD/nrcIAiU= =BhDQ -----END PGP SIGNATURE----- Merge tag 'at91-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt Microchip AT91 device tree updates for v6.16 This update includes: - more controllers enabled for SAMA7D65 SoC (Ethernet, Flexcoms, SRAM, DRAM, RTC, RTT, GBPR) - cleanups and fixes for Calao boards * tag 'at91-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: microchip: sama7g54_curiosity: Add fixed-partitions for spi-nor flash ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support ARM: dts: microchip: sama7d65_curiosity: add EEPROM ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity ARM: dts: microchip: sama7d65: Enable GMAC interface ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC ARM: dts: at91: at91sam9263: fix NAND chip selects ARM: dts: at91: usb_a9g20: move wrong RTC node ARM: dts: at91: calao_usb: simplify chosen node ARM: dts: at91: usb_a9260: use 'stdout-path' ARM: dts: at91: calao_usb: simplify memory node ARM: dts: at91: usb_a9263: fix GPIO for Dataflash chip select ARM: dts: at91: usb_a9g20: add SPI EEPROM Link: https://lore.kernel.org/r/20250516055330.10852-1-claudiu.beznea@tuxon.dev Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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0feaf3c056 |
Allwinner device tree changes for 6.16
Introduce Allwinner A523 / A527 / T527 SoC family w/ three new devices: - Radxa Cubie A5E - X96Q-Pro+ - Avaota-A1 Also enable EMAC0 ethernet MAC on A523 family for Cubie A5E & Avaota-A1. Note: the SoC has two different ethernet controllers. Changes to existing SoCs: - Enable GPU on H616 with all boards enabled - Set maximum MMC frequency for the A100 Changes to existing boards: - Add WiFi/BT header on PINE64 A64 boards - Add hp-det-gpios for Anbernic RG35XX - Add support for PHY LEDs on Bananapi (the original one) Add new devices for existing SoCs: - YuzukiHD Chameleon based on H6 - Liontron H-A133L based on A133 (compatible with A100) Tree wide cleanups: - Use preferred node names for cooling maps - Align wifi node name with bindings - Drop spurious 'clock-latency-ns' properties for H5 & H6 -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmgmm8kOHHdlbnNAY3Np ZS5vcmcACgkQOJpUIZwPJDCeKw//dU9nOV3IL027SSzBc/1acvGD7t+o3O9neNlt 4W02QAwTeANCCUM4OYIUCmNn71gFlcEOfVmLlJXAEFJCz6kPP8RSh+IL1LdSQydf NJMFnnvpVScwUjDSOPAowuqR91OQIHm7nWJvVzo022c8zsQE1iNv7Aeg66Swf0ai HRuwLveOjVRrVLe4mwwa5/LHTNSZLk1e5si441C86PHHf5+s3x4JnJzTMvYosZbM 3ekjGc6f9evx+7k7bAfQ9UrJ6avtoq5ars+Js+RFjMx0bW6dCLa1EvLa3V2JcEcR tSI7dwiqLyD2q9tulxVG5kFLTNPdXK+BI9tO96xCbkJ/j0V9ubNToq23ltyuzOVJ ha8n8e1kb1tOg7HR8B5eV1xN+ZSZL6NvvZoiyPPklML0hmT95Lwi0uVhfnNT0EC9 VjiBBBeP26U0y9005nAzblLUTeKv4pFaRHD7j+MVtDk6IsNwMxGo27KPrkpf6FMM UgbXSiurdQIXToUuQL+DuGFZZwnu1MN008ZUV/hqEfzWpeH/GQxN+YMbEuuvaKJk 3r0nDM9Wbnjdvs/qhrDZRwKccQOBLMwkZN8JKWyKAoe1mVoFZa9VyyKWuT5qXOee 5E5rwxwFne8BpkDyfmCyHXKVjeGGiVky11roO9/9IchjgJe9j+4hLaCvr8mhTvl2 p4tiVxQ= =4JrL -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguSzAACgkQmmx57+YA GNnCIA//R7syl7Mu+cJ88VxKhrInFf5F5vngrtrh+o9w5Jk50BY87WX0qT16Zgt6 /jHLLYkjXiv0FA0PJQmeZQKxhYQnGqRqzAgBG41Db6ulbot8cHDNCwbc2J+HPvXe DibTOayckm23HJQyPXgTBhFC8GnjCOxzpt7mSP7+NlL2QcHGuNABP/Z0R8ra4Evr rw7GYpmCCuc0O7LdhnGzUpy+QT3SRedq0MPhj59mFn4VYQUCFRnHiYfPUjMjPw4m dfFAPE6PaZlgIfPLH0s5t8hwZCbOtLkuMUriZPw9iYLN+KXLHRrbprNlPqVH+LC3 VuCUXsokwjr/yeWJ9pzmuRi6kCg2MDooY1i0T2GHfoIr2Sb3cOc7lrjyczMp4ovn snk370g2qZ9jYOgCOUlNSpI76/OF04/MTOm/IF8yAuWtr2Qkqa7sqwf0dgP1gcQc FuDgRw/uh2dG51tPV8xYfFvNG0+rSJh7y7M2m76cNG6A/OmI1WJOoRT/WNqvqTxN y7iZY7aKnML8pDQgoRFeferR5oUfEx4yAIFTA2130U+KtVDiq8/+3pv5DCyGx9/6 dXs0T2LndrDV9DRaSQZ45spHP8sMSFbWbBX3qvQEj9Q8j2QdTSNu4hSi4/P3jQ0U W5azgGfeL2dH1m+RhJaqpZQTwZH1lVUfIcj2Dpdbk768xkD+UKM= =/9N8 -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt Allwinner device tree changes for 6.16 Introduce Allwinner A523 / A527 / T527 SoC family w/ three new devices: - Radxa Cubie A5E - X96Q-Pro+ - Avaota-A1 Also enable EMAC0 ethernet MAC on A523 family for Cubie A5E & Avaota-A1. Note: the SoC has two different ethernet controllers. Changes to existing SoCs: - Enable GPU on H616 with all boards enabled - Set maximum MMC frequency for the A100 Changes to existing boards: - Add WiFi/BT header on PINE64 A64 boards - Add hp-det-gpios for Anbernic RG35XX - Add support for PHY LEDs on Bananapi (the original one) Add new devices for existing SoCs: - YuzukiHD Chameleon based on H6 - Liontron H-A133L based on A133 (compatible with A100) Tree wide cleanups: - Use preferred node names for cooling maps - Align wifi node name with bindings - Drop spurious 'clock-latency-ns' properties for H5 & H6 * tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (27 commits) arm64: dts: allwinner: a100: add Liontron H-A133L board support dt-bindings: arm: sunxi: Add Liontron H-A133L board name dt-bindings: vendor-prefixes: Add Liontron name ARM: dts: bananapi: add support for PHY LEDs arm64: dts: allwinner: a100: set maximum MMC frequency arm64: dts: allwinner: t527: add EMAC0 to Avaota-A1 board arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board arm64: dts: allwinner: a523: Add EMAC0 ethernet MAC dt-bindings: sram: sunxi-sram: Add A523 compatible arm64: dts: allwinner: a64: Add WiFi/BT header on SOPINE Baseboard arm64: dts: allwinner: a64: Add WiFi/BT header on PINE A64 arm64: dts: allwinner: correct the model name for Radxa Cubie A5E ARM: dts: allwinner: Align wifi node name with bindings arm64: dts: allwinner: Align wifi node name with bindings arm64: dts: allwinner: h616: enable Mali GPU for all boards arm64: dts: allwinner: h616: Add Mali GPU node arm64: dts: allwinner: h700: Add hp-det-gpios for Anbernic RG35XX arm64: dts: allwinner: h5/h6: Drop spurious 'clock-latency-ns' properties arm/arm64: dts: allwinner: Use preferred node names for cooling maps arm64: dts: allwinner: h616: add YuzukiHD Chameleon support ... Link: https://lore.kernel.org/r/aCaeZJ2t4S_xhgjp@wens.tw Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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38181494e4 |
STM32 DT for v6.16, round 1
Highlights:
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- MCU:
- Add low power timer on STM32F746
- Add STM32H747 High end MCU support. It embeds:
- dual-core (Cortex-M7 + Cortex-M4)
- up to 2 Mbytes flash
- 1 Mbyte of internal RAM
- Add STM32H747i-disco board support. Detailed information can be
found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
- MPU:
- STM32MP13:
- Add VREFINT calibration support based on ADC.
- STMP32MP15:
- Add new Ultratronik Fly board support:
- based on STM32MP157C SoC
- 1GB of DDR3
- Several connections are available on this boards:
2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
SDcard, RJ45, ...
- STM32MP25:
- Add OCTOSPI support on STM32MP25 SoCs
- Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
- Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
LPTIM3 as low power broadcast timer on STM32MP257F-EV1.
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Merge tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.16, round 1
Highlights:
----------
- MCU:
- Add low power timer on STM32F746
- Add STM32H747 High end MCU support. It embeds:
- dual-core (Cortex-M7 + Cortex-M4)
- up to 2 Mbytes flash
- 1 Mbyte of internal RAM
- Add STM32H747i-disco board support. Detailed information can be
found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
- MPU:
- STM32MP13:
- Add VREFINT calibration support based on ADC.
- STMP32MP15:
- Add new Ultratronik Fly board support:
- based on STM32MP157C SoC
- 1GB of DDR3
- Several connections are available on this boards:
2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
SDcard, RJ45, ...
- STM32MP25:
- Add OCTOSPI support on STM32MP25 SoCs
- Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
- Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
LPTIM3 as low power broadcast timer on STM32MP257F-EV1.
* tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (22 commits)
ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board
MAINTAINERS: Add entry for ULTRATRONIK BOARD SUPPORT
dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding
dt-bindings: vendor-prefixes: Add Ultratronik
arm64: dts: st: use lptimer3 as tick broadcast source on stm32mp257f-ev1
arm64: dts: st: add low-power timer nodes on stm32mp251
arm64: defconfig: enable STM32 LP timer clockevent driver
arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board
arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi
arm64: dts: st: Add OMM node on stm32mp251
ARM: dts: stm32: support STM32h747i-disco board
ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
ARM: dts: stm32: add pin map for UART8 controller on stm32h743
ARM: dts: stm32: add uart8 node for stm32h743 MCU
dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
ARM: stm32: add a new SoC - STM32H747
dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
ARM: dts: st: stm32: Align wifi node name with bindings
ARM: dts: stm32: add low power timer on STM32F746
...
Link: https://lore.kernel.org/r/2f101efb-6d58-48d8-983a-57e30a34827c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
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ba32d96e90 |
RISC-V SpacemiT DT changes for 6.16
- Add clock driver, fix for pinctrl/uart - Add gpio support, enable LED heartbeat -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQKTBAABCgB9FiEEtbq4ycMbcRVnAiPcMarqR1lNu+0FAmgkEphfFIAAAAAALgAo aXNzdWVyLWZwckBub3RhdGlvbnMub3BlbnBncC5maWZ0aGhvcnNlbWFuLm5ldEI1 QkFCOEM5QzMxQjcxMTU2NzAyMjNEQzMxQUFFQTQ3NTk0REJCRUQACgkQMarqR1lN u+2A0Q//fwnp36zuiqqYoZ7N9iFmLYjJlM9UEU2FSZ0/RWxL/1Y7ZBNAUajf7e7p N124gpRM5BJMyA+vHEJH1t8WblKoxwt9fjbn9QlcDYnoq5NuHjLkxwfySe+2V5tW kZoPrSwgZ3ODKn/HL+/ghT4ckNV6V+al6yh9x3Cv70ZYZjSOzRwshIf7JJBjzp9X y89QfuqRVT1YMdzCnWTMb7OVFM1fbPP88jjUR43VRieW9ER/8oaaNQNxg9r3wDFZ V6yOIhI5i43jDZcCKZLJCH+WjcIjDj8zQTbIvZOdZuFOR8FPPK2f+zvJ77C2eT6f fG6iB/yAWMFGNPQ064wWev43Ppq7KDkt2/qzTecBJRg6/+x6ILQy9TElkazkJDb2 EYIiucWoPqNMjSL3BRohJ+d6fSaFHaujhP5MGBYPVA6drAIYlwFPhH2HfebECUt9 4Ip9yzdTJAlXhvzlfXL6KBSCft2LinKVHEFvaNJKaZ5V6E93GP+lNv4rkgRoF+Hz uZsMpE2ex7uAskhFT4DQF7VAKaUvLSBUDVM8La1wy3jJFEl+w7YsSxYRTk3bRYt1 bSUdxCDDR+sD26ceMpiILdEy9cDE91B+ypUF1pu3C4P0vYEDi5pdIiuZmaYuAuXm SSC7ymRy2Ao0TGOtycRInTRtGzFnk9DZKLk+HU8rDJOq3WGpjFg= =yMSa -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguShMACgkQmmx57+YA GNkNvQ/9EIjYie44k9ZyGxjQHuht6IayZHxyQvNVEp/Ef9l/S3M1PUMexgeHLG+0 8z8eITaP+9zz0wYA0mdoFdh8kdvHkGDVh8cKFrAQmXb1DMk/scQVfOShwh7F4wb4 bTohJIq4pVh/Y/b7Yz9kuCKZFmqx5Wpfg+s5iw9vR4SZ7kRCYnhdbBBXo9dOAFN/ KoGPQf6Pw3pKGMrxRifYyvrhJYuDZER3U+oERA+Rr2pB5tRf1TRHSvHNY//gBmVh bwh09t49pqkMWY0iJoJe7syIRjSLwzZF5HIPZYW8f33r/HKYYrS6quTuq9X3hnGI WYwBUftxIW9EU0vFQ/U+vZZRbArYfuydvpuh1iaHSo3ZBeu9cHQKH4HFQg/oUoaG rgvRKBd0Zb+bChvkpTj6hPrFht9m1IYhoDnazD9hhKXXHVSZsENm/3jhpUmQdOfW vpzW6AWUKCM7+ScFqMyvzTvCnuBdZNGzS1L9SWMwv8k6vs5mhTuO1Zqzli2WDEae D1MNzonF5NR91K4ayYMOz+HOZzQ6cOzJHUADd7Zk/zh0BClS0h6M88Dqql0C68ww 3Oeao9Z1e9BhO7Ubzh+/YV3fRff+/U1UZnRpFQnnqzbVw8YmAbivltJj86R7ftVp HnW5S9NLUz+UonGAwRRWck78I4/pRG2EbyQvFofta0U7ILePDYM= =09rm -----END PGP SIGNATURE----- Merge tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux into soc/dt RISC-V SpacemiT DT changes for 6.16 - Add clock driver, fix for pinctrl/uart - Add gpio support, enable LED heartbeat * tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux: riscv: dts: spacemit: add gpio LED for system heartbeat riscv: dts: spacemit: add gpio support for K1 SoC riscv: dts: spacemit: Acquire clocks for UART riscv: dts: spacemit: Acquire clocks for pinctrl riscv: dts: spacemit: Add clock tree for SpacemiT K1 dt-bindings: clock: spacemit: Add spacemit,k1-pll dt-bindings: soc: spacemit: Add spacemit,k1-syscon Link: https://lore.kernel.org/r/20250514044841-GYA524674@gentoo Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
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|
759dd3fea1 |
Qualcomm Arm32 DeviceTree updates for v6.16
Introduce support for the AP8064-based LG Nexus 4. MSM8226 is extended with modem-related features, the LTE-capable variant MSM8926 is introduced, and modem support is enabled on Samsung Galaxy Tab 4. Display-related clocks and power-domains are defined for the simple framebuffer of Motorola Moto G, to allow booting without clk_ignore_unused and pd_ignore_unused. On MSM8960 SDCC BAM and thermal sensor (tsens) is introduced. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmgju+QVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FH7oQAMuLGyWTReLqQ3FCdnlI/kXWH2qF Fg4VJb2zM0eYpaBPXS8fkD0BlxXPHy/CD9A/yKWpHMkD706J4PlsCfMLzj6pzbJJ tzP9fA/v2deGl/G/OKsM+Yp7a6Ocl2VzXU2eOakWMBlWQUcTv020jz+4wNwKDwx3 85BESrpr6yCG55dOddZI1etKb2oVXKuvZAvYSELNb4l2PkIN+stJ0HoMykTWn9XD WD7QvD1LONi8eldt65O2Dz7cwN5eHybD4QPpYvW41OudP6reqTyTlE/NQSdP4eg5 RyKXevjYemZTGX5YsNFR2p/y3zhLU95LH8+MSIm0d7DlpLMPNz88hedCEM+Mr+fp egHAfH+smWNki5xlaWUZwbRCIKZVz6SR5utnzudcC9obJMOrtajvBjaQ1WbsrzS3 l4nka/Csn9KY/E0X6wKHXGzJlSOe87XlnF7HUlsfbzs1AQpNADgCtwFM5eJZLhhb TcxbjKh1ZOrznuPxCRA0na0zuH/kEgdchs4F4dsJ3/I42tDAXFYBmjw97R07J/Xx fJEtqhfvxTQSv5RR6cfbbayXPEJpvJ6uygmJCOx+ZzhRWroOqB7dlWp1/kForhAn FZYdu/4rZn9IWOJJEc0QcRLKyeekFca4pXMZfLk3nN6iGu7IwlWtzFr0wbgkVDBk m18POm/F0EA1BeG8 =kQf8 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguSekACgkQmmx57+YA GNkaQxAAs+kfGjBKytJDybAG4Eh6EJ0UrMAMyPLqNx/DaXxM+QZ+ZLzFvMdNMz8i srLipwPQKyqN2EvYB0vWzx/3uAabVG8ZhIFYFFVVIpsy9jZkWF27Yw7ybAQg935P U+X5M26AdZv/Dkf1LYRcDZnSObtRL/Q8Hl+MxWjnt0GQDAtOX1DA3oksNvmdS7pQ pJEM0KX/PShZibpj0iGugGMMTBwvwHlj2hLpNrBCjISuHXwhbufXs6bEyoXcV5SL FuS8aK3eOvr2PntZsrHArJxRZMXKPBA17F2NsifCnucmt0Lqmz8V92lObGiORkHr kTvrJmIc1CSwSZrFyhq1C+azs2rx++BvCl7mFElK1tn9czod7LT7wUasDRu185wY qGGtg1dvfotxAI1ctt3ogtKu4pBONwbnb5cNjxPTHy0pNPIOBiCWy4NGxM3wJ7wJ zKukpczNwk7H1NFAd+0sx0XnGebGhz3Qs9jV3VD7sjdYdMZlIBYce13Rl9j70nWV OKcMjW0NYC+SNa/1vNE4ZpUqKjIiOvVXi9MPKnR2DPKKXXO1B8lT4pMcgr06wysL 60fqIcqghsoeQEAwc20geimkgJkxusbpAXNqX9eY/kZOy7s2eVdzoXPLeCt0FEWV x2jNix94bPZLujFKb9jhpYZl4dz6/6RK/yYZwm+x4klJKxO+Z/c= =2aVB -----END PGP SIGNATURE----- Merge tag 'qcom-arm32-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm Arm32 DeviceTree updates for v6.16 Introduce support for the AP8064-based LG Nexus 4. MSM8226 is extended with modem-related features, the LTE-capable variant MSM8926 is introduced, and modem support is enabled on Samsung Galaxy Tab 4. Display-related clocks and power-domains are defined for the simple framebuffer of Motorola Moto G, to allow booting without clk_ignore_unused and pd_ignore_unused. On MSM8960 SDCC BAM and thermal sensor (tsens) is introduced. * tag 'qcom-arm32-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: apq8064: move replicator out of soc node ARM: dts: qcom: apq8064: use new compatible for SPS SIC device ARM: dts: qcom: apq8064: use new compatible for SFPB device ARM: dts: qcom: apq8064 merge hw splinlock into corresponding syscon device ARM: dts: qcom: apq8064: add missing clocks to the timer node ARM: dts: qcom: apq8064-lg-nexus4-mako: Enable WiFi ARM: dts: qcom: msm8226-motorola-falcon: specify vddio_disp output voltage ARM: dts: qcom: msm8226-motorola-falcon: limit TPS65132 to 5.4V ARM: dts: qcom: msm8226-motorola-falcon: add I2C clock frequencies ARM: dts: qcom: msm8226-motorola-falcon: add clocks, power-domain to simpleFB ARM: dts: qcom: ipq4019: Drop redundant CPU "clock-latency" ARM: dts: qcom: sdx55/sdx65: Fix CPU power-domain-names ARM: dts: qcom: msm8974: Use the header with DSI phy clock IDs ARM: dts: qcom: msm8226: Use the header with DSI phy clock IDs Link: https://lore.kernel.org/r/20250513214111.43401-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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2b183108bc |
VT8500 DTS ARM changes for v6.16
1. New board: VIA APC Rock/Paper. 2. Add SCC ID register/socinfo node. 3. List all timer interrupts. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmgjIKwQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1yZWD/4hbdPRMYcnuokiDVpBNJqdY82OJCYcnMaC MtXyEgshHC97BYMPF6sQox09fg4IpJlAcRsEXsjh3vSQl5LvX7tqQwrckiOJvhXP LUH7XVEtL5fKgYf3THaFCDCjcwXxjcsiEyT6KD5ET37Z0czqMAl28ovRAV0kNuXM 3x9TWkHKI/qlsYIRpRCl3cHQkqjFEXgfi6HNoIroIvR1wRBXxjJDiMnUEBHgEl7E xAgvNglD/fAubcbYjr+Kx0XMhMryBl4PoSgeP4OnTK05gIW81l7RrxuKMm+a2pb3 aX+xtqs2sXBPykzp5lyosa0Nje9/5x31supSjF7I9pEA2OA9UPJjchkyRkqs8Inj tO8s7JrIZklOvB4Lp5Sc4sqylgH2HeWxr5yu4EH9ga9C+2KpdSgSktVF69SvmHII Zk+akeIyxd3hj/zGrqBwwrEP6udg/7PVlSqVKgwiJ71Zx8Xs6rrdtw0vZ5j49Bq4 elTg/pvz1uVkhQ0nxWFYhZSFNDB/sx52TRV8Y0W/vk/QaHAZrBcQte4T7XSWlGAb KmgbIDJ9Osdl7iJN5gUxF+u8IwpA/u4vfORl3sgIs3vVez3wbthFA7fggwas+a8u boS6ooca3sBVzp/6qOs3IRZ+D68r6hQhFCSU4/rPw1o2NHveGCyZbZcC2Ahx7+Gi iFztjGc71w== =nARy -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguSZoACgkQmmx57+YA GNngDBAAjDXbkuUaMbteNtBQVDPnhkrmQ/SZngb059p9RCzU94IHOgn2I8y3iIcH 13XWOqxMRFXOdMlPbEr3krN0KOwWtRpPALE4S+/MqAoa5xlV3ul73R64oEBC4qy5 5yPHrV6IOYNDn2o+aYUHanZuWVPuBdwIIzphjTudEf1Fpi1joL+JYaMLNwYIPLAT H97ORt/fJiYXbGfO8YpZEC2BTv2F0ym5aCJAkWGD1V3zj5hDw+kf8qQvZHEAtQGe Jbvgo9XdDUWrd7SJnn9uDSOA93bInCeEFTuPJlW4TEPGNSTF3YA1ZAnpcFYrjmux T/LY3HAT3gwUY+eJlttOmpuf/YQ2dUvU2+LJCanunlsAxiwqRLJij0d5IyAjdKzq d6XXtLTs5Nf4dh1p/E2BhRSNrnriP1ky5m1mDYvAHfJeEDFczc7Rpymppfo9aOlw ymV1U2LE2MxraLr9ty1l9EMJfBnPPTUkd1FomG/1ZfGi7Bt5GI71wsO+TRCRJN2M rhVSa3/cMealxvTTYZiMqJjo633HScCeuHKZkInx6xiBXB89x50DfkFw3GlYvSX5 pN4xZ0QCfMTG6bbcxlQVKqAyEWIxB+JdsFU9S/Yh1Qn+M8hjvhZXDZXlqnip8gel nxhILM1cAic/aaUnGMO3rSDRwMU+XlHoe1xuhDfkMCwa8hZKY5Y= =bDf0 -----END PGP SIGNATURE----- Merge tag 'dt-vt8500-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt VT8500 DTS ARM changes for v6.16 1. New board: VIA APC Rock/Paper. 2. Add SCC ID register/socinfo node. 3. List all timer interrupts. * tag 'dt-vt8500-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: ARM: dts: vt8500: list all four timer interrupts ARM: dts: vt8500: add DT nodes for the system config ID register ARM: dts: vt8500: Add VIA APC Rock/Paper board dt-bindings: arm: vt8500: Add VIA APC Rock/Paper boards Link: https://lore.kernel.org/r/20250513104216.25803-5-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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12a75f2d9f |
Qualcomm Arm64 DeviceTree updates for v6.16
The Snapdragon X Plus platform and related reference device is introduced. Devicetree for the Xiaomi Redmi Note 8 is added. Tsens and thermal zones are added for IPQ5332 and IPQ5424. IPQ6018 gains 1.2GHz and 1.5GHz CPU frequencies. The IPQ5424 gains MMC, LEDs and buttons, while the IPQ9574 gains NSS clock controller and SPI NAND support. IPQ6018 SMEM is transitioned to be described directly in the reserved-memory node. Display and GPU are enabled in the QCM6490-based Fairphone FP5. On QCS6490 Rb3Gen2 ADC channels for thermal profiling are added and Bluetooth is enabled. The USB Type-C orientation GPIO is added on the QCS6490 Rb3Gen2 and the vision mezzanine is described. The Fairphone FP5 gains touchscreen and USB Type-C display support, and the QCM6490 IDP board gains a required listed of protected clocks. The camera subsystem in SC7280 is described and UFS is transitioned to use operating points. On MSM8916, MSM8919 and MSM8939, and devices on these platforms, the UART pinctrl state is cleaned up. The MSM8953 platform gains another UART and interconnects. On SA8775P CTCU and ETR nodes are added, and the CPUfreq throttling interrupts are added. Samsung Galaxy S9 SM-G9600 gains a description of the MAX77705 used for charging, fuel gauge, haptic, and LED, as well as the PMIC used for display and touchscreen, which then is used to enable the touchscreen. The LPG/PWM node is added to PM8937 and Xiaomi Redmi 5A gains display backlight control. Display and GPU are enabled for the Nothing Phone (1). QCS615 platform gains command DB definition. The QCS8300 platform gains description of more QUP instances, CPUfreq, PCIe SMMU and the SPMI controller. On SAR2130P PCIe EP device nodes are added. On SDM630 missing resets are added for SDCC. Then on Fairphone FP3 modem is enabled, and firmware-path are defined on ADSP and WCNSS. The SDM845 RB3/DragonBoard845c and the QRB5165 RB5 has the sensors DSP enabled, and the vision mezzanine on both gets their CMA configuration cleaned up. Xiaomi Pocophone F1 gains touchscreen support. On the SM7325 Nothing Phone (1), display, GPU, and camera EEPROMs are described. On SM8450 the PCIe endpoint controller is described. For SM8550 OPP tables are described for PCIe and QUP. SM8750 gains RPMh sleep stats. SM8650 gians OSM L3 scaling and variety of OPP tables and missing interconnect definitions. The thermal trip points for CPU cores and GPU are raised in reliance on hardware throttling. SM8650 is also transitioned to per-CPU interrupt partitions, in order to properly describe the PMU interrupts. Missing Coresight ETE instances are added. On SM8750 the cluster idle states are corrected, then audio and compute DSPs are introduced, together with the crypto and rng blocks. Modem support is added and enabled on MTP and QRD devices. On SC8280XP overlays are introduced for those running Linux at EL2 on these devices. A few more temp-alarm instances are added for the PMICs. On the X Elite platform GPU cooling and watchdog is introduced, together with a number of smaller fixes. Dell XPS13 gains support for USB Type-C display, the QCP gains WiFi/BT power sequence, and a few devices learns about HBR3. The RTC support is enabled and regulators that are feeding resources that should be always on is marked as such on a variety of boards. The Lenovo Thinkpad T14s DeviceTree is split in two, in order to describe the LCD and OLED variants. Missing properties for the crypto BAM is introduced on a variety of platforms, taking care of a long standing error message in the kernel log during boot. DSI phy clock ids are transitioned to use identifiers from the PHY header file and VBIF region size is corrected, across a large number of platforms. A couple of DWC3 quirks are added across a lot of platforms. The arm32-for-6.15 pull request was accidentally merged into the arm64-for-6.16 branch and this wasn't discovered until a significant number of commits would have to be rebased. As such this is kept here as well. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmghN+AVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FYTQP/1ZyOvGFKBIxRrlvag4Z8hsU2YxM n97+i6AElnCE8YAzCC/Ig/zAxyOLuTlPcJeCSnZlpQr8I0uEKktkr1M76GdlOOTM 49XcsT/rnBxh0bRtJssl/Tbl85hQJAfbZ8rp1x0lCn9e2Ef4A2KlbAWmNbA9Rgai QInLKF1owcpwDhMceWFfakMr7qG5CXRgwA6CWmszn/kpdfI7hhoNUGUidsY3mg// FfkOInsnh3yetocpp3GmlHs7Mi7puYq0XaKaIAoruyL+MkGAk1+9DY/OFbbhMEmA dr+1erRM7odJdbl8DCkriZ6RFVSTQ9NhDpmlnoFB02ugQlfy3n+3UK7iOwgQnnln 97B3hcipPIe9L51yV3Ud5lQYDMMvAU9arWuZgOTktLRpFw1ASWnL7P/o5BLYzdGs NZ9Ebv8LKkuf1/g8SFcz96o7oW/qlKe2vV3jkcWSiFr7PyvsRqT/dFONUw2FppXN UGvtwQ7jpnZJ5RqTAK9IjPpjdAK9QLrzcwJAH/7mqs5Wn3WGtEDOmPIcPzmFEvKr 3CwkxT31rPxdOpd+ZDnnTZzXcYMrQUQ5oahSKMZObzH2c6DtU0PjcCxNLShTCn1C vAKUF9JZX71T+rtEmeThMxSr8yQ0HrkZH0Voq3/03lI1ap7oxypb9Fo+qoGxMh5l 7pTic5JsKO+t+kSU =JzSX -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguSLUACgkQmmx57+YA GNnMAQ/+PT+s+BWkRtKVKLL+eRe7OVfPgRzo7BW678VF598iB2Ow9rY+stFbb0R0 ZfH3an33H1XjoQX7pvWqWCH+s4d6lF+cD//6yjyYXbYCUcNrGZr22vFuHRICzgK0 mo4w+0htSkcc2IuAwVDG7DmApXo88bUwErqGAj68GxkJFVB0tYjw3LjruxCb9+tI LbOS6tPXw73XBN+/9h8wFwUh9C5Wu79SZ+DPmrnlfyw0DBTKfeALz8ts7LDe6H80 LxmcJgrBZrhcUxJlYWsJqYduTc5Si8mWdK7mEBThjNS6ufm86VyEzXoPpfilf8om dTlsV8sYS5mDuUJLTj5nHBwf5Ol59mbHrxi5Tu3o8+QgvkbP+gTmgRx9975xeZGS iTeHXOTzsoTeiccE0kYjbVGSongSvAuCuQcERKNSSuNFfF+i+NLgVBn9sXRVqjIt FFOSN0p4uQ6gjn9qVkaqhZacsvl+nx1uqAfET1ZKQzHpV2fyJtlQ0WhuLhih6xwk 5Hyc1jl8jCXJ3ImmwybLmwje1sVk1ZtEwbpdq6SUepKjmthxucJbiOD5qMP7l0Vz 45eNT6R0k+GFsQ7wK8adg6rPi004e5R95FDxMuFt8EY0yMUnSdE01Pl4Bnyqq85V etgyoeth/R/Tjlz5fnt1ET3hQbWfQAWBYpEkgSuT71tSUvBuL2Y= =W507 -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm Arm64 DeviceTree updates for v6.16 The Snapdragon X Plus platform and related reference device is introduced. Devicetree for the Xiaomi Redmi Note 8 is added. Tsens and thermal zones are added for IPQ5332 and IPQ5424. IPQ6018 gains 1.2GHz and 1.5GHz CPU frequencies. The IPQ5424 gains MMC, LEDs and buttons, while the IPQ9574 gains NSS clock controller and SPI NAND support. IPQ6018 SMEM is transitioned to be described directly in the reserved-memory node. Display and GPU are enabled in the QCM6490-based Fairphone FP5. On QCS6490 Rb3Gen2 ADC channels for thermal profiling are added and Bluetooth is enabled. The USB Type-C orientation GPIO is added on the QCS6490 Rb3Gen2 and the vision mezzanine is described. The Fairphone FP5 gains touchscreen and USB Type-C display support, and the QCM6490 IDP board gains a required listed of protected clocks. The camera subsystem in SC7280 is described and UFS is transitioned to use operating points. On MSM8916, MSM8919 and MSM8939, and devices on these platforms, the UART pinctrl state is cleaned up. The MSM8953 platform gains another UART and interconnects. On SA8775P CTCU and ETR nodes are added, and the CPUfreq throttling interrupts are added. Samsung Galaxy S9 SM-G9600 gains a description of the MAX77705 used for charging, fuel gauge, haptic, and LED, as well as the PMIC used for display and touchscreen, which then is used to enable the touchscreen. The LPG/PWM node is added to PM8937 and Xiaomi Redmi 5A gains display backlight control. Display and GPU are enabled for the Nothing Phone (1). QCS615 platform gains command DB definition. The QCS8300 platform gains description of more QUP instances, CPUfreq, PCIe SMMU and the SPMI controller. On SAR2130P PCIe EP device nodes are added. On SDM630 missing resets are added for SDCC. Then on Fairphone FP3 modem is enabled, and firmware-path are defined on ADSP and WCNSS. The SDM845 RB3/DragonBoard845c and the QRB5165 RB5 has the sensors DSP enabled, and the vision mezzanine on both gets their CMA configuration cleaned up. Xiaomi Pocophone F1 gains touchscreen support. On the SM7325 Nothing Phone (1), display, GPU, and camera EEPROMs are described. On SM8450 the PCIe endpoint controller is described. For SM8550 OPP tables are described for PCIe and QUP. SM8750 gains RPMh sleep stats. SM8650 gians OSM L3 scaling and variety of OPP tables and missing interconnect definitions. The thermal trip points for CPU cores and GPU are raised in reliance on hardware throttling. SM8650 is also transitioned to per-CPU interrupt partitions, in order to properly describe the PMU interrupts. Missing Coresight ETE instances are added. On SM8750 the cluster idle states are corrected, then audio and compute DSPs are introduced, together with the crypto and rng blocks. Modem support is added and enabled on MTP and QRD devices. On SC8280XP overlays are introduced for those running Linux at EL2 on these devices. A few more temp-alarm instances are added for the PMICs. On the X Elite platform GPU cooling and watchdog is introduced, together with a number of smaller fixes. Dell XPS13 gains support for USB Type-C display, the QCP gains WiFi/BT power sequence, and a few devices learns about HBR3. The RTC support is enabled and regulators that are feeding resources that should be always on is marked as such on a variety of boards. The Lenovo Thinkpad T14s DeviceTree is split in two, in order to describe the LCD and OLED variants. Missing properties for the crypto BAM is introduced on a variety of platforms, taking care of a long standing error message in the kernel log during boot. DSI phy clock ids are transitioned to use identifiers from the PHY header file and VBIF region size is corrected, across a large number of platforms. A couple of DWC3 quirks are added across a lot of platforms. The arm32-for-6.15 pull request was accidentally merged into the arm64-for-6.16 branch and this wasn't discovered until a significant number of commits would have to be rebased. As such this is kept here as well. * tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (308 commits) arm64: dts: qcom: sdm845-xiaomi-beryllium-ebbg: introduce touchscreen support arm64: dts: qcom: sdm845-xiaomi-beryllium-tianma: introduce touchscreen support arm64: dts: qcom: sdm845-xiaomi-beryllium-common: add touchscreen related nodes arm64: dts: qcom: qcs8300: add the pcie smmu node arm64: dts: qcom: x1e80100-*: Drop useless DP3 compatible override arm64: dts: qcom: msm8953: Add interconnects arm64: dts: qcom: msm8953: Add uart_5 arm64: dts: qcom: sm8350: Use q6asm defines for reg arm64: dts: qcom: sm7325-nothing-spacewar: Use q6asm defines for reg arm64: dts: qcom: sdm850*: Use q6asm defines for reg arm64: dts: qcom: sdm845*: Use q6asm defines for reg arm64: dts: qcom: sc7280: Use q6asm defines for reg arm64: dts: qcom: sc7180-acer-aspire1: Use q6asm defines for reg arm64: dts: qcom: qrb5165-rb5: Use q6asm defines for reg arm64: dts: qcom: msm8996*: Use q6asm defines for reg arm64: dts: qcom: msm8953: Use q6asm defines for reg arm64: dts: qcom: msm8916-modem-qdsp6: Use q6asm defines for reg arm64: dts: qcom: apq8096-db820c: Use q6asm defines for reg arm64: dts: qcom: qcm6490-fairphone-fp5: Hook up DisplayPort over USB-C arm64: dts: qcom: qcm6490-fairphone-fp5: Add OCP96011 audio switch ... Link: https://lore.kernel.org/r/20250511235241.15192-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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c307e9c1a4 |
Nuvoton ARM devicetree updates for v6.16
- MMC, OHCI, UDC and EDAC blocks added to the NPCM7XX DTSI - Fixes for GPIO hog names in the NPCM730 and RunBMC Olympus platforms -----BEGIN PGP SIGNATURE----- iJIEABYIADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaCV6mRwcYW5kcmV3QGNv ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmjQ8A/3ArLL49N17FV7UiNrvN 3TPgTxMnQMdl6aIL8VuoHIEUAP4sNLpe90w/rFBTGUsrOhg7nqBmPuP3JPPwIoLw o5yMBg== =GB0J -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguRckACgkQmmx57+YA GNkKPQ//eDRQK5SxmruzNzcgZX8T5cdeNWtkD9zj57nKhOfWEXrRqLAoCtmPofDF jpGcyaJVVIgAKZzR0Pq+wG/SSk7QZm7bK0Q/1+cgQ08LifX8mc9Vh64yv5h+UiE3 gKqnW5tB21GIZZ35Soj7W69BmN8Uep1iZeRZYpqY9DnVWoIh4ZG94i1rHeS8uquX y79yBKDo9zu3Q4vjhRg9M0umK5oRoZC2aQTG1YLQ8hu/qldoHRTCRLq/skJ99FkS RaWre8HWeWeblGODQTB9xiTFK3XkDwli7NKyl5Vlhst+wgGjb9eOpioCJtnjyA3s IdWDYLQtMsYpXggNUx01w4Lbf4QI9FRxX+EfrxCC+1lShph79SM1x0RjyfjpWTXW trtqsQPf8foQw0wCMV8/tSq5KlWPxITe+3c43FbtPhrkgBDeolcXIHXkJErFWSxw gzLxvuezVVRPiddZ1UfX8ZI/YMeURRyHOisehzIA0hTS/ryyEYh4lXGa26qoqXdt zSNje8cJy74Z4G1dOxnUak+lBLvdKwHKuHHvy6aOAdyoqqNo7+MzhIpGMwF9FEVX pqMEDGwhPfgQIhvwBg1rdlBu4ACjeTQEiwi48YVreM+Kk45Tmxbxl81ItBKzXcdA nI8dbEQO2DGU3milmh1EceV7PFFrwZOb1Px9Y3y8rvftwpGFhOM= =pUrd -----END PGP SIGNATURE----- Merge tag 'nuvoton-arm-6.16-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt Nuvoton ARM devicetree updates for v6.16 - MMC, OHCI, UDC and EDAC blocks added to the NPCM7XX DTSI - Fixes for GPIO hog names in the NPCM730 and RunBMC Olympus platforms * tag 'nuvoton-arm-6.16-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: ARM: dts: nuvoton: Add MMC Nodes ARM: dts: nuvoton: Add OHCI node ARM: dts: nuvoton: Add UDC nodes ARM: dts: nuvoton: Add EDAC node ARM: dts: nuvoton: Align GPIO hog name with bindings Link: https://lore.kernel.org/r/CACPK8Xe=f_hNNWUGL670x4-OeKgDB+2P+mxp5BaTLW==T5jE_A@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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7e1a0dfb3f
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arm64: dts: nuvoton: Add pinctrl
This is critical to support multifunction pins shared between devices as well as generic GPIOs. Signed-off-by: William A. Kennington III <william@wkennington.com> Link: https://patch.msgid.link/20250416015902.2091251-1-william@wkennington.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://lore.kernel.org/r/20250515-nuvoton-arm64-dt-v1-1-25769b8c1509@codeconstruct.com.au Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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816a748bee |
Minor improvements in ARM64 DTS for v6.16
Two cleanups which were missed on mailing lists - align GPIO node names with DT bindings for Mediatek mt7622 and Nvidia Tegra210-p2894. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmgjIRIQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD132YD/95kvOhmdQmd1qvc+bVSgLThHr2FCvX0VT7 B8Yk8XRalngADyG4Qda0m4XA9lZQ1jiG2i0fWBb2aEXqMDgve4jvq1J9BoNxIloY eR+ATlRnmIDBiAvGozvPhp/WIPCm17RDscCl8XvJCiEXrRfKUQuVljtj/aOLbeWZ NKjRPPdXQlKjaBUSUv3geW2z68uPRKEXsrKf5/v8jGAFUoWF7y7eascGuUz/ZQZr hB11emIOteQ824vsE0rkE5V4a2Szaro50+xryvGw9Ja0YaoXwyog+wEiRgvySYnc YyTfKjccUYgyIdTjBnIECiTEwlBiy6InPzBfVNx8ezlVFiuPTzt7Yv0v/acKx/D7 OXAs1yEEWYSu5NoHbhHxdGaHbtVScbHwPdS1PV7WPpBD0IBdCorSJKzKF+hNHdjz Javm/bD5B8ichKJKpPPOWmPiY/8h7TQFUsuzd+zDY4CZQEnHEdNCeC//RZ/AOdIm KYrcD0JL/NliaDh2i3wDs1AN6rV45Uhv6mBwjFSJfZBhXPqB8ns7wD08PIeyuNoq Pv6NllWrNoHKlyz+pXYgDIzM7a6iDfCAjydO6gkS8EgE/tYKTaJKDyfvs7NPM5MU VONtP8DZoGfm7u45JrHMLwvsR4HRaz2IjouAA2C/k6z4SXsICWAODXWjjXX0fPtv NYg3gFLLKw== =vSix -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguCdcACgkQmmx57+YA GNkaHBAAtJ24IruvIM7TLO1z7yHnWvaGeCzks1AR8yP3Hhl8HppwsQ9UKI0GOiki iIiYlc4RNJCg79HjA9375UenmzHyC62dcD7fCHZxfWKoNQm/+KTA8WbH2iELZm6A cBYr+G+AqMHKrNC/JFlVtxULy1HQY+/8ktKbg1YG8vpnBiGTAmZuDk5lgjwB/5qI 0Y8GK/3mUY5AWs7oXgPcBJmkD8mn9f/iYH8YhDfrBLMY6hGelEBFdezvoyBQhE1o C+hZ06A9adS+GUlOHNRh83F3FbaRqmKDixxn7WGaXOxq5/e8OPc50zEdZPvNtZPY DhGGiPMexG8+qVCJC+rSsmZedhHHwEjWQlTj3WxJ4RgbhfjhZRHbaMXcD83S6uVG YF9Og1PiL9T9irw1yLZYNFZTSILr4a7I5oXOS/mlgufU37sW6RZDq1XHZLGEB435 MU2ubBC8oZcswwKMBfekk5+Ah7cGlW/DZrZnj5FqYuMFQWaAgWc53t1YLE70cZtU litnjKeol9uSKUc2QgISth8MXSrSll+YqAv5A/YdRjcF6uLDWZPJ/Bo9tsgXtSj+ uikuW/0IBLztu3NMe1OaYI9mgMISRH4bn6ClgTfevm1IVIkFZ6hVWCkF9Mi9DyOl rP4jg9KvwQ3S2HXtSI9QJjKLwc6Gt5CsGq5FMT94PaByjovqH3s= =QSN1 -----END PGP SIGNATURE----- Merge tag 'dt64-cleanup-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt Minor improvements in ARM64 DTS for v6.16 Two cleanups which were missed on mailing lists - align GPIO node names with DT bindings for Mediatek mt7622 and Nvidia Tegra210-p2894. * tag 'dt64-cleanup-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: arm64: tegra: tegra210-p2894: Align GPIO hog node name with preferred style arm64: dts: mediatek: mt7622: Align GPIO hog name with bindings Link: https://lore.kernel.org/r/20250513104216.25803-4-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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53c3712fd5 |
Amlogic ARM64 DT for v6.16:
- Amlogic A4 Pinctrl support - UART RX/TX pull-up pinconf properties for all SoCs - SARADC support for the S905L SoC variant - Drop clock-latency in CPU node - Amlogic clk measure support for S4 & C3 Socs - Amlogic S6/S7/S7D initial support - I2C default pull-up bias pinconf property on Amlogic GXL based boards - Amlogic A4 & A5 Reset Controller support - New Boards: - Amlogic S6 BL209 Reference Board - Amlogic S7 BP201 Reference Board - Amlogic S7D BM202 Reference Board - Amlogic S805Y xiaomi-aquaman/Mi TV Stick -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmgjGi0ACgkQd9zb2sjI SdGjhBAAlVHaYPP4N8/de2+2nLFSzn4KgS2MIuh+ChyBpX9K1VQ8PNnU0HlUA7q7 NGXdaOgJBtJAz89sRopYqgGeGBDEntdlozhQmj0DR+7gNPJFXwdd0Li94fZWkUb1 TVszCjqTkNRhoP4GxVs2JKJeYwvrIAg5ei2Wg2IffKVmb2/Skt4Pl8GkXsAo+d1n N5EPPn4cC9TSPU/lQiooem9yKHZbvfMmzWsDNJfMpaktsXrcrzWntsKcdsTytK9R F0QZRPFJdoxgaSuW7zh6gFslRW+xh3+16ih+ImsgCmCaVN6Jxaj6b2oqJMBWrgtP asr4J6S/dwa8/CF4ovpTZIk4Iu7ZGqJ283BDSQPUYZSvoHIvbAvSYs3MpOEQE5X2 APsh5Fwu6ohRnrlg0TeaJ5MXjbQcLM1gz/jTapCF/AOjl1LfyFJvWi78Ok2hcKBn ag9ftMSM38sbkGP/hCFB3oaiyTKRiD32WKcsLHwAg01QsKUsFe2s/LpnzHaLmuFu hqtWxb2q4EeH8PCQdfKedBLD0pjJaCd9SRZ+y7KxYYpOLn+zNMgjkBqSp8FrWa3F ROTLlTqIPq8hEEg1wrD9Lhyf1acOcTJ9Z3XfdT8kVUSk2zVnhZivJcHZ2XYc7nBn KaUp0BKzRSdk6UOedmsBu/M+KHlEDCW8Q9deSn9PtHefP1KdDws= =JpiG -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguCYkACgkQmmx57+YA GNk9XQ//YU5VJR0+oMso9aUKDvBQZYk0zP2/HkPTmGqU/5KYwU+h8/Q/oygRCtsi NsVaWIkEjHRLIIGpqsy1j6yWh6t3Mj4jVFCXQvzdWN1gmlviMMmHFFiI+NmKhjjV P9GaonPUc0yTfhnjIonQBYQTSOOFUJeMxQ4gqZ08JOCzqtWrPQAGCMjOBUy2j+vd L+7Yo0L2zV1ghjPR4SeRxuP6XmG/NY4ZEzF5qMwVO/oor+G3vOjRkOkE3QubRJWs VDuyxQQKYk6Ms5qaNZ+Tg5mGvYMu4DNEMguPghVq1emwfxkSDL3W07oUF5S0S04W cz++kFdRFYWZIYiEqNiDDQis0a0cTkBQAEp1jE8DNnDF70Ek+Hnkw7U9zsqgb4yW ug8O5qy/0CLJYz4b091Nw2ZV9ohngwmTQClcSI+3Gw7rv/KLKL3lF1BiEiyFloMV fqDryRL3qmgxOstiwz3G3DX6kQ/viKaH5hfD/MEVEI5AuuDeJ1YqHcyqufOVzJVV l0Ks2Rsx+qmduXUYbWt5G66D28yOgG46hjhbGMeachrMJzginqwWyFd1zK8TwezX S86BOTg0vaHnFA/ecdmH/Od27AvgcWBdELBLGp9YB9MIHCfCNJ7TKTMYUyA0rITY 65BCYnyrybbbaC/mgZPgCP3PTL/bUvP1QUw4fGaG3BNMeDdKreg= =jevd -----END PGP SIGNATURE----- Merge tag 'amlogic-arm64-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM64 DT for v6.16: - Amlogic A4 Pinctrl support - UART RX/TX pull-up pinconf properties for all SoCs - SARADC support for the S905L SoC variant - Drop clock-latency in CPU node - Amlogic clk measure support for S4 & C3 Socs - Amlogic S6/S7/S7D initial support - I2C default pull-up bias pinconf property on Amlogic GXL based boards - Amlogic A4 & A5 Reset Controller support - New Boards: - Amlogic S6 BL209 Reference Board - Amlogic S7 BP201 Reference Board - Amlogic S7D BM202 Reference Board - Amlogic S805Y xiaomi-aquaman/Mi TV Stick * tag 'amlogic-arm64-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: (21 commits) arm64: dts: amlogic: Add A5 Reset Controller arm64: dts: amlogic: Add A4 Reset Controller arm64: dts: amlogic: add support for xiaomi-aquaman/Mi TV Stick dt-bindings: arm: amlogic: add S805Y and Mi TV Stick arm64: dts: amlogic: gxl: set i2c bias to pull-up arm64: dts: add support for S7D based Amlogic BM202 arm64: dts: add support for S7 based Amlogic BP201 arm64: dts: add support for S6 based Amlogic BL209 dt-bindings: arm: amlogic: add S7D support dt-bindings: arm: amlogic: add S7 support dt-bindings: arm: amlogic: add S6 support arm64: dts: amlogic: S4: Add clk-measure controller node arm64: dts: amlogic: C3: Add clk-measure controller node arm64: dts: amlogic: Drop redundant CPU "clock-latency" arm64: dts: amlogic: gxlx-s905l-p271: add saradc compatible arm64: dts: amlogic: a1: enable UART RX and TX pull up by default arm64: dts: amlogic: axg: enable UART RX and TX pull up by default arm64: dts: amlogic: g12: enable UART RX and TX pull up by default arm64: dts: amlogic: gxl: enable UART RX and TX pull up by default arm64: dts: amlogic: gxbb: enable UART RX and TX pull up by default ... Link: https://lore.kernel.org/r/5f7d3fa4-2d9d-450b-b384-abdd903284dc@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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709c8afa15 |
Amlogic ARM DT for v6.16:
- UART RX/TX pull-up pinconf properties for all SoCs - New Boards: - Meson8 TCU Fernsehfee 3.0 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmgjGgkACgkQd9zb2sjI SdH1zBAAjgDUyWG1UTpAHZ/3W+gW6SvKgEHhkYTaDLCIEcnSVrNha6mIfpK9UWyE 0FWdcwj6tKkF0p+Ot2g5W2A+G/ZjWSNUTpsZbAEJGoxKOsl5/rrXSUp5bkZl/1sl iAlfKNMC6o+wUEQtVLlNON5yvPrh97EyF0xtUw7U3d47E01Xn7JTIS9VxTBYtnYB /wZupt4HoMtMU+sQmzL6z5nZXVdGAngbN+/tUFr6VsAIPhOMYEXc8obsCmkqtOTR bcXFVO9t/zcS64TPNyLu2Z3/D08mJMxWjtheKSfpyuCINdabOebkxAvgJ0l+ElAY OHZ5uQ7ZiLVaVSvYEQaTfewTpjPpZ4z9iPEChxHRteADT2f2+OEC0UFCsC+baphU n9fn9hsPiwqIEVn/Jl+/zx/rXhFDVKBHKGw0OZo3VkKeHjc4uB529+ShuBEqVlAr C7DVWgWYQP4PE0Fpt2e1BKJiiubuEBgThBZVjVfIarVSL6n5Y73fkcpVfe2B60vp ya1LE6tsM59QVRd/NX2GDRp3ZRYQwDVcIKGTOos8WsMwm0vTXfmTahsC5tT4xHce MEq5qDvOY0xspY0oQ4fJSaKI8EjxZrDdHtUUh8k9CsYla2mayYu+4Cyu8hB0ekeB tBPUkN4VGHNCFnYOsIZZoAbH+UZyemsGYs6B//GOF4MNsn+WuYU= =MyHJ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguCNsACgkQmmx57+YA GNkc6w/+K3xUODX7CMgeOKBfbJhIWCO2zQaa/OwGGoW7J2hDC/8e9vvr/OLQ3N9T TKb8/j86wi60pH1lLwW5oM1NdYG737t2+oM73egTDk29oQl2xxtnjLBGtzaBbzCX DKKmA6oYczrT3qPQll5Gwvb2bIGMOpEGRbti9S5P+gntdDna7ewnzqs2SHxctSOj JbdmW6MynUPFCPuZe2PVyRjpv/4Z2f9JbkGoc4xr2umLK+w1XwcQ6WtjN7PvotGd 9Pn5J/I6udkx2l4jQK40MzY+BwsgvlXaUDzAO56phr6NEpfIStm52uUcdGO7Xvol OiUdW9y961YjMCDy7tdy2Tf95Eewt45G7h0624FKMZl/fIRJunP6CNI0DjoD7K3g lt6tCgRrznrkpn0qiQrZRnhutt9exRZMi1jpltmZqz4IKFoJ84olyrubMIuir05l J/XXu6XCs3ZL1Pl2+P4hgxjVBE3UlqP/reSeQPugxdXg0/HiWNQfLo1Le7p3C3sy WRObilgITUc/W2y6rSQuNf7jdjAlkszfnXb1tp/GBJp0C2Rc/8QXO/FHZqqkn0Il XLqY/muffv4PkqZcK3GYUI/UulPJ7il0DjRdMoe9K0mSHJ5+KR3N/VjdaG2yPJ/5 Acjwwo0IHPZ4FTQ8hShw5rsNDstf/igUEKDh4iAKBslOSOEJNfY= =VPeq -----END PGP SIGNATURE----- Merge tag 'amlogic-arm-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM DT for v6.16: - UART RX/TX pull-up pinconf properties for all SoCs - New Boards: - Meson8 TCU Fernsehfee 3.0 * tag 'amlogic-arm-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: ARM: dts: amlogic: meson8-fernsehfee3: Describe regulators ARM: dts: amlogic: Add TCU Fernsehfee 3.0 dt-bindings: arm: amlogic: Add TCU Fernsehfee 3.0 board dt-bindings: vendor-prefixes: Add TC Unterhaltungselektronik AG ARM: dts: amlogic: meson8b: enable UART RX and TX pull up by default ARM: dts: amlogic: meson8: enable UART RX and TX pull up by default Link: https://lore.kernel.org/r/838c5305-5c5b-4232-b7fe-86598dc50ace@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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e04381e7b7 |
Samsung DTS ARM64 changes for v6.16
1. Tesla FSD: Add Ethernet.
2. ExynosAutov920: Add more serial nodes, clock controllers for CPU
cluster CL0, CL1 and CL2.
3. New Exynos7870 SoC with pretty decent coverage: pin controllers,
clock controllers, I2C, MMC, serial and USB. New boards using
Exynos7870: Samsung Galaxy J7 Prime, Samsung Galaxy A2 Core and
Samsung Galaxy J6.
4. Google GS101: Add pmu-intr-gen syscon node for proper CPU hotplug.
5. Switch USI (serial engines) nodes to new samsung,mode constant coming
with DT bindings v6.15-rc1.
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Merge tag 'samsung-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.16
1. Tesla FSD: Add Ethernet.
2. ExynosAutov920: Add more serial nodes, clock controllers for CPU
cluster CL0, CL1 and CL2.
3. New Exynos7870 SoC with pretty decent coverage: pin controllers,
clock controllers, I2C, MMC, serial and USB. New boards using
Exynos7870: Samsung Galaxy J7 Prime, Samsung Galaxy A2 Core and
Samsung Galaxy J6.
4. Google GS101: Add pmu-intr-gen syscon node for proper CPU hotplug.
5. Switch USI (serial engines) nodes to new samsung,mode constant coming
with DT bindings v6.15-rc1.
* tag 'samsung-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: gs101: add pmu-intr-gen syscon node
arm64: dts: exynos: add initial support for Samsung Galaxy J6
arm64: dts: exynos: add initial support for Samsung Galaxy A2 Core
arm64: dts: exynos: add initial support for Samsung Galaxy J7 Prime
arm64: dts: exynos: add initial devicetree support for exynos7870
dt-bindings: arm: samsung: add compatibles for exynos7870 devices
arm64: dts: exynosautov920: add cpucl1/2 clock DT nodes
arm64: dts: exynosautov920: add cpucl0 clock DT nodes
arm64: dts: exynos: Add DT node for all UART ports
arm64: dts: exynos: update all samsung,mode constants
arm64: dts: fsd: Add Ethernet support for PERIC Block of FSD SoC
arm64: dts: fsd: Add Ethernet support for FSYS0 Block of FSD SoC
Link: https://lore.kernel.org/r/20250513101023.21552-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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87901f6940
|
ARM: dts: samsung: sp5v210-aries: Align wifi node name with bindings
Recently DT bindings expect 'wifi' as node name: s5pv210-fascinate4g.dtb: wlan@1: $nodename:0: 'wlan@1' does not match '^wifi(@.*)?$' Link: https://lore.kernel.org/r/20250424084655.105011-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250513101023.21552-7-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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179fa6e8c2 |
TI K3 device tree updates for v6.16
Generic Fixups/Cleanups: * am62*: emmc - drop disable-wp, Add bootphase tags to support MMC boot SoC Specific features and Fixes: AM62Ax: * C7x and R5F support added * Bug fix for emmc clock to point to default * CPUFreq thermal throttling on thermal alert AM62P5: * Add RNG Node (common to J722s) * Bug fix for emmc clock to point to default (common to J722S) AM625: * Wakeup R5 node * Bug fix for emmc clock to point to default * PRUSS-M support * New GPU bindings AM64: * Switch to 64-bit address space for PCIe0 * Add PCIe control nodes for main_conf region * Reserve timer nodes used by MCU F/w. AM65: * MMC: Add missing delay timing values for SDR and legacy modes * Add compatible for AM65x syscon and PCIe control properties (dtbs_check fixes) J7200: * PCIe control node to scm_conf, switch to 64-bit address space for PCIe1. J721E: * PCIe control node to scm_conf, switch to 64-bit address space for PCIe0,1. J721S2: * GPU node for Imagination Tech Rouge BXS GPU. * PCIe control node to scm_conf, switch to 64-bit address space for PCIe1. J722s/AM67A: * Switch serdes status to be enabled by board file than at SoC level. * Switch to 64-bit address space for PCIe0. J784S4/J742S2/AM69: * Add ASPCIE0 and enable output for PCIe1 * Fix length of serdes_ln_ctrl. * Switch to 64-bit address space for PCIe0,1. Board Specific: AM62Ax: * SK: co-processors C7x, R5, PWM support added * phycore-som: co-processors C7x, R5 AM62P5: * Add Toradex Verdin AM62P boards with Dahlia, Ivy, Mallow and Yavia support. * SK: Add remote processor support, PWM AM625: * Add BeagleBoard.org PocketBeagle-2 support * phycore-som: Enable R5F support * Verdin: Add eeprom compatible fallback * SK: Enable PWM, voltage supplies, clock, i2cmux rename for camera overlays (dtbs_check fixes) * BeaglePlay: Add voltage supplies for camera overlays (dtbs_check fixes) * phyboard-lyra: Add cooling maps for fan * emmc bug fixes: add non-removable flag for eMMC. AM65: * EVM: Add missing power supply description ofr Rocktech panel (dtbs_check fixes) J721E: * EVM: Enable OSPI1 * EVM/SK: Dt nodes description for mandatory power suplpies for panel and sensors (dtbs_check fixes) J721S2/AM68: * Add phyBOARD-Izar-AM68x * am68-SK: Fix regulator hierarchy J722s/AM67A: * EVM: Add mux controls for CSI2, power regulator nodes and add overlays for quad IMX219 and TEVI OV5640. * BeagleY-AI: Add bootph for main_gpio1 J784S4/J742S2/AM69: * usxgmii expansion board: Drop un-necessary pinctrl-names * evm: Add overlay for USB0 Type-A option -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmgiBIoACgkQ3bWEnRc2 JJ33HA//V738htoKu7xT1fUZg51GGTPH/lEOTuApKUW+9rXZefuvov5BQsUcSRDM uZgAD1wMVmgp9AFXS7O2KK4lGL8h5SnCpQwXUHO3QrD17uMbLSutTe19P3+S9OHk AGKfLbz6WVUIN8WT3S2zcPoKDp8PQgs6rysBr88iw0nnMgTdVRi8hXNt1jJqWlh3 DWiavXH6vVoHWtXG/ptgef2+PNYD75NPwAgmV5klDUhyTb6Sb3D4bf5FdFs/vdGz yA0t9a4Bl59UCn7u2S1gOEdmYYDELNQsAnWDytySYn0UjGw7CWdaZrLSZdvWPf5O o/qimF2frR4cWNtgV3il5SXkXV6v+ZPm+wh9u1dN3CR6f7xDBZh7UpudxOUdPx6q F8iv54hw53RT4wM23KokPA+I2sP8xXxrZoY+fWPzuJXDJWsjumlzNHXqx4aEWq2F EJubyL5XtWHZuRHSoxxyqUBHSOQhTt/Kf5AsRD4QJO/HOUbDUahKqKXuv/mGYmwB Vdqx+P9UxLdnWoI5pil6naZHrvqiHDTVJhwfSgaJwHVgqtm/Qb2o1MB430+fHMn4 LenCB1Qtx5J92LbCSAJlY/eguRlvwt2UDzBSAEKod8QuWJqqTRw42T/eJBwXayJf BS2M6mCXjYPAy1/a0xrMY9Z+f1ZvmUGBcJOpvMhZRaf8VR5BsKo= =CjR6 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguBV0ACgkQmmx57+YA GNkhABAAw1l0lJ4YuwgNXlLOw912uEleiHLSYTakpK65xscnXcmY6O+CP3Hugoe1 daVb0RDoYusD/MyQXTz8KIu9Ji55ki078d7JSs2DfN1nlO+DjlY63Vw0zaAtRMgq iSOR/pDjsejsC73QckpsHzD0hvRpW4rHhxlWzy0YlsMXvrY92Tx0EwFtuQfdQO1z E89l0JkiFYk5ZIi2UUMC67ZgMUNEvNVsJ5biyov+4LXCfzNkPwTUAMZvPQxdSTCr IavMtX0upOz9HghWUKnmBVyOQmGA/UMHHH0jZx/McPCu57DPci/u8QYWkat3jfCi QGoBrVc4ZqBCO/rmhSZtRjdwKQ+3FK5HGtYa6M9iHJ/qWCQGqlroK5+BIMAJtyHb ryhC3Fhq1SYoucgpI/ggI0bg3Mufwpwf3l65U50eV6/IKNp6FfwKb+6Wu3JfTF8h E6JsfWWUrlNUQrE9NbQwtL2+aDnSXu/glJxwS1wqu1w6LI1Z0WpyYM0u6WISNAHL Y7iCiZVBaOGVRHejTUSJbScec3oYvIeW0q9MvkepV7yKo0AML7vuIvgy2EPmK7MJ 6uKcluhT49qbh98MvlSXU1QZsjDUxne4DO9Bej8NpbqlF0tt900RdkOHc/rqZFFk uO8Ie4sydNl0ZfRcioL0YcioSoX0IUg90ebyTROrC0vjYP2T/bU= =w9D6 -----END PGP SIGNATURE----- Merge tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.16 Generic Fixups/Cleanups: * am62*: emmc - drop disable-wp, Add bootphase tags to support MMC boot SoC Specific features and Fixes: AM62Ax: * C7x and R5F support added * Bug fix for emmc clock to point to default * CPUFreq thermal throttling on thermal alert AM62P5: * Add RNG Node (common to J722s) * Bug fix for emmc clock to point to default (common to J722S) AM625: * Wakeup R5 node * Bug fix for emmc clock to point to default * PRUSS-M support * New GPU bindings AM64: * Switch to 64-bit address space for PCIe0 * Add PCIe control nodes for main_conf region * Reserve timer nodes used by MCU F/w. AM65: * MMC: Add missing delay timing values for SDR and legacy modes * Add compatible for AM65x syscon and PCIe control properties (dtbs_check fixes) J7200: * PCIe control node to scm_conf, switch to 64-bit address space for PCIe1. J721E: * PCIe control node to scm_conf, switch to 64-bit address space for PCIe0,1. J721S2: * GPU node for Imagination Tech Rouge BXS GPU. * PCIe control node to scm_conf, switch to 64-bit address space for PCIe1. J722s/AM67A: * Switch serdes status to be enabled by board file than at SoC level. * Switch to 64-bit address space for PCIe0. J784S4/J742S2/AM69: * Add ASPCIE0 and enable output for PCIe1 * Fix length of serdes_ln_ctrl. * Switch to 64-bit address space for PCIe0,1. Board Specific: AM62Ax: * SK: co-processors C7x, R5, PWM support added * phycore-som: co-processors C7x, R5 AM62P5: * Add Toradex Verdin AM62P boards with Dahlia, Ivy, Mallow and Yavia support. * SK: Add remote processor support, PWM AM625: * Add BeagleBoard.org PocketBeagle-2 support * phycore-som: Enable R5F support * Verdin: Add eeprom compatible fallback * SK: Enable PWM, voltage supplies, clock, i2cmux rename for camera overlays (dtbs_check fixes) * BeaglePlay: Add voltage supplies for camera overlays (dtbs_check fixes) * phyboard-lyra: Add cooling maps for fan * emmc bug fixes: add non-removable flag for eMMC. AM65: * EVM: Add missing power supply description ofr Rocktech panel (dtbs_check fixes) J721E: * EVM: Enable OSPI1 * EVM/SK: Dt nodes description for mandatory power suplpies for panel and sensors (dtbs_check fixes) J721S2/AM68: * Add phyBOARD-Izar-AM68x * am68-SK: Fix regulator hierarchy J722s/AM67A: * EVM: Add mux controls for CSI2, power regulator nodes and add overlays for quad IMX219 and TEVI OV5640. * BeagleY-AI: Add bootph for main_gpio1 J784S4/J742S2/AM69: * usxgmii expansion board: Drop un-necessary pinctrl-names * evm: Add overlay for USB0 Type-A option * tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (86 commits) arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640 arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219 arm64: dts: ti: j722s-evm: Add MUX to control CSI2RX arm64: dts: ti: j722s-evm: Add DT nodes for power regulators arm64: dts: ti: k3-am62a-phycore-som: Reserve main_timer2 for C7x DSP arm64: dts: ti: k3-am62a-phycore-som: Reserve main_rti4 for C7x DSP arm64: dts: ti: k3-am62a-phycore-som: Enable Co-processors arm64: dts: ti: k3-am62-phycore-som: Enable Co-processors arm64: dts: ti: k3-am62x-phyboard-lyra-gpio-fan: Update cooling maps arm64: dts: ti: k3-am62a: Enable CPU freq throttling on thermal alert arm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E arm64: dts: ti: k3-j721s2: Add GPU node arm64: dts: ti: k3-am62: New GPU binding details arm64: dts: ti: k3-am62-main: Add PRUSS-M node arm64: dts: ti: k3-am64: Reserve timers used by MCU FW arm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 for C7x DSP arm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP arm64: dts: ti: k3-am62x-sk-common: Enable IPC with remote processors arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors ... Link: https://lore.kernel.org/r/20250512144807.yn64klchtmjjl6ac@protrude Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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c07da6de0e
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arm64: dts: blaize-blzp1600: Enable GPIO support
Blaize BLZP1600 uses the custom silicon provided from VeriSilicon to add GPIO support. This interface is used to control signals on many other peripherals, such as Ethernet, USB, SD and eMMC. Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com> Link: https://lore.kernel.org/r/20250512133302.151621-1-nikolaos.pasaloukos@blaize.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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7e358b8cc1 |
T-HEAD Devicetrees for v6.16
There are several additions for the T-Head TH1520 SoC: - AON (Always-On) node which serves as a power-domain controller - Reset controller node - VO (Video Output) clock controller node These changes have all been tested in linux-next with the corresponding driver patches. Signed-off-by: Drew Fustini <drew@pdp7.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSy8G7QpEpV9aCf6Lbb7CzD2SixDAUCaB53oQAKCRDb7CzD2Six DCvBAP0VAKtqOi5BzydRwboY244ji/woQgNqJCt4AxZkJSaMHQD/YlOhHUQq9+O9 H/iHRQAAGnmu91nWlwdQ6FgJCWMb0Aw= =i6OP -----END PGP SIGNATURE----- Merge tag 'thead-dt-for-v6.16' of https://github.com/pdp7/linux into soc/dt T-HEAD Devicetrees for v6.16 There are several additions for the T-Head TH1520 SoC: - AON (Always-On) node which serves as a power-domain controller - Reset controller node - VO (Video Output) clock controller node These changes have all been tested in linux-next with the corresponding driver patches. Signed-off-by: Drew Fustini <drew@pdp7.com> * tag 'thead-dt-for-v6.16' of https://github.com/pdp7/linux: riscv: dts: thead: Add device tree VO clock controller riscv: dts: thead: Introduce reset controller node riscv: dts: thead: Introduce power domain nodes with aon firmware |
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24822c4b47 |
dt-bindings: clock: socfpga: convert to yaml
Convert the clock device tree bindings to yaml for the Altera SoCFPGA Cyclone5, Arria5, and Arria10 chip families. Since the clock nodes are subnodes to Altera SOCFPGA Clock Manager, the yaml was added to socfpga-clk-manager.yaml. Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
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652eea251d |
arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groups
White Hawk ARD audio uses a clock generated by the TPU, but commit |
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36e9e1ab59 |
ARM: dts: microchip: sama7g54_curiosity: Add fixed-partitions for spi-nor flash
Add fixed-partitions for spi-nor flash to match the at91 boot flow and layout of the nand flash. Partitions can be listed from /proc/mtd: [root@sama7g54 ~]$ cat /proc/mtd | grep qspi mtd6: 00040000 00001000 "qspi1: at91bootstrap" mtd7: 00100000 00001000 "qspi1: u-boot" mtd8: 00040000 00001000 "qspi1: u-boot env" mtd9: 00080000 00001000 "qspi1: device tree" mtd10: 00600000 00001000 "qspi1: kernel" [root@sama7g54 ~]$ mtdinfo /dev/mtd10 mtd10 Name: qspi1: kernel Type: nor Eraseblock size: 4096 bytes, 4.0 KiB Amount of eraseblocks: 1536 (6291456 bytes, 6.0 MiB) Minimum input/output unit size: 1 byte Sub-page size: 1 byte Character device major/minor: 90:20 Bad blocks are allowed: false Device is writable: true Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20250429064547.5807-1-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> |
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e634fd7166 |
ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board
Add RTT timer with backup register for SAMA7D65_Curiosity board. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/463581224a07bf122c6907d34a0c5c71b1cc73e1.1744666011.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> |
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4b3d951f28 |
ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC
Add RTT support for SAMA7D65 SoC. The GPBR is added so the SoC is able to store the RTT time data. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/e8868ef06102241b47883ba10edaed751831be6d.1744666011.git.Ryan.Wanner@microchip.com [claudiu.beznea: keep nodes sorted by their address] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> |
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f5b56abe58 |
ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support
Add SRAM, secumod, UDDRC, and DDR3phy to enable support for low power modes. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/354ecd628fdd292d2125570a6b10a93cbecb7706.1744666011.git.Ryan.Wanner@microchip.com [claudiu.beznea: keep nodes sorted by their address] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> |
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0bbc54da32 |
ARM: dts: microchip: sama7d65_curiosity: add EEPROM
If the MAC address is not fetched and loaded by U-boot then Linux will have to load the address. The EEPROM and nvmem-layout to describe EUI48 MAC address regions. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/96ee6832d9b55acfae8d3560f625798025dfd89c.1743523114.git.Ryan.Wanner@microchip.com [claudiu.beznea: added nvmem properties in gmac0 node before the status one] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> |
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e65a13a290 |
ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity
Add MCP16502 to the sama7d65_curiosity board to control voltages in the MPU. The device is connected to twi 10 interface Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/60f6b7764227bb42c74404e8ca1388477183b7b5.1743523114.git.Ryan.Wanner@microchip.com [claudiu.beznea: drop regulator-suspend-voltage for ldo2 as it is not needed] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> |
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7116fb2f15 |
ARM: dts: microchip: sama7d65: Enable GMAC interface
Enable GMAC0 interface for sama7d65_curiosity board. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/fca0c1deb74006cdedbdd71061dec9dabf1e9b9a.1743523114.git.Ryan.Wanner@microchip.com [claudiu.beznea: move gmac0 node to keep the nodes alphanumerically sorted, dropped status property on the PHY node, added missing blank line] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> |
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b51e4aea3e |
ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC
Add FLEXCOMs to the SAMA7D65 SoC device tree. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/d474fcd850978261ac889950ac1c3a36bc6d3926.1743523114.git.Ryan.Wanner@microchip.com [claudiu.beznea: use vendor specific properties at the end of the node, align DMA entries, add missing spaces] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> |
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37aa981a33 |
ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC
Add support for GMAC interfaces on SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/05b107796b6f3a173d0dd0a5b2107b675cfd994e.1743523114.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> |
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d50108706a |
riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader
Add bootph-pre-ram hinting to jh7110-common.dtsi: - i2c5_pins and i2c-pins subnode for connection to eeprom - eeprom node - qspi flash configuration subnode - memory node - mmc0 for eMMC - mmc1 for SD Card - uart0 for serial console With this the U-Boot SPL secondary program loader may drop such overrides. Signed-off-by: E Shattow <e@freeshell.de> Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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6359181114 |
riscv: dts: starfive: jh7110-common: add eeprom node to i2c5
StarFive VisionFive2 and similar JH7110 boards have an eeprom compatible with Atmel 24c04. Add the node so this may be used with the at24 driver. Signed-off-by: E Shattow <e@freeshell.de> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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59404dceb3 |
riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz
Use qspi flash read-delay and spi-max-frequency settings compatible with U-Boot bootloader. Observations from testing on Pine64 Star64 hardware within U-Boot bootloader and read-delay=2 are spi-max-frequency less than 49.8MHz fails to write, corrupt data writes at 25MHz to 49.799999MHz, and valid data writes at 49.8MHz to 100MHz (not tested above 100MHz). No valid spi-max-frequency was found for 1<read-delay<=3 and corrupt data with read-delay=3. Looking around the Linux codebase it is common to see read-delay 2 cycles with spi-max-frequency 100MHz and testing confirms this to work in both U-Boot and Linux. Signed-off-by: E Shattow <e@freeshell.de> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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724a6718ce |
riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg
Add syscrg clock assignments for CPU, BUS, PERH, and QSPI as required by boot loader before kernel. Signed-off-by: E Shattow <e@freeshell.de> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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71385a893c |
riscv: dts: starfive: jh7110-common: use macros for MMC0 pins
The pin names of MMC0 pinmux is defined in the pinctrl dt binding header associated with starfive,jh7110-pinctrl . Include the header file and use these names instead of raw numbers for defining MMC0 pinmux. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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a2e7f6c487 |
riscv: dts: starfive: fml13v01: enable USB 3.0 port
Add usb_cdns3 and usb0_pins configuration to support super speed USB device on the FML13V01 board. Signed-off-by: Sandie Cao <sandie.cao@deepcomputing.io> Tested-by: Maud Spierings <maud_spierings@hotmail.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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a3cd12acb7 |
arm64: dts: allwinner: a100: add Liontron H-A133L board support
The H-A133L board is an industrial development board made by Liontron. It contains a number of dedicated JST connectors, to connect external peripherals. It features: - Allwinner A133 SoC (4 * Arm Cortex-A53 cores at up to 1.6 GHz) - 1 GiB, 2 GiB or 4 GiB of LPDDR4 DRAM - between 16 and 128 GiB eMMC flash - AXP707 PMIC (compatible to AXP803) - 100 Mbit/s RJ45 Ethernet socket, using an JLSemi JL1101 PHY - XR829 WIFI+Bluetooth chip - 2 * USB 2.0 USB-A ports, plus three sets of USB pins on connectors (connected via a USB hub connected to USB1 on the SoC) - microSD card slot - 3.5mm A/V port - 12V power supply - connectors for an LVDS or MIPI-DSI panel Add the devicetree describing the board's peripherals and their connections. Despite being a devboard, the manufacturer does not publish a schematic (I asked), so the PMIC rail assignments were bases on BSP dumps, educated guesses and some experimentation. Dropping the always-on property from any of the rails carrying it will make the board hang as soon as the kernel turns off unused regulators. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Link: https://patch.msgid.link/20250505164729.18175-4-andre.przywara@arm.com [wens@csie.org: fix property in &usbphy; fix comment typo in &usb_otg] Signed-off-by: Chen-Yu Tsai <wens@csie.org> |
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1064013303 |
riscv: dts: renesas: Add specific RZ/Five cache compatible
When the binding was originally written, it was assumed that all ax45mp-caches had the same properties etc. This has turned out to be incorrect, as the QiLai SoC has a different number of cache-sets. Add a specific compatible for the RZ/Five for property enforcement and in case there turns out to be additional differences between these implementations of the cache controller. Acked-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/20250512-sphere-plenty-8ce4cd772745@spud Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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fb30a7c596 |
arm64: dts: renesas: sparrow-hawk: Disable dtc spi_bus_bridge check
make dtbs:
arch/arm64/boot/dts/renesas/r8a779g0.dtsi:1269.24-1283.5: Warning (spi_bus_bridge): /soc/spi@e6ea0000: incorrect #address-cells for SPI bus
also defined at arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts:471.9-486.3
arch/arm64/boot/dts/renesas/r8a779g0.dtsi:1269.24-1283.5: Warning (spi_bus_bridge): /soc/spi@e6ea0000: incorrect #size-cells for SPI bus
also defined at arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts:471.9-486.3
arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dtb: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge'
The Sparrow Hawk uses the MSIOF module in I2S mode instead of SPI mode,
triggering a conflict between the SPI bus bindings and dtc:
- Serial engines that can be SPI controllers must use "spi" as their
node names,
- Dtc assumes nodes named "spi" are always SPI controllers.
Fix this by disabling this specific warning for this board.
Fixes:
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518e8ffa00 |
ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board
Add support for Ultratronik's stm32mp157c fly board. This board embeds a STM32MP157c SOC and 1GB of DDR3. Several connections are available on this boards: 2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART, SDcard, RJ45, ... This patch enables basic support for a kernel boot - SD-card or eMMC. Signed-off-by: Goran Rađenović <goran.radni@gmail.com> Link: https://lore.kernel.org/r/20250508143818.2574558-5-goran.radni@gmail.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
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6c9bb5f361 |
MAINTAINERS: Add entry for ULTRATRONIK BOARD SUPPORT
Add a new MAINTAINERS section for the ULTRATRONIK BOARD SUPPORT, covering the stm32mp157c-ultra-fly-sbc.dts board support file. This ensures that maintainers of this board are properly listed and can be notified for any relevant changes. Signed-off-by: Goran Rađenović <goran.radni@gmail.com> Signed-off-by: Börge Strümpfel <boerge.struempfel@gmail.com> Link: https://lore.kernel.org/r/20250508143818.2574558-4-goran.radni@gmail.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
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21dc0aa4e7 |
dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding
This commit documents ultra-fly-sbc devicetree binding based on STM32MP157 SoC. Signed-off-by: Goran Rađenović <goran.radni@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250508143818.2574558-3-goran.radni@gmail.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
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8605b4d36f |
dt-bindings: vendor-prefixes: Add Ultratronik
Ultratronik GmbH is a German electronics company: https://www.ultratronik-ems.de/ Signed-off-by: Goran Rađenović <goran.radni@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250508143818.2574558-2-goran.radni@gmail.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
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5e281c436e |
arm64: dts: st: use lptimer3 as tick broadcast source on stm32mp257f-ev1
During the low power modes the generic ARM timer is deactivated, so the the tick broadcast is used, based on LPTIMER3 which is clocked by LSE on STMicroelectronics boards. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
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e0919bca1a |
arm64: dts: st: add low-power timer nodes on stm32mp251
Add low-power timer (LPTimer) support on STM32MP25 SoC. The full feature set is implemented in LPTIM1/2/3/4. LPTIM5 supports a smaller set of features (no capture/compare) channel. Still, LPTIM5 can be used as single PWM, counter, trigger or timer. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20250429125133.1574167-7-fabrice.gasnier@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
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3cd55c7295 |
arm64: defconfig: enable STM32 LP timer clockevent driver
Enable the STM32 LP timer MFD core and clockevent drivers used on STM32MP257F-EV1 board, for PSCI OSI. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20250429125133.1574167-6-fabrice.gasnier@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
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cad2492de9 |
arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board
Add SPI NOR flash nor support on stm32mp257f-ev1 board. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20250512-upstream_omm_ospi_dts-v10-3-fca0fbe6d10a@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
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6dabe0d862 |
arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi
Add pinctrl entry related to OSPI's port1 in stm32mp25-pinctrl.dtsi Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20250512-upstream_omm_ospi_dts-v10-2-fca0fbe6d10a@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |