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arm64: dts: st: add low-power timer nodes on stm32mp251

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Add low-power timer (LPTimer) support on STM32MP25 SoC.
The full feature set is implemented in LPTIM1/2/3/4. LPTIM5 supports a
smaller set of features (no capture/compare) channel. Still, LPTIM5 can
be used as single PWM, counter, trigger or timer.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250429125133.1574167-7-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
Fabrice Gasnier 2025-04-29 14:51:32 +02:00 committed by Alexandre Torgue
parent 3cd55c7295
commit e0919bca1a
1 changed files with 177 additions and 0 deletions
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177
arch/arm64/boot/dts/st/stm32mp251.dtsi
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@ -292,6 +292,78 @@ rifsc: bus@42080000 {
#access-controller-cells = <1>;
ranges;
lptimer1: timer@40090000 {
compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";
reg = <0x40090000 0x400>;
interrupts-extended = <&exti1 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_LPTIM1>;
clock-names = "mux";
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 17>;
power-domains = <&RET_PD>;
wakeup-source;
status = "disabled";
counter {
compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";
#pwm-cells = <3>;
status = "disabled";
};
timer {
compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";
status = "disabled";
};
trigger@0 {
compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";
reg = <0>;
status = "disabled";
};
};
lptimer2: timer@400a0000 {
compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";
reg = <0x400a0000 0x400>;
interrupts-extended = <&exti1 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_LPTIM2>;
clock-names = "mux";
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 18>;
power-domains = <&RET_PD>;
wakeup-source;
status = "disabled";
counter {
compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";
#pwm-cells = <3>;
status = "disabled";
};
timer {
compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";
status = "disabled";
};
trigger@1 {
compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";
reg = <1>;
status = "disabled";
};
};
i2s2: audio-controller@400b0000 {
compatible = "st,stm32mp25-i2s";
reg = <0x400b0000 0x400>;
@ -853,6 +925,111 @@ i2c8: i2c@46040000 {
status = "disabled";
};
lptimer3: timer@46050000 {
compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";
reg = <0x46050000 0x400>;
interrupts-extended = <&exti2 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_LPTIM3>;
clock-names = "mux";
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 19>;
wakeup-source;
status = "disabled";
counter {
compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";
#pwm-cells = <3>;
status = "disabled";
};
timer {
compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";
status = "disabled";
};
trigger@2 {
compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";
reg = <2>;
status = "disabled";
};
};
lptimer4: timer@46060000 {
compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";
reg = <0x46060000 0x400>;
interrupts-extended = <&exti2 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_LPTIM4>;
clock-names = "mux";
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 20>;
wakeup-source;
status = "disabled";
counter {
compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";
#pwm-cells = <3>;
status = "disabled";
};
timer {
compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";
status = "disabled";
};
trigger@3 {
compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";
reg = <3>;
status = "disabled";
};
};
lptimer5: timer@46070000 {
compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";
reg = <0x46070000 0x400>;
interrupts-extended = <&exti2 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_LPTIM5>;
clock-names = "mux";
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&rifsc 21>;
wakeup-source;
status = "disabled";
counter {
compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";
#pwm-cells = <3>;
status = "disabled";
};
timer {
compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";
status = "disabled";
};
trigger@4 {
compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";
reg = <4>;
status = "disabled";
};
};
csi: csi@48020000 {
compatible = "st,stm32mp25-csi";
reg = <0x48020000 0x2000>;