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T-HEAD Devicetrees for v6.16

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There are several additions for the T-Head TH1520 SoC:
 
  - AON (Always-On) node which serves as a power-domain controller
  - Reset controller node
  - VO (Video Output) clock controller node
 
 These changes have all been tested in linux-next with the corresponding
 driver patches.
 
 Signed-off-by: Drew Fustini <drew@pdp7.com>
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQSy8G7QpEpV9aCf6Lbb7CzD2SixDAUCaB53oQAKCRDb7CzD2Six
 DCvBAP0VAKtqOi5BzydRwboY244ji/woQgNqJCt4AxZkJSaMHQD/YlOhHUQq9+O9
 H/iHRQAAGnmu91nWlwdQ6FgJCWMb0Aw=
 =i6OP
 -----END PGP SIGNATURE-----

Merge tag 'thead-dt-for-v6.16' of https://github.com/pdp7/linux into soc/dt

T-HEAD Devicetrees for v6.16

There are several additions for the T-Head TH1520 SoC:

 - AON (Always-On) node which serves as a power-domain controller
 - Reset controller node
 - VO (Video Output) clock controller node

These changes have all been tested in linux-next with the corresponding
driver patches.

Signed-off-by: Drew Fustini <drew@pdp7.com>

* tag 'thead-dt-for-v6.16' of https://github.com/pdp7/linux:
  riscv: dts: thead: Add device tree VO clock controller
  riscv: dts: thead: Introduce reset controller node
  riscv: dts: thead: Introduce power domain nodes with aon firmware
This commit is contained in:
Arnd Bergmann 2025-05-21 18:50:08 +02:00
commit 7e358b8cc1
1 changed files with 21 additions and 0 deletions
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21
arch/riscv/boot/dts/thead/th1520.dtsi
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@ -6,6 +6,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/thead,th1520-clk-ap.h>
#include <dt-bindings/power/thead,th1520-power.h>
/ {
compatible = "thead,th1520";
@ -229,6 +230,13 @@ stmmac_axi_config: stmmac-axi-config {
snps,blen = <0 0 64 32 0 0 0>;
};
aon: aon {
compatible = "thead,th1520-aon";
mboxes = <&mbox_910t 1>;
mbox-names = "aon";
#power-domain-cells = <1>;
};
soc {
compatible = "simple-bus";
interrupt-parent = <&plic>;
@ -489,6 +497,19 @@ clk: clock-controller@ffef010000 {
#clock-cells = <1>;
};
rst: reset-controller@ffef528000 {
compatible = "thead,th1520-reset";
reg = <0xff 0xef528000 0x0 0x4f>;
#reset-cells = <1>;
};
clk_vo: clock-controller@ffef528050 {
compatible = "thead,th1520-clk-vo";
reg = <0xff 0xef528050 0x0 0xfb0>;
clocks = <&clk CLK_VIDEO_PLL>;
#clock-cells = <1>;
};
dmac0: dma-controller@ffefc00000 {
compatible = "snps,axi-dma-1.01a";
reg = <0xff 0xefc00000 0x0 0x1000>;