mirror of
https://github.com/torvalds/linux.git
synced 2026-06-01 02:53:36 +02:00
STM32 DT for v6.16, round 1
Highlights:
----------
- MCU:
- Add low power timer on STM32F746
- Add STM32H747 High end MCU support. It embeds:
- dual-core (Cortex-M7 + Cortex-M4)
- up to 2 Mbytes flash
- 1 Mbyte of internal RAM
- Add STM32H747i-disco board support. Detailed information can be
found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
- MPU:
- STM32MP13:
- Add VREFINT calibration support based on ADC.
- STMP32MP15:
- Add new Ultratronik Fly board support:
- based on STM32MP157C SoC
- 1GB of DDR3
- Several connections are available on this boards:
2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
SDcard, RJ45, ...
- STM32MP25:
- Add OCTOSPI support on STM32MP25 SoCs
- Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
- Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
LPTIM3 as low power broadcast timer on STM32MP257F-EV1.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmgkXoEdHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIU7DQ/5AVX4QZoSJunoS/Um
QtQku5tyAiQD/RupkUitkB0BPSV4XoipWM6f2MVlBnIblRe8esKVDo2AntiDte/E
mOQ0HwP6nFiRL90DdLGqQ0ySwD9pjnUPn7c8ZkEZw2X8hAhTgTCXAVgDJ5tRKAiz
3M5aFw1J3h4dPlSObuCUbQouTIYwvC7Gn80b92Ppo8Sbt2tcfyWGweTzBKtw+InK
Zo8p36Oz1w/Ful/pIO8YWlcQK8myD18KiCKAYR5tCfTGIjOOp+wpaFl/xIWFRcWL
1RPOS38l3SPUzEB6otfK5vIi9JxQDAm/AAsgbTBLcSQmEXpyn3M8ZjQP1KI/KMG9
68lhTHKbTaEeo16jr3aKeThecYdszNt4zmNlZ8vCDzr9o0gpC282VgH31Do8g6vu
b4fRkDn2x1y90GNAOCEPufLS9xwQboRw6Ngc4gHyZjuPvPKw+/SwpoCyulJgiCuC
p+R6ZCf5E+dmE5V762PJ+o0BWO09anP6vBVXd0vakK3NH+T964jkiVbaqgBz374v
o58ysq+e3URN7olJkY5QaKwTUE2N6XAUJn3zmtJYw2gYfzXZdBDPjRCmXBvtAHTw
AwLGeMOuf/NmphLhJecVHRmAMmJpnwFuxPjU3dd1sFGgAXeCw+hvGXei3wgwG+fU
D9kfbRofrV3Tl9YhHl57ocIanm8=
=lBee
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguStcACgkQmmx57+YA
GNl5Zg/9GewrqmsiYWjzNC2klAdaB4SL15eXQ0V5REg8S0Hc9EFJI5G20n2PF0sX
ciEDR+azrsZ6qXCiWA7ZmqCheQK6dPmojIX6zWgNONCqq8sUipCyK3uplIGLC2Nu
QjKHixQuD0fg73mlNwF7LaaFf0riY+B09A2HPuFlAYCt8bCaFuIOjMLWNbUyVPcI
sx5tUU1GYRRupqEwnoKrXNp0UJGLRRgscdMUKn5ZLE5sMUEoWIPppIS2/hWoUi48
LC0C9pn9Xm4FTbwVp05X7qooJn3lzjR2ZogqUqGwzn+qmLgulKMUepr0GVRzvOEh
0zT7HIwxiRYuLfI/EymPxwDrUUxPJNi0nQiJhJxM08iHwkmhEi86d417ZcdYPESt
JCSxXFzWMWatnQqA7f0ijBRN4SbNsH75jPkrEjOgu9mO9/OwQtiL+I56C5K2g+ge
JBIRKPC03vG47wHFREzCXFRmeGzkn0Jz03CqvGJnDnPGS8FvzkE/kSw7Gv9D8crU
flgqmYUezxtykE2zhgPB7Cl0lcjCbWGUDeZUXNjbH5ulyKG/+keAu72cdmuikABy
8A9L7YK+QTehHfzuFY1krj4RJwoxEQgBmx+ZlnJxniAo5VE4IenzamIAjZX2UZ97
oZr6EqcFT2WMh0Cr8p30B0lVSnowkclOlvZ5E525mLwCQ2Un0bE=
=KRaD
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.16, round 1
Highlights:
----------
- MCU:
- Add low power timer on STM32F746
- Add STM32H747 High end MCU support. It embeds:
- dual-core (Cortex-M7 + Cortex-M4)
- up to 2 Mbytes flash
- 1 Mbyte of internal RAM
- Add STM32H747i-disco board support. Detailed information can be
found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
- MPU:
- STM32MP13:
- Add VREFINT calibration support based on ADC.
- STMP32MP15:
- Add new Ultratronik Fly board support:
- based on STM32MP157C SoC
- 1GB of DDR3
- Several connections are available on this boards:
2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
SDcard, RJ45, ...
- STM32MP25:
- Add OCTOSPI support on STM32MP25 SoCs
- Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
- Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
LPTIM3 as low power broadcast timer on STM32MP257F-EV1.
* tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (22 commits)
ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board
MAINTAINERS: Add entry for ULTRATRONIK BOARD SUPPORT
dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding
dt-bindings: vendor-prefixes: Add Ultratronik
arm64: dts: st: use lptimer3 as tick broadcast source on stm32mp257f-ev1
arm64: dts: st: add low-power timer nodes on stm32mp251
arm64: defconfig: enable STM32 LP timer clockevent driver
arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board
arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi
arm64: dts: st: Add OMM node on stm32mp251
ARM: dts: stm32: support STM32h747i-disco board
ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
ARM: dts: stm32: add pin map for UART8 controller on stm32h743
ARM: dts: stm32: add uart8 node for stm32h743 MCU
dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
ARM: stm32: add a new SoC - STM32H747
dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
ARM: dts: st: stm32: Align wifi node name with bindings
ARM: dts: stm32: add low power timer on STM32F746
...
Link: https://lore.kernel.org/r/2f101efb-6d58-48d8-983a-57e30a34827c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
38181494e4
|
|
@ -42,6 +42,10 @@ properties:
|
|||
- st,stm32h743i-disco
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||||
- st,stm32h743i-eval
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||||
- const: st,stm32h743
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||||
- items:
|
||||
- enum:
|
||||
- st,stm32h747i-disco
|
||||
- const: st,stm32h747
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||||
- items:
|
||||
- enum:
|
||||
- st,stm32h750i-art-pi
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||||
|
|
@ -184,6 +188,11 @@ properties:
|
|||
- const: phytec,phycore-stm32mp157c-som
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||||
- const: st,stm32mp157
|
||||
|
||||
- description: Ultratronik STM32MP1 SBC based Boards
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||||
items:
|
||||
- const: ultratronik,stm32mp157c-ultra-fly-sbc
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||||
- const: st,stm32mp157
|
||||
|
||||
- description: ST STM32MP257 based Boards
|
||||
items:
|
||||
- enum:
|
||||
|
|
|
|||
|
|
@ -1611,6 +1611,8 @@ patternProperties:
|
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description: Universal Scientific Industrial Co., Ltd.
|
||||
"^usr,.*":
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description: U.S. Robotics Corporation
|
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"^ultratronik,.*":
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description: Ultratronik GmbH
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"^utoo,.*":
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description: Aigo Digital Technology Co., Ltd.
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"^v3,.*":
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||||
|
|
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|||
|
|
@ -24811,6 +24811,12 @@ S: Maintained
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F: drivers/usb/common/ulpi.c
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F: include/linux/ulpi/
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ULTRATRONIK BOARD SUPPORT
|
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M: Goran Rađenović <goran.radni@gmail.com>
|
||||
M: Börge Strümpfel <boerge.struempfel@gmail.com>
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S: Maintained
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F: arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts
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||||
|
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UNICODE SUBSYSTEM
|
||||
M: Gabriel Krisman Bertazi <krisman@kernel.org>
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L: linux-fsdevel@vger.kernel.org
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||||
|
|
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|||
|
|
@ -28,6 +28,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
|
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stm32746g-eval.dtb \
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stm32h743i-eval.dtb \
|
||||
stm32h743i-disco.dtb \
|
||||
stm32h747i-disco.dtb \
|
||||
stm32h750i-art-pi.dtb \
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||||
stm32mp133c-prihmb.dtb \
|
||||
stm32mp135f-dhcor-dhsbc.dtb \
|
||||
|
|
@ -70,7 +71,8 @@ dtb-$(CONFIG_ARCH_STM32) += \
|
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stm32mp157c-lxa-tac-gen2.dtb \
|
||||
stm32mp157c-odyssey.dtb \
|
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stm32mp157c-osd32mp1-red.dtb \
|
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stm32mp157c-phycore-stm32mp1-3.dtb
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stm32mp157c-phycore-stm32mp1-3.dtb \
|
||||
stm32mp157c-ultra-fly-sbc.dtb
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dtb-$(CONFIG_ARCH_U8500) += \
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ste-snowball.dtb \
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||||
ste-hrefprev60-stuib.dtb \
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||||
|
|
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|||
|
|
@ -43,6 +43,7 @@
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#include "../armv7-m.dtsi"
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#include <dt-bindings/clock/stm32fx-clock.h>
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#include <dt-bindings/mfd/stm32f7-rcc.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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#address-cells = <1>;
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@ -245,6 +246,39 @@ pwm {
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};
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};
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lptimer1: timer@40002400 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32-lptimer";
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reg = <0x40002400 0x400>;
|
||||
interrupts-extended = <&exti 23 IRQ_TYPE_EDGE_RISING>;
|
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clocks = <&rcc 1 CLK_LPTIMER>;
|
||||
clock-names = "mux";
|
||||
status = "disabled";
|
||||
|
||||
pwm {
|
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compatible = "st,stm32-pwm-lp";
|
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#pwm-cells = <3>;
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status = "disabled";
|
||||
};
|
||||
|
||||
trigger@0 {
|
||||
compatible = "st,stm32-lptimer-trigger";
|
||||
reg = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
counter {
|
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compatible = "st,stm32-lptimer-counter";
|
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status = "disabled";
|
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};
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timer {
|
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compatible = "st,stm32-lptimer-timer";
|
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status = "disabled";
|
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};
|
||||
};
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rtc: rtc@40002800 {
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compatible = "st,stm32-rtc";
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reg = <0x40002800 0x400>;
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|
|
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|||
|
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@ -198,7 +198,7 @@ pins2 {
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|||
};
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||||
};
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uart4_pins: uart4-0 {
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uart4_pins_a: uart4-0 {
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pins1 {
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pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */
|
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bias-disable;
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|
|
@ -211,7 +211,20 @@ pins2 {
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|||
};
|
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};
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usart1_pins: usart1-0 {
|
||||
uart8_pins_a: uart8-0 {
|
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pins1 {
|
||||
pinmux = <STM32_PINMUX('J', 8, AF8)>; /* UART8_TX */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
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pins2 {
|
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pinmux = <STM32_PINMUX('J', 9, AF8)>; /* UART8_RX */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
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|
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usart1_pins_a: usart1-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
|
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bias-disable;
|
||||
|
|
@ -224,7 +237,20 @@ pins2 {
|
|||
};
|
||||
};
|
||||
|
||||
usart2_pins: usart2-0 {
|
||||
usart1_pins_b: usart1-1 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
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slew-rate = <0>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('A', 10, AF7)>; /* USART1_RX */
|
||||
bias-disable;
|
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};
|
||||
};
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|
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usart2_pins_a: usart2-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
|
||||
bias-disable;
|
||||
|
|
@ -237,7 +263,7 @@ pins2 {
|
|||
};
|
||||
};
|
||||
|
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usart3_pins: usart3-0 {
|
||||
usart3_pins_a: usart3-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
|
||||
<STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS_DE */
|
||||
|
|
|
|||
|
|
@ -211,6 +211,14 @@ dac2: dac@2 {
|
|||
};
|
||||
};
|
||||
|
||||
uart8: serial@40007c00 {
|
||||
compatible = "st,stm32h7-uart";
|
||||
reg = <0x40007c00 0x400>;
|
||||
interrupts = <83>;
|
||||
status = "disabled";
|
||||
clocks = <&rcc UART8_CK>;
|
||||
};
|
||||
|
||||
usart1: serial@40011000 {
|
||||
compatible = "st,stm32h7-uart";
|
||||
reg = <0x40011000 0x400>;
|
||||
|
|
|
|||
|
|
@ -105,7 +105,7 @@ &sdmmc1 {
|
|||
};
|
||||
|
||||
&usart2 {
|
||||
pinctrl-0 = <&usart2_pins>;
|
||||
pinctrl-0 = <&usart2_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -145,7 +145,7 @@ &sdmmc1 {
|
|||
};
|
||||
|
||||
&usart1 {
|
||||
pinctrl-0 = <&usart1_pins>;
|
||||
pinctrl-0 = <&usart1_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
136
arch/arm/boot/dts/st/stm32h747i-disco.dts
Normal file
136
arch/arm/boot/dts/st/stm32h747i-disco.dts
Normal file
|
|
@ -0,0 +1,136 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2025 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "stm32h743.dtsi"
|
||||
#include "stm32h7-pinctrl.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "STMicroelectronics STM32H747i-Discovery board";
|
||||
compatible = "st,stm32h747i-disco", "st,stm32h747";
|
||||
|
||||
chosen {
|
||||
bootargs = "root=/dev/ram";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@d0000000 {
|
||||
device_type = "memory";
|
||||
reg = <0xd0000000 0x2000000>;
|
||||
};
|
||||
|
||||
aliases {
|
||||
serial0 = &usart1;
|
||||
serial1 = &uart8;
|
||||
};
|
||||
|
||||
v3v3: regulator-v3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
led-green {
|
||||
gpios = <&gpioi 12 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
led-orange {
|
||||
gpios = <&gpioi 13 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
led-red {
|
||||
gpios = <&gpioi 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
led-blue {
|
||||
gpios = <&gpioi 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
autorepeat;
|
||||
button-0 {
|
||||
label = "User";
|
||||
linux,code = <KEY_WAKEUP>;
|
||||
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
button-1 {
|
||||
label = "JoySel";
|
||||
linux,code = <KEY_ENTER>;
|
||||
gpios = <&gpiok 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
|
||||
};
|
||||
button-2 {
|
||||
label = "JoyDown";
|
||||
linux,code = <KEY_DOWN>;
|
||||
gpios = <&gpiok 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
|
||||
};
|
||||
button-3 {
|
||||
label = "JoyUp";
|
||||
linux,code = <KEY_UP>;
|
||||
gpios = <&gpiok 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
|
||||
};
|
||||
button-4 {
|
||||
label = "JoyLeft";
|
||||
linux,code = <KEY_LEFT>;
|
||||
gpios = <&gpiok 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
|
||||
};
|
||||
button-5 {
|
||||
label = "JoyRight";
|
||||
linux,code = <KEY_RIGHT>;
|
||||
gpios = <&gpiok 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&clk_hse {
|
||||
clock-frequency = <25000000>;
|
||||
};
|
||||
|
||||
&mac {
|
||||
status = "disabled";
|
||||
pinctrl-0 = <ðernet_rmii>;
|
||||
pinctrl-names = "default";
|
||||
phy-mode = "rmii";
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
pinctrl-names = "default", "opendrain", "sleep";
|
||||
pinctrl-0 = <&sdmmc1_b4_pins_a>;
|
||||
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
|
||||
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
|
||||
cd-gpios = <&gpioi 8 GPIO_ACTIVE_LOW>;
|
||||
broken-cd;
|
||||
st,neg-edge;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&v3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usart1 {
|
||||
pinctrl-0 = <&usart1_pins_b>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart8 {
|
||||
pinctrl-0 = <&uart8_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -167,7 +167,7 @@ &sdmmc2 {
|
|||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
brcmf: bcrmf@1 {
|
||||
brcmf: wifi@1 {
|
||||
reg = <1>;
|
||||
compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
|
|
@ -197,14 +197,14 @@ partition@0 {
|
|||
};
|
||||
|
||||
&usart2 {
|
||||
pinctrl-0 = <&usart2_pins>;
|
||||
pinctrl-0 = <&usart2_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usart3_pins>;
|
||||
pinctrl-0 = <&usart3_pins_a>;
|
||||
dmas = <&dmamux1 45 0x400 0x05>,
|
||||
<&dmamux1 46 0x400 0x05>;
|
||||
dma-names = "rx", "tx";
|
||||
|
|
@ -221,7 +221,7 @@ bluetooth {
|
|||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-0 = <&uart4_pins>;
|
||||
pinctrl-0 = <&uart4_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1018,6 +1018,9 @@ part_number_otp: part_number_otp@4 {
|
|||
reg = <0x4 0x2>;
|
||||
bits = <0 12>;
|
||||
};
|
||||
vrefint: vrefin-cal@52 {
|
||||
reg = <0x52 0x2>;
|
||||
};
|
||||
ts_cal1: calib@5c {
|
||||
reg = <0x5c 0x2>;
|
||||
};
|
||||
|
|
@ -1063,6 +1066,8 @@ adc2: adc@0 {
|
|||
interrupts = <0>;
|
||||
dmas = <&dmamux1 10 0x400 0x80000001>;
|
||||
dma-names = "rx";
|
||||
nvmem-cells = <&vrefint>;
|
||||
nvmem-cell-names = "vrefint";
|
||||
status = "disabled";
|
||||
|
||||
channel@13 {
|
||||
|
|
|
|||
|
|
@ -60,6 +60,8 @@ adc1: adc@0 {
|
|||
interrupts = <0>;
|
||||
dmas = <&dmamux1 9 0x400 0x80000001>;
|
||||
dma-names = "rx";
|
||||
nvmem-cells = <&vrefint>;
|
||||
nvmem-cell-names = "vrefint";
|
||||
status = "disabled";
|
||||
|
||||
channel@18 {
|
||||
|
|
|
|||
|
|
@ -421,7 +421,7 @@ &sdmmc2 {
|
|||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
brcmf: bcrmf@1 {
|
||||
brcmf: wifi@1 {
|
||||
reg = <1>;
|
||||
compatible = "brcm,bcm4329-fmac";
|
||||
pinctrl-names = "default";
|
||||
|
|
|
|||
|
|
@ -287,7 +287,7 @@ &sdmmc1 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
brcmf: bcrmf@1 { /* muRata 1YN */
|
||||
brcmf: wifi@1 { /* muRata 1YN */
|
||||
reg = <1>;
|
||||
compatible = "infineon,cyw43439-fmac", "brcm,bcm4329-fmac";
|
||||
interrupt-parent = <&gpioe>;
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@ &sdmmc2 {
|
|||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
brcmf: bcrmf@1 {
|
||||
brcmf: wifi@1 {
|
||||
reg = <1>;
|
||||
compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@ &sdmmc2 {
|
|||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
brcmf: bcrmf@1 {
|
||||
brcmf: wifi@1 {
|
||||
reg = <1>;
|
||||
compatible = "brcm,bcm4329-fmac";
|
||||
pinctrl-names = "default";
|
||||
|
|
|
|||
1152
arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts
Normal file
1152
arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts
Normal file
File diff suppressed because it is too large
Load Diff
|
|
@ -435,7 +435,7 @@ &sdmmc3 {
|
|||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
brcmf: bcrmf@1 {
|
||||
brcmf: wifi@1 {
|
||||
reg = <1>;
|
||||
compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@ static const char *const stm32_compat[] __initconst = {
|
|||
"st,stm32f746",
|
||||
"st,stm32f769",
|
||||
"st,stm32h743",
|
||||
"st,stm32h747",
|
||||
"st,stm32h750",
|
||||
"st,stm32mp131",
|
||||
"st,stm32mp133",
|
||||
|
|
|
|||
|
|
@ -82,6 +82,57 @@ pins {
|
|||
};
|
||||
};
|
||||
|
||||
ospi_port1_clk_pins_a: ospi-port1-clk-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('D', 0, AF10)>; /* OSPI1_CLK */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
ospi_port1_clk_sleep_pins_a: ospi-port1-clk-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('D', 0, ANALOG)>; /* OSPI1_CLK */
|
||||
};
|
||||
};
|
||||
|
||||
ospi_port1_cs0_pins_a: ospi-port1-cs0-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('D', 3, AF10)>; /* OSPI_NCS0 */
|
||||
bias-pull-up;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ospi_port1_cs0_sleep_pins_a: ospi-port1-cs0-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('D', 3, ANALOG)>; /* OSPI_NCS0 */
|
||||
};
|
||||
};
|
||||
|
||||
ospi_port1_io03_pins_a: ospi-port1-io03-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('D', 4, AF10)>, /* OSPI_IO0 */
|
||||
<STM32_PINMUX('D', 5, AF10)>, /* OSPI_IO1 */
|
||||
<STM32_PINMUX('D', 6, AF10)>, /* OSPI_IO2 */
|
||||
<STM32_PINMUX('D', 7, AF10)>; /* OSPI_IO3 */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ospi_port1_io03_sleep_pins_a: ospi-port1-io03-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* OSPI_IO0 */
|
||||
<STM32_PINMUX('D', 5, ANALOG)>, /* OSPI_IO1 */
|
||||
<STM32_PINMUX('D', 6, ANALOG)>, /* OSPI_IO2 */
|
||||
<STM32_PINMUX('D', 7, ANALOG)>; /* OSPI_IO3 */
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
|
||||
|
|
|
|||
|
|
@ -230,6 +230,60 @@ hpdma3: dma-controller@40420000 {
|
|||
#dma-cells = <3>;
|
||||
};
|
||||
|
||||
ommanager: ommanager@40500000 {
|
||||
compatible = "st,stm32mp25-omm";
|
||||
reg = <0x40500000 0x400>, <0x60000000 0x10000000>;
|
||||
reg-names = "regs", "memory_map";
|
||||
ranges = <0 0 0x40430000 0x400>,
|
||||
<1 0 0x40440000 0x400>;
|
||||
clocks = <&rcc CK_BUS_OSPIIOM>,
|
||||
<&scmi_clk CK_SCMI_OSPI1>,
|
||||
<&scmi_clk CK_SCMI_OSPI2>;
|
||||
clock-names = "omm", "ospi1", "ospi2";
|
||||
resets = <&rcc OSPIIOM_R>,
|
||||
<&scmi_reset RST_SCMI_OSPI1>,
|
||||
<&scmi_reset RST_SCMI_OSPI2>;
|
||||
reset-names = "omm", "ospi1", "ospi2";
|
||||
access-controllers = <&rifsc 111>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
st,syscfg-amcr = <&syscfg 0x2c00 0x7>;
|
||||
status = "disabled";
|
||||
|
||||
ospi1: spi@0 {
|
||||
compatible = "st,stm32mp25-ospi";
|
||||
reg = <0 0 0x400>;
|
||||
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&hpdma 2 0x62 0x3121>,
|
||||
<&hpdma 2 0x42 0x3112>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&scmi_clk CK_SCMI_OSPI1>;
|
||||
resets = <&scmi_reset RST_SCMI_OSPI1>,
|
||||
<&scmi_reset RST_SCMI_OSPI1DLL>;
|
||||
access-controllers = <&rifsc 74>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
st,syscfg-dlyb = <&syscfg 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ospi2: spi@1 {
|
||||
compatible = "st,stm32mp25-ospi";
|
||||
reg = <1 0 0x400>;
|
||||
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&hpdma 3 0x62 0x3121>,
|
||||
<&hpdma 3 0x42 0x3112>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&scmi_clk CK_SCMI_OSPI2>;
|
||||
resets = <&scmi_reset RST_SCMI_OSPI2>,
|
||||
<&scmi_reset RST_SCMI_OSPI2DLL>;
|
||||
access-controllers = <&rifsc 75>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
st,syscfg-dlyb = <&syscfg 0x1400>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
rifsc: bus@42080000 {
|
||||
compatible = "st,stm32mp25-rifsc", "simple-bus";
|
||||
reg = <0x42080000 0x1000>;
|
||||
|
|
@ -238,6 +292,78 @@ rifsc: bus@42080000 {
|
|||
#access-controller-cells = <1>;
|
||||
ranges;
|
||||
|
||||
lptimer1: timer@40090000 {
|
||||
compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";
|
||||
reg = <0x40090000 0x400>;
|
||||
interrupts-extended = <&exti1 47 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc CK_KER_LPTIM1>;
|
||||
clock-names = "mux";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
access-controllers = <&rifsc 17>;
|
||||
power-domains = <&RET_PD>;
|
||||
wakeup-source;
|
||||
status = "disabled";
|
||||
|
||||
counter {
|
||||
compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm {
|
||||
compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
trigger@0 {
|
||||
compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";
|
||||
reg = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
lptimer2: timer@400a0000 {
|
||||
compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";
|
||||
reg = <0x400a0000 0x400>;
|
||||
interrupts-extended = <&exti1 48 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc CK_KER_LPTIM2>;
|
||||
clock-names = "mux";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
access-controllers = <&rifsc 18>;
|
||||
power-domains = <&RET_PD>;
|
||||
wakeup-source;
|
||||
status = "disabled";
|
||||
|
||||
counter {
|
||||
compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm {
|
||||
compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
trigger@1 {
|
||||
compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";
|
||||
reg = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
i2s2: audio-controller@400b0000 {
|
||||
compatible = "st,stm32mp25-i2s";
|
||||
reg = <0x400b0000 0x400>;
|
||||
|
|
@ -799,6 +925,111 @@ i2c8: i2c@46040000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
lptimer3: timer@46050000 {
|
||||
compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";
|
||||
reg = <0x46050000 0x400>;
|
||||
interrupts-extended = <&exti2 29 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc CK_KER_LPTIM3>;
|
||||
clock-names = "mux";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
access-controllers = <&rifsc 19>;
|
||||
wakeup-source;
|
||||
status = "disabled";
|
||||
|
||||
counter {
|
||||
compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm {
|
||||
compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
trigger@2 {
|
||||
compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";
|
||||
reg = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
lptimer4: timer@46060000 {
|
||||
compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";
|
||||
reg = <0x46060000 0x400>;
|
||||
interrupts-extended = <&exti2 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc CK_KER_LPTIM4>;
|
||||
clock-names = "mux";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
access-controllers = <&rifsc 20>;
|
||||
wakeup-source;
|
||||
status = "disabled";
|
||||
|
||||
counter {
|
||||
compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm {
|
||||
compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
trigger@3 {
|
||||
compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";
|
||||
reg = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
lptimer5: timer@46070000 {
|
||||
compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";
|
||||
reg = <0x46070000 0x400>;
|
||||
interrupts-extended = <&exti2 31 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc CK_KER_LPTIM5>;
|
||||
clock-names = "mux";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
access-controllers = <&rifsc 21>;
|
||||
wakeup-source;
|
||||
status = "disabled";
|
||||
|
||||
counter {
|
||||
compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm {
|
||||
compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
trigger@4 {
|
||||
compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";
|
||||
reg = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
csi: csi@48020000 {
|
||||
compatible = "st,stm32mp25-csi";
|
||||
reg = <0x48020000 0x2000>;
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ fw@80000000 {
|
|||
reg = <0x0 0x80000000 0x0 0x4000000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mm_ospi1: mm-ospi@60000000 {
|
||||
reg = <0x0 0x60000000 0x0 0x10000000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -190,6 +195,41 @@ &i2c8 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
&ommanager {
|
||||
memory-region = <&mm_ospi1>;
|
||||
pinctrl-0 = <&ospi_port1_clk_pins_a
|
||||
&ospi_port1_io03_pins_a
|
||||
&ospi_port1_cs0_pins_a>;
|
||||
pinctrl-1 = <&ospi_port1_clk_sleep_pins_a
|
||||
&ospi_port1_io03_sleep_pins_a
|
||||
&ospi_port1_cs0_sleep_pins_a>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
status = "okay";
|
||||
|
||||
spi@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
memory-region = <&mm_ospi1>;
|
||||
status = "okay";
|
||||
|
||||
flash0: flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* use LPTIMER with tick broadcast for suspend mode */
|
||||
&lptimer3 {
|
||||
status = "okay";
|
||||
timer {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -777,6 +777,7 @@ CONFIG_MFD_TI_LP873X=m
|
|||
CONFIG_MFD_TPS65219=y
|
||||
CONFIG_MFD_TPS6594_I2C=m
|
||||
CONFIG_MFD_ROHM_BD718XX=y
|
||||
CONFIG_MFD_STM32_LPTIMER=m
|
||||
CONFIG_MFD_WCD934X=m
|
||||
CONFIG_MFD_KHADAS_MCU=m
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
|
|
@ -1414,6 +1415,7 @@ CONFIG_CLK_RENESAS_VBATTB=m
|
|||
CONFIG_HWSPINLOCK=y
|
||||
CONFIG_HWSPINLOCK_QCOM=y
|
||||
CONFIG_TEGRA186_TIMER=y
|
||||
CONFIG_CLKSRC_STM32_LP=y
|
||||
CONFIG_RENESAS_OSTM=y
|
||||
CONFIG_ARM_MHU=y
|
||||
CONFIG_IMX_MBOX=y
|
||||
|
|
|
|||
|
|
@ -126,8 +126,8 @@
|
|||
#define ADC3_CK 128
|
||||
#define DSI_CK 129
|
||||
#define LTDC_CK 130
|
||||
#define USART8_CK 131
|
||||
#define USART7_CK 132
|
||||
#define UART8_CK 131
|
||||
#define UART7_CK 132
|
||||
#define HDMICEC_CK 133
|
||||
#define I2C3_CK 134
|
||||
#define I2C2_CK 135
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user