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Qualcomm Arm64 DeviceTree updates for v6.16

Browse Source 
The Snapdragon X Plus platform and related reference device is
 introduced. Devicetree for the Xiaomi Redmi Note 8 is added.
 
 Tsens and thermal zones are added for IPQ5332 and IPQ5424. IPQ6018 gains
 1.2GHz and 1.5GHz CPU frequencies. The IPQ5424 gains MMC, LEDs and
 buttons, while the IPQ9574 gains NSS clock controller and SPI NAND
 support.
 
 IPQ6018 SMEM is transitioned to be described directly in the
 reserved-memory node.
 
 Display and GPU are enabled in the QCM6490-based Fairphone FP5. On
 QCS6490 Rb3Gen2 ADC channels for thermal profiling are added and
 Bluetooth is enabled. The USB Type-C orientation GPIO is added on the
 QCS6490 Rb3Gen2 and the vision mezzanine is described.
 The Fairphone FP5 gains touchscreen and USB Type-C display support, and
 the QCM6490 IDP board gains a required listed of protected clocks.
 
 The camera subsystem in SC7280 is described and UFS is transitioned to
 use operating points.
 
 On MSM8916, MSM8919 and MSM8939, and devices on these platforms, the
 UART pinctrl state is cleaned up.
 
 The MSM8953 platform gains another UART and interconnects.
 
 On SA8775P CTCU and ETR nodes are added, and the CPUfreq throttling
 interrupts are added.
 
 Samsung Galaxy S9 SM-G9600 gains a description of the MAX77705 used for
 charging, fuel gauge, haptic, and LED, as well as the PMIC used for
 display and touchscreen, which then is used to enable the touchscreen.
 
 The LPG/PWM node is added to PM8937 and Xiaomi Redmi 5A gains display
 backlight control.
 
 Display and GPU are enabled for the Nothing Phone (1).
 
 QCS615 platform gains command DB definition.
 
 The QCS8300 platform gains description of more QUP instances, CPUfreq,
 PCIe SMMU and the SPMI controller.
 
 On SAR2130P PCIe EP device nodes are added.
 
 On SDM630 missing resets are added for SDCC. Then on Fairphone FP3 modem
 is enabled, and firmware-path are defined on ADSP and WCNSS.
 
 The SDM845 RB3/DragonBoard845c and the QRB5165 RB5 has the sensors DSP
 enabled, and the vision mezzanine on both gets their CMA configuration
 cleaned up. Xiaomi Pocophone F1 gains touchscreen support.
 
 On the SM7325 Nothing Phone (1), display, GPU, and camera EEPROMs are
 described.
 
 On SM8450 the PCIe endpoint controller is described.
 
 For SM8550 OPP tables are described for PCIe and QUP. SM8750 gains RPMh
 sleep stats.
 
 SM8650 gians OSM L3 scaling and variety of OPP tables and missing
 interconnect definitions. The thermal trip points for CPU cores and GPU
 are raised in reliance on hardware throttling.
 SM8650 is also transitioned to per-CPU interrupt partitions, in order to
 properly describe the PMU interrupts. Missing Coresight ETE instances
 are added.
 
 On SM8750 the cluster idle states are corrected, then audio and compute
 DSPs are introduced, together with the crypto and rng blocks. Modem
 support is added and enabled on MTP and QRD devices.
 
 On SC8280XP overlays are introduced for those running Linux at EL2 on
 these devices. A few more temp-alarm instances are added for the PMICs.
 
 On the X Elite platform GPU cooling and watchdog is introduced, together
 with a number of smaller fixes. Dell XPS13 gains support for USB Type-C
 display, the QCP gains WiFi/BT power sequence, and a few devices learns
 about HBR3. The RTC support is enabled and regulators that are feeding
 resources that should be always on is marked as such on a variety of
 boards.
 The Lenovo Thinkpad T14s DeviceTree is split in two, in order to
 describe the LCD and OLED variants.
 
 Missing properties for the crypto BAM is introduced on a variety of
 platforms, taking care of a long standing error message in the kernel
 log during boot.
 
 DSI phy clock ids are transitioned to use identifiers from the PHY
 header file and VBIF region size is corrected, across a large number of
 platforms.
 
 A couple of DWC3 quirks are added across a lot of platforms.
 
 The arm32-for-6.15 pull request was accidentally merged into the
 arm64-for-6.16 branch and this wasn't discovered until a significant
 number of commits would have to be rebased. As such this is kept here as
 well.
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Merge tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm Arm64 DeviceTree updates for v6.16

The Snapdragon X Plus platform and related reference device is
introduced. Devicetree for the Xiaomi Redmi Note 8 is added.

Tsens and thermal zones are added for IPQ5332 and IPQ5424. IPQ6018 gains
1.2GHz and 1.5GHz CPU frequencies. The IPQ5424 gains MMC, LEDs and
buttons, while the IPQ9574 gains NSS clock controller and SPI NAND
support.

IPQ6018 SMEM is transitioned to be described directly in the
reserved-memory node.

Display and GPU are enabled in the QCM6490-based Fairphone FP5. On
QCS6490 Rb3Gen2 ADC channels for thermal profiling are added and
Bluetooth is enabled. The USB Type-C orientation GPIO is added on the
QCS6490 Rb3Gen2 and the vision mezzanine is described.
The Fairphone FP5 gains touchscreen and USB Type-C display support, and
the QCM6490 IDP board gains a required listed of protected clocks.

The camera subsystem in SC7280 is described and UFS is transitioned to
use operating points.

On MSM8916, MSM8919 and MSM8939, and devices on these platforms, the
UART pinctrl state is cleaned up.

The MSM8953 platform gains another UART and interconnects.

On SA8775P CTCU and ETR nodes are added, and the CPUfreq throttling
interrupts are added.

Samsung Galaxy S9 SM-G9600 gains a description of the MAX77705 used for
charging, fuel gauge, haptic, and LED, as well as the PMIC used for
display and touchscreen, which then is used to enable the touchscreen.

The LPG/PWM node is added to PM8937 and Xiaomi Redmi 5A gains display
backlight control.

Display and GPU are enabled for the Nothing Phone (1).

QCS615 platform gains command DB definition.

The QCS8300 platform gains description of more QUP instances, CPUfreq,
PCIe SMMU and the SPMI controller.

On SAR2130P PCIe EP device nodes are added.

On SDM630 missing resets are added for SDCC. Then on Fairphone FP3 modem
is enabled, and firmware-path are defined on ADSP and WCNSS.

The SDM845 RB3/DragonBoard845c and the QRB5165 RB5 has the sensors DSP
enabled, and the vision mezzanine on both gets their CMA configuration
cleaned up. Xiaomi Pocophone F1 gains touchscreen support.

On the SM7325 Nothing Phone (1), display, GPU, and camera EEPROMs are
described.

On SM8450 the PCIe endpoint controller is described.

For SM8550 OPP tables are described for PCIe and QUP. SM8750 gains RPMh
sleep stats.

SM8650 gians OSM L3 scaling and variety of OPP tables and missing
interconnect definitions. The thermal trip points for CPU cores and GPU
are raised in reliance on hardware throttling.
SM8650 is also transitioned to per-CPU interrupt partitions, in order to
properly describe the PMU interrupts. Missing Coresight ETE instances
are added.

On SM8750 the cluster idle states are corrected, then audio and compute
DSPs are introduced, together with the crypto and rng blocks. Modem
support is added and enabled on MTP and QRD devices.

On SC8280XP overlays are introduced for those running Linux at EL2 on
these devices. A few more temp-alarm instances are added for the PMICs.

On the X Elite platform GPU cooling and watchdog is introduced, together
with a number of smaller fixes. Dell XPS13 gains support for USB Type-C
display, the QCP gains WiFi/BT power sequence, and a few devices learns
about HBR3. The RTC support is enabled and regulators that are feeding
resources that should be always on is marked as such on a variety of
boards.
The Lenovo Thinkpad T14s DeviceTree is split in two, in order to
describe the LCD and OLED variants.

Missing properties for the crypto BAM is introduced on a variety of
platforms, taking care of a long standing error message in the kernel
log during boot.

DSI phy clock ids are transitioned to use identifiers from the PHY
header file and VBIF region size is corrected, across a large number of
platforms.

A couple of DWC3 quirks are added across a lot of platforms.

The arm32-for-6.15 pull request was accidentally merged into the
arm64-for-6.16 branch and this wasn't discovered until a significant
number of commits would have to be rebased. As such this is kept here as
well.

* tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (308 commits)
  arm64: dts: qcom: sdm845-xiaomi-beryllium-ebbg: introduce touchscreen support
  arm64: dts: qcom: sdm845-xiaomi-beryllium-tianma: introduce touchscreen support
  arm64: dts: qcom: sdm845-xiaomi-beryllium-common: add touchscreen related nodes
  arm64: dts: qcom: qcs8300: add the pcie smmu node
  arm64: dts: qcom: x1e80100-*: Drop useless DP3 compatible override
  arm64: dts: qcom: msm8953: Add interconnects
  arm64: dts: qcom: msm8953: Add uart_5
  arm64: dts: qcom: sm8350: Use q6asm defines for reg
  arm64: dts: qcom: sm7325-nothing-spacewar: Use q6asm defines for reg
  arm64: dts: qcom: sdm850*: Use q6asm defines for reg
  arm64: dts: qcom: sdm845*: Use q6asm defines for reg
  arm64: dts: qcom: sc7280: Use q6asm defines for reg
  arm64: dts: qcom: sc7180-acer-aspire1: Use q6asm defines for reg
  arm64: dts: qcom: qrb5165-rb5: Use q6asm defines for reg
  arm64: dts: qcom: msm8996*: Use q6asm defines for reg
  arm64: dts: qcom: msm8953: Use q6asm defines for reg
  arm64: dts: qcom: msm8916-modem-qdsp6: Use q6asm defines for reg
  arm64: dts: qcom: apq8096-db820c: Use q6asm defines for reg
  arm64: dts: qcom: qcm6490-fairphone-fp5: Hook up DisplayPort over USB-C
  arm64: dts: qcom: qcm6490-fairphone-fp5: Add OCP96011 audio switch
  ...

Link: https://lore.kernel.org/r/20250511235241.15192-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-05-21 23:41:02 +02:00
commit 12a75f2d9f
178 changed files with 14081 additions and 4873 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
Documentation/devicetree/bindings/arm/qcom.yaml
View File

@ -90,6 +90,7 @@ description: |
sm6350
sm6375
sm7125
sm7150
sm7225
sm7325
sm8150
@ -1020,6 +1021,7 @@ properties:
- items:
- enum:
- sony,pdx201
- xiaomi,ginkgo
- xiaomi,laurel-sprout
- const: qcom,sm6125
@ -1039,6 +1041,11 @@ properties:
- xiaomi,joyeuse
- const: qcom,sm7125
- items:
- enum:
- google,sunfish
- const: qcom,sm7150
- items:
- enum:
- fairphone,fp4
@ -1123,13 +1130,16 @@ properties:
- items:
- enum:
- lenovo,thinkpad-t14s
- lenovo,thinkpad-t14s-lcd
- lenovo,thinkpad-t14s-oled
- const: lenovo,thinkpad-t14s
- const: qcom,x1e78100
- const: qcom,x1e80100
- items:
- enum:
- asus,vivobook-s15
- asus,zenbook-a14-ux3407ra
- dell,xps13-9345
- hp,omnibook-x14
- lenovo,yoga-slim7x
@ -1141,6 +1151,7 @@ properties:
- items:
- enum:
- asus,zenbook-a14-ux3407qa
- qcom,x1p42100-crd
- const: qcom,x1p42100

1
arch/arm/boot/dts/qcom/Makefile
View File

@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8064-ifc6410.dtb \
qcom-apq8064-sony-xperia-lagan-yuga.dtb \
qcom-apq8064-asus-nexus7-flo.dtb \
qcom-apq8064-lg-nexus4-mako.dtb \
qcom-apq8074-dragonboard.dtb \
qcom-apq8084-ifc6540.dtb \
qcom-apq8084-mtp.dtb \

11
arch/arm/boot/dts/qcom/msm8926.dtsi Normal file
View File

@ -0,0 +1,11 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2025, Luca Weiss <luca@lucaweiss.eu>
*/
#include "qcom-msm8226.dtsi"
&modem {
compatible = "qcom,msm8926-mss-pil";
/delete-property/ qcom,ext-bhs-reg;
};

1
arch/arm/boot/dts/qcom/qcom-apq8026-samsung-matisse-wifi.dts
View File

@ -5,6 +5,7 @@
/dts-v1/;
#include "qcom-msm8226.dtsi"
#include "qcom-msm8226-samsung-matisse-common.dtsi"
/ {

2
arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts
View File

@ -12,6 +12,8 @@
#include "pm8226.dtsi"
/delete-node/ &adsp_region;
/delete-node/ &mba_region;
/delete-node/ &mpss_region;
/delete-node/ &smem_region;
/ {

341
arch/arm/boot/dts/qcom/qcom-apq8064-lg-nexus4-mako.dts Normal file
View File

@ -0,0 +1,341 @@
// SPDX-License-Identifier: GPL-2.0-only
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/mfd/qcom-rpm.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include "qcom-apq8064-v2.0.dtsi"
#include "pm8821.dtsi"
#include "pm8921.dtsi"
/ {
model = "LG Nexus 4 (mako)";
compatible = "lg,nexus4-mako", "qcom,apq8064";
chassis-type = "handset";
aliases {
serial0 = &gsbi7_serial;
serial1 = &gsbi6_serial;
serial2 = &gsbi4_serial;
};
chosen {
stdout-path = "serial2:115200n8";
};
battery_cell: battery-cell {
compatible = "simple-battery";
constant-charge-current-max-microamp = <900000>;
operating-range-celsius = <0 45>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
ramoops@88d00000{
compatible = "ramoops";
reg = <0x88d00000 0x100000>;
record-size = <0x20000>;
console-size = <0x20000>;
ftrace-size = <0x20000>;
};
};
};
&gsbi1 {
qcom,mode = <GSBI_PROT_I2C>;
status = "okay";
};
&gsbi1_i2c {
clock-frequency = <200000>;
status = "okay";
};
&gsbi4 {
qcom,mode = <GSBI_PROT_I2C_UART>;
status = "okay";
};
&gsbi4_serial {
status = "okay";
};
&pm8821 {
interrupts-extended = <&tlmm_pinmux 76 IRQ_TYPE_LEVEL_LOW>;
};
&pm8921 {
interrupts-extended = <&tlmm_pinmux 74 IRQ_TYPE_LEVEL_LOW>;
};
&pm8921_keypad {
linux,keymap = <
MATRIX_KEY(0, 0, KEY_VOLUMEDOWN)
MATRIX_KEY(0, 1, KEY_VOLUMEUP)
>;
keypad,num-rows = <1>;
keypad,num-columns = <5>;
status = "okay";
};
&rpm {
regulators {
compatible = "qcom,rpm-pm8921-regulators";
vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
vdd_l24-supply = <&pm8921_s1>;
vdd_l25-supply = <&pm8921_s1>;
vdd_l26-supply = <&pm8921_s7>;
vdd_l27-supply = <&pm8921_s7>;
vdd_l28-supply = <&pm8921_s7>;
vin_lvs1_3_6-supply = <&pm8921_s4>;
vin_lvs2-supply = <&pm8921_s1>;
vin_lvs4_5_7-supply = <&pm8921_s4>;
pm8921_l1: l1 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
bias-pull-down;
};
/* mipi_dsi.1-dsi1_pll_vdda */
pm8921_l2: l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
bias-pull-down;
};
/* msm_otg-HSUSB_3p3 */
pm8921_l3: l3 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3500000>;
bias-pull-down;
};
/* msm_otg-HSUSB_1p8 */
pm8921_l4: l4 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
/* msm_sdcc.1-sdc_vdd */
pm8921_l5: l5 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
bias-pull-down;
};
/* earjack_debug */
pm8921_l6: l6 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
bias-pull-down;
};
/* mipi_dsi.1-dsi_vci */
pm8921_l8: l8 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3000000>;
bias-pull-down;
};
/* wcnss_wlan.0-iris_vddpa */
pm8921_l10: l10 {
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
bias-pull-down;
};
/* mipi_dsi.1-dsi1_avdd */
pm8921_l11: l11 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
bias-pull-down;
};
/* touch_vdd */
pm8921_l15: l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
bias-pull-down;
};
/* slimport_dvdd */
pm8921_l18: l18 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
bias-pull-down;
};
/* touch_io */
pm8921_l22: l22 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
bias-pull-down;
};
/*
* mipi_dsi.1-dsi_vddio
* pil_qdsp6v4.1-pll_vdd
* pil_qdsp6v4.2-pll_vdd
* msm_ehci_host.0-HSUSB_1p8
* msm_ehci_host.1-HSUSB_1p8
*/
pm8921_l23: l23 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
bias-pull-down;
};
/*
* tabla2x-slim-CDC_VDDA_A_1P2V
* tabla2x-slim-VDDD_CDC_D
*/
pm8921_l24: l24 {
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1150000>;
bias-pull-down;
};
pm8921_l25: l25 {
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
bias-pull-down;
};
pm8921_l26: l26 {
regulator-min-microvolt = <375000>;
regulator-max-microvolt = <1050000>;
regulator-always-on;
bias-pull-down;
};
pm8921_l27: l27 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
pm8921_l28: l28 {
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
bias-pull-down;
};
/* wcnss_wlan.0-iris_vddio */
pm8921_lvs1: lvs1 {
bias-pull-down;
};
/* wcnss_wlan.0-iris_vdddig */
pm8921_lvs2: lvs2 {
bias-pull-down;
};
pm8921_lvs3: lvs3 {
bias-pull-down;
};
pm8921_lvs4: lvs4 {
bias-pull-down;
};
pm8921_lvs5: lvs5 {
bias-pull-down;
};
/* mipi_dsi.1-dsi_iovcc */
pm8921_lvs6: lvs6 {
bias-pull-down;
};
/*
* pil_riva-pll_vdd
* lvds.0-lvds_vdda
* mipi_dsi.1-dsi1_vddio
* hdmi_msm.0-hdmi_vdda
*/
pm8921_lvs7: lvs7 {
bias-pull-down;
};
pm8921_ncp: ncp {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,switch-mode-frequency = <1600000>;
};
/* Buck SMPS */
pm8921_s1: s1 {
regulator-always-on;
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
qcom,switch-mode-frequency = <3200000>;
bias-pull-down;
};
pm8921_s2: s2 {
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1300000>;
qcom,switch-mode-frequency = <1600000>;
bias-pull-down;
};
/* msm otg HSUSB_VDDCX */
pm8921_s3: s3 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1150000>;
qcom,switch-mode-frequency = <4800000>;
bias-pull-down;
};
/*
* msm_sdcc.1-sdc-vdd_io
* tabla2x-slim-CDC_VDDA_RX
* tabla2x-slim-CDC_VDDA_TX
* tabla2x-slim-CDC_VDD_CP
* tabla2x-slim-VDDIO_CDC
*/
pm8921_s4: s4 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,switch-mode-frequency = <1600000>;
bias-pull-down;
qcom,force-mode = <QCOM_RPM_FORCE_MODE_AUTO>;
};
/*
* supply vdd_l26, vdd_l27, vdd_l28
*/
pm8921_s7: s7 {
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1300000>;
qcom,switch-mode-frequency = <3200000>;
};
pm8921_s8: s8 {
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <2200000>;
qcom,switch-mode-frequency = <1600000>;
};
};
};
/* eMMC */
&sdcc1 {
vmmc-supply = <&pm8921_l5>;
vqmmc-supply = <&pm8921_s4>;
status = "okay";
};

4
arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts
View File

@ -149,7 +149,7 @@ &mdss {
};
&pm8941_gpios {
msm_keys_default: pm8941-gpio-keys-state {
msm_keys_default: pm8941-gpio-keys-state {
pins = "gpio5", "gpio23";
function = "normal";
input-enable;
@ -157,7 +157,7 @@ msm_keys_default: pm8941-gpio-keys-state {
bias-pull-up;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
power-source = <PM8941_GPIO_S3>; /* 1.8V */
};
};
};
&pm8941_lpg {

2
arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi
View File

@ -251,7 +251,7 @@ &wifi1 {
status = "okay";
nvmem-cell-names = "pre-calibration";
nvmem-cells = <&precal_art_5000>;
qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
qcom,calibration-variant = "ALFA-Network-AP120C-AC";
};
&usb3_hs_phy {

4
arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts
View File

@ -179,13 +179,13 @@ &mdio {
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "8devices-Jalapeno";
qcom,calibration-variant = "8devices-Jalapeno";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "8devices-Jalapeno";
qcom,calibration-variant = "8devices-Jalapeno";
};
&usb3_ss_phy {

2
arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi
View File

@ -43,7 +43,7 @@ nand_pins: nand-state {
"gpio64", "gpio65", "gpio66",
"gpio67", "gpio68", "gpio69";
function = "qpic";
};
};
};
serial@78af000 {

2
arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi
View File

@ -126,7 +126,7 @@ opp-500000000 {
opp-716000000 {
opp-hz = /bits/ 64 <716000000>;
clock-latency-ns = <256000>;
};
};
};
memory {

6
arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi
View File

@ -8,7 +8,11 @@
* Copyright (c) 2023, Rayyan Ansari <rayyan@ansari.sh>
*/
#include "qcom-msm8226.dtsi"
/*
* The .dts should first include qcom-msm8226.dtsi or msm8926.dtsi depending on
* the SoC on the given device.
*/
#include "pm8226.dtsi"
#include <dt-bindings/input/input.h>

1
arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-dempsey.dts
View File

@ -8,6 +8,7 @@
/dts-v1/;
#include "qcom-msm8226.dtsi"
#include "qcom-msm8226-microsoft-common.dtsi"
/ {

1
arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-makepeace.dts
View File

@ -8,6 +8,7 @@
/dts-v1/;
#include "qcom-msm8226.dtsi"
#include "qcom-msm8226-microsoft-common.dtsi"
/ {

1
arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-moneypenny.dts
View File

@ -8,6 +8,7 @@
/dts-v1/;
#include "qcom-msm8226.dtsi"
#include "qcom-msm8226-microsoft-common.dtsi"
/* This device has no magnetometer */

19
arch/arm/boot/dts/qcom/qcom-msm8226-samsung-matisse-common.dtsi
View File

@ -3,11 +3,17 @@
* Copyright (c) 2022, Matti Lehtimäki <matti.lehtimaki@gmail.com>
*/
/*
* The .dts should first include qcom-msm8226.dtsi or msm8926.dtsi depending on
* the SoC on the given device.
*/
#include <dt-bindings/input/input.h>
#include "qcom-msm8226.dtsi"
#include "pm8226.dtsi"
/delete-node/ &adsp_region;
/delete-node/ &mba_region;
/delete-node/ &mpss_region;
/delete-node/ &smem_region;
/ {
@ -145,12 +151,12 @@ framebuffer@3200000 {
no-map;
};
mpss@8400000 {
mpss_region: mpss@8400000 {
reg = <0x08400000 0x1f00000>;
no-map;
};
mba@a300000 {
mba_region: mba@a300000 {
reg = <0x0a300000 0x100000>;
no-map;
};
@ -223,6 +229,13 @@ &blsp1_uart3 {
status = "okay";
};
&modem {
mx-supply = <&pm8226_l3>;
pll-supply = <&pm8226_l8>;
status = "okay";
};
&rpm_requests {
regulators {
compatible = "qcom,rpm-pm8226-regulators";

155
arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
View File

@ -213,6 +213,18 @@ smem_region: smem@3000000 {
no-map;
};
mpss_region: mpss@8000000 {
reg = <0x08000000 0x5100000>;
no-map;
status = "disabled";
};
mba_region: mba@d100000 {
reg = <0x0d100000 0x100000>;
no-map;
status = "disabled";
};
adsp_region: adsp@dc00000 {
reg = <0x0dc00000 0x1900000>;
no-map;
@ -253,6 +265,65 @@ adsp_smp2p_in: slave-kernel {
};
};
smp2p-modem {
compatible = "qcom,smp2p";
qcom,smem = <435>, <428>;
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>;
mboxes = <&apcs 14>;
qcom,local-pid = <0>;
qcom,remote-pid = <1>;
modem_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
#qcom,smem-state-cells = <1>;
};
modem_smp2p_in: slave-kernel {
qcom,entry-name = "slave-kernel";
interrupt-controller;
#interrupt-cells = <2>;
};
};
smsm {
compatible = "qcom,smsm";
#address-cells = <1>;
#size-cells = <0>;
mboxes = <0>, <&apcs 13>, <&apcs 9>, <&apcs 19>;
apps_smsm: apps@0 {
reg = <0>;
#qcom,smem-state-cells = <1>;
};
modem_smsm: modem@1 {
reg = <1>;
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
};
adsp_smsm: adsp@2 {
reg = <2>;
interrupts = <GIC_SPI 157 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
};
wcnss_smsm: wcnss@7 {
reg = <7>;
interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
@ -845,12 +916,96 @@ spmi_bus: spmi@fc4cf000 {
#interrupt-cells = <4>;
};
bam_dmux_dma: dma-controller@fc834000 {
compatible = "qcom,bam-v1.4.0";
reg = <0xfc834000 0x7000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
qcom,ee = <0>;
num-channels = <6>;
qcom,num-ees = <1>;
qcom,powered-remotely;
};
modem: remoteproc@fc880000 {
compatible = "qcom,msm8226-mss-pil";
reg = <0xfc880000 0x4040>,
<0xfc820000 0x10000>;
reg-names = "qdsp6",
"rmb";
interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog",
"fatal",
"ready",
"handover",
"stop-ack";
clocks = <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>,
<&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_BOOT_ROM_AHB_CLK>,
<&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface",
"bus",
"mem",
"xo";
resets = <&gcc GCC_MSS_RESTART>;
reset-names = "mss_restart";
power-domains = <&rpmpd MSM8226_VDDCX>;
power-domain-names = "cx";
qcom,ext-bhs-reg = <&tcsr_regs_1 0x194>;
qcom,halt-regs = <&tcsr_regs_1 0x180 0x200 0x280>;
qcom,smem-states = <&modem_smp2p_out 0>;
qcom,smem-state-names = "stop";
memory-region = <&mba_region>, <&mpss_region>;
status = "disabled";
bam_dmux: bam-dmux {
compatible = "qcom,bam-dmux";
interrupt-parent = <&modem_smsm>;
interrupts = <1 IRQ_TYPE_EDGE_BOTH>, <11 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "pc", "pc-ack";
qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
qcom,smem-state-names = "pc", "pc-ack";
dmas = <&bam_dmux_dma 4>, <&bam_dmux_dma 5>;
dma-names = "tx", "rx";
};
smd-edge {
interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
mboxes = <&apcs 12>;
qcom,smd-edge = <0>;
label = "modem";
};
};
tcsr_mutex: hwlock@fd484000 {
compatible = "qcom,msm8226-tcsr-mutex", "qcom,tcsr-mutex";
reg = <0xfd484000 0x1000>;
#hwlock-cells = <1>;
};
tcsr_regs_1: syscon@fd485000 {
compatible = "qcom,tcsr-msm8226", "syscon";
reg = <0xfd485000 0x1000>;
};
tlmm: pinctrl@fd510000 {
compatible = "qcom,msm8226-pinctrl";
reg = <0xfd510000 0x4000>;

14
arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts
View File

@ -5,10 +5,12 @@
/dts-v1/;
#include "qcom-msm8226.dtsi"
#include "msm8926.dtsi"
#include "pm8226.dtsi"
/delete-node/ &adsp_region;
/delete-node/ &mba_region;
/delete-node/ &mpss_region;
/delete-node/ &smem_region;
/ {
@ -193,6 +195,16 @@ &blsp1_i2c6 {
/* TPS61310 Flash/Torch @ 33 */
};
&modem {
mx-supply = <&pm8226_l3>;
pll-supply = <&pm8226_l8>;
mss-supply = <&pm8226_s5>;
firmware-name = "qcom/msm8926/memul/mba.b00", "qcom/msm8926/memul/modem.mdt";
status = "okay";
};
&pm8226_vib {
status = "okay";
};

1
arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-superman-lte.dts
View File

@ -8,6 +8,7 @@
/dts-v1/;
#include "msm8926.dtsi"
#include "qcom-msm8226-microsoft-common.dtsi"
/* This device has touchscreen on i2c3 instead */

1
arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-tesla.dts
View File

@ -8,6 +8,7 @@
/dts-v1/;
#include "msm8926.dtsi"
#include "qcom-msm8226-microsoft-common.dtsi"
/* This device has touchscreen on i2c1 instead */

2
arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts
View File

@ -2,7 +2,7 @@
/dts-v1/;
#include "qcom-msm8226.dtsi"
#include "msm8926.dtsi"
#include "pm8226.dtsi"
/delete-node/ &smem_region;

5
arch/arm/boot/dts/qcom/qcom-msm8926-samsung-matisselte.dts
View File

@ -6,6 +6,7 @@
/dts-v1/;
#include "msm8926.dtsi"
#include "qcom-msm8226-samsung-matisse-common.dtsi"
/ {
@ -27,6 +28,10 @@ reg_tsp_3p3v: regulator-tsp-3p3v {
};
};
&modem {
mss-supply = <&pm8226_s5>;
};
&tlmm {
tsp_en1_default_state: tsp-en1-default-state {
pins = "gpio32";

99
arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
View File

@ -52,6 +52,48 @@ memory@80000000 {
reg = <0x80000000 0>;
};
thermal-zones {
cpu0-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 0>;
trips {
cpu_alert0: trip0 {
temperature = <60000>;
hysteresis = <10000>;
type = "passive";
};
cpu_crit0: trip1 {
temperature = <95000>;
hysteresis = <10000>;
type = "critical";
};
};
};
cpu1-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 1>;
trips {
cpu_alert1: trip0 {
temperature = <60000>;
hysteresis = <10000>;
type = "passive";
};
cpu_crit1: trip1 {
temperature = <95000>;
hysteresis = <10000>;
type = "critical";
};
};
};
};
cpu-pmu {
compatible = "qcom,krait-pmu";
interrupts = <GIC_PPI 10 0x304>;
@ -115,6 +157,21 @@ timer@200a000 {
cpu-offset = <0x80000>;
};
qfprom: efuse@700000 {
compatible = "qcom,msm8960-qfprom", "qcom,qfprom";
reg = <0x00700000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
tsens_calib: calib@404 {
reg = <0x404 0x10>;
};
tsens_backup: backup-calib@414 {
reg = <0x414 0x10>;
};
};
msmgpio: pinctrl@800000 {
compatible = "qcom,msm8960-pinctrl";
gpio-controller;
@ -127,7 +184,7 @@ msmgpio: pinctrl@800000 {
};
gcc: clock-controller@900000 {
compatible = "qcom,gcc-msm8960";
compatible = "qcom,gcc-msm8960", "syscon";
#clock-cells = <1>;
#reset-cells = <1>;
reg = <0x900000 0x4000>;
@ -135,6 +192,18 @@ gcc: clock-controller@900000 {
<&pxo_board>,
<&lcc PLL4>;
clock-names = "cxo", "pxo", "pll4";
tsens: thermal-sensor {
compatible = "qcom,msm8960-tsens";
nvmem-cells = <&tsens_calib>, <&tsens_backup>;
nvmem-cell-names = "calib", "calib_backup";
interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "uplow";
#qcom,sensors = <5>;
#thermal-sensor-cells = <1>;
};
};
lcc: clock-controller@28000000 {
@ -279,7 +348,7 @@ sdcc3: mmc@12180000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
status = "disabled";
reg = <0x12180000 0x8000>;
reg = <0x12180000 0x2000>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
clock-names = "mclk", "apb_pclk";
@ -289,13 +358,25 @@ sdcc3: mmc@12180000 {
max-frequency = <192000000>;
no-1-8-v;
vmmc-supply = <&vsdcc_fixed>;
dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
dma-names = "tx", "rx";
};
sdcc3bam: dma-controller@12182000 {
compatible = "qcom,bam-v1.3.0";
reg = <0x12182000 0x4000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc SDC3_H_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
};
sdcc1: mmc@12400000 {
status = "disabled";
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
reg = <0x12400000 0x8000>;
reg = <0x12400000 0x2000>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
clock-names = "mclk", "apb_pclk";
@ -305,6 +386,18 @@ sdcc1: mmc@12400000 {
cap-sd-highspeed;
cap-mmc-highspeed;
vmmc-supply = <&vsdcc_fixed>;
dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
dma-names = "tx", "rx";
};
sdcc1bam: dma-controller@12402000 {
compatible = "qcom,bam-v1.3.0";
reg = <0x12402000 0x4000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc SDC1_H_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
};
tcsr: syscon@1a400000 {

57
arch/arm64/boot/dts/qcom/Makefile
View File

@ -116,6 +116,10 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs615-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb
qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vision-mezzanine.dtbo
dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
@ -134,7 +138,8 @@ dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sa8540p-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += sa8775p-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += sa8775p-ride-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-acer-aspire1.dtb
sc7180-acer-aspire1-el2-dtbs := sc7180-acer-aspire1.dtb sc7180-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += sc7180-acer-aspire1.dtb sc7180-acer-aspire1-el2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb
@ -200,11 +205,16 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8180x-lenovo-flex-5g.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8180x-primus.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-huawei-gaokun3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-lenovo-thinkpad-x13s.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-microsoft-arcata.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-microsoft-blackrock.dtb
sc8280xp-crd-el2-dtbs := sc8280xp-crd.dtb sc8280xp-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb sc8280xp-crd-el2.dtb
sc8280xp-huawei-gaokun3-el2-dtbs := sc8280xp-huawei-gaokun3.dtb sc8280xp-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-huawei-gaokun3.dtb sc8280xp-huawei-gaokun3-el2.dtb
sc8280xp-lenovo-thinkpad-x13s-el2-dtbs := sc8280xp-lenovo-thinkpad-x13s.dtb sc8280xp-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-lenovo-thinkpad-x13s.dtb sc8280xp-lenovo-thinkpad-x13s-el2.dtb
sc8280xp-microsoft-arcata-el2-dtbs := sc8280xp-microsoft-arcata.dtb sc8280xp-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-microsoft-arcata.dtb sc8280xp-microsoft-arcata-el2.dtb
sc8280xp-microsoft-blackrock-el2-dtbs := sc8280xp-microsoft-blackrock.dtb sc8280xp-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-microsoft-blackrock.dtb sc8280xp-microsoft-blackrock-el2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm450-lenovo-tbx605f.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm450-motorola-ali.dtb
@ -246,6 +256,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sm4450-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6115-fxtec-pro1x.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6115p-lenovo-j606f.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6125-xiaomi-ginkgo.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6125-xiaomi-laurel-sprout.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6375-sony-xperia-murray-pdx225.dtb
@ -288,13 +299,27 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8650-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8650-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8750-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8750-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e001de-devkit.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e78100-lenovo-thinkpad-t14s.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-asus-vivobook-s15.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-crd.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-dell-xps13-9345.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-hp-omnibook-x14.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-lenovo-yoga-slim7x.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-microsoft-romulus13.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-microsoft-romulus15.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-qcp.dtb
x1e001de-devkit-el2-dtbs := x1e001de-devkit.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e001de-devkit.dtb x1e001de-devkit-el2.dtb
x1e78100-lenovo-thinkpad-t14s-el2-dtbs := x1e78100-lenovo-thinkpad-t14s.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e78100-lenovo-thinkpad-t14s.dtb x1e78100-lenovo-thinkpad-t14s-el2.dtb
x1e78100-lenovo-thinkpad-t14s-oled-el2-dtbs := x1e78100-lenovo-thinkpad-t14s-oled.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e78100-lenovo-thinkpad-t14s-oled.dtb x1e78100-lenovo-thinkpad-t14s-oled-el2.dtb
x1e80100-asus-vivobook-s15-el2-dtbs := x1e80100-asus-vivobook-s15.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-asus-vivobook-s15.dtb x1e80100-asus-vivobook-s15-el2.dtb
x1e80100-crd-el2-dtbs := x1e80100-crd.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-crd.dtb x1e80100-crd-el2.dtb
x1e80100-dell-xps13-9345-el2-dtbs := x1e80100-dell-xps13-9345.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-dell-xps13-9345.dtb x1e80100-dell-xps13-9345-el2.dtb
x1e80100-hp-omnibook-x14-el2-dtbs := x1e80100-hp-omnibook-x14.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-hp-omnibook-x14.dtb x1e80100-hp-omnibook-x14-el2.dtb
x1e80100-lenovo-yoga-slim7x-el2-dtbs := x1e80100-lenovo-yoga-slim7x.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-lenovo-yoga-slim7x.dtb x1e80100-lenovo-yoga-slim7x-el2.dtb
x1e80100-microsoft-romulus13-el2-dtbs := x1e80100-microsoft-romulus13.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-microsoft-romulus13.dtb x1e80100-microsoft-romulus13-el2.dtb
x1e80100-microsoft-romulus15-el2-dtbs := x1e80100-microsoft-romulus15.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-microsoft-romulus15.dtb x1e80100-microsoft-romulus15-el2.dtb
x1e80100-qcp-el2-dtbs := x1e80100-qcp.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-qcp.dtb x1e80100-qcp-el2.dtb
x1p42100-crd-el2-dtbs := x1p42100-crd.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1p42100-crd.dtb x1p42100-crd-el2.dtb

21
arch/arm64/boot/dts/qcom/apq8016-sbc.dts
View File

@ -222,11 +222,17 @@ &blsp_spi5 {
&blsp_uart1 {
status = "okay";
label = "LS-UART0";
pinctrl-0 = <&blsp_uart1_default>;
pinctrl-1 = <&blsp_uart1_sleep>;
pinctrl-names = "default", "sleep";
};
&blsp_uart2 {
status = "okay";
label = "LS-UART1";
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
};
&camss {
@ -591,6 +597,21 @@ &tlmm {
"USR_LED_2_CTRL", /* GPIO 120 */
"SB_HS_ID";
blsp_uart1_default: blsp-uart1-default-state {
/* TX, RX, CTS_N, RTS_N */
pins = "gpio0", "gpio1", "gpio2", "gpio3";
function = "blsp_uart1";
drive-strength = <16>;
bias-disable;
};
blsp_uart1_sleep: blsp-uart1-sleep-state {
pins = "gpio0", "gpio1", "gpio2", "gpio3";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
sdc2_cd_default: sdc2-cd-default-state {
pins = "gpio38";
function = "gpio";

41
arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts
View File

@ -190,11 +190,17 @@ tpm@0 {
};
&blsp_uart1 {
pinctrl-0 = <&blsp_uart1_default>;
pinctrl-1 = <&blsp_uart1_sleep>;
pinctrl-names = "default", "sleep";
label = "UART0";
status = "okay";
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_default>;
pinctrl-1 = <&blsp_uart2_sleep>;
pinctrl-names = "default", "sleep";
label = "UART1";
status = "okay";
};
@ -367,6 +373,37 @@ adv7533_switch_suspend: adv7533-switch-suspend-state {
bias-disable;
};
blsp_uart1_default: blsp-uart1-default-state {
/* TX, RX, CTS_N, RTS_N */
pins = "gpio0", "gpio1", "gpio2", "gpio3";
function = "blsp_uart1";
drive-strength = <16>;
bias-disable;
bootph-all;
};
blsp_uart1_sleep: blsp-uart1-sleep-state {
pins = "gpio0", "gpio1", "gpio2", "gpio3";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
blsp_uart2_default: blsp-uart2-default-state {
/* TX, RX */
pins = "gpio4", "gpio5";
function = "blsp_uart2";
drive-strength = <16>;
bias-disable;
};
blsp_uart2_sleep: blsp-uart2-sleep-state {
pins = "gpio4", "gpio5";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
msm_key_volp_n_default: msm-key-volp-n-default-state {
pins = "gpio107";
function = "gpio";
@ -463,10 +500,6 @@ &blsp_i2c6_default {
drive-strength = <16>;
};
&blsp_uart1_default {
bootph-all;
};
/* Enable CoreSight */
&cti0 { status = "okay"; };
&cti1 { status = "okay"; };

28
arch/arm64/boot/dts/qcom/apq8039-t2.dts
View File

@ -116,18 +116,16 @@ &blsp_i2c5 {
};
&blsp_uart1 {
pinctrl-0 = <&blsp_uart1_default>;
pinctrl-1 = <&blsp_uart1_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};
&blsp_uart1_default {
pins = "gpio0", "gpio1";
};
&blsp_uart1_sleep {
pins = "gpio0", "gpio1";
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};
@ -323,6 +321,20 @@ &tlmm {
"USBC_GPIO7_1V8", /* GPIO_120 */
"NC";
blsp_uart1_default: blsp-uart1-default-state {
pins = "gpio0", "gpio1";
function = "blsp_uart1";
drive-strength = <16>;
bias-disable;
};
blsp_uart1_sleep: blsp-uart1-sleep-state {
pins = "gpio0", "gpio1";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
pinctrl_backlight: backlight-state {
pins = "gpio98";
function = "gpio";

11
arch/arm64/boot/dts/qcom/apq8096-db820c.dts
View File

@ -953,15 +953,15 @@ &sdhc2 {
&q6asmdai {
dai@0 {
reg = <0>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
dai@1 {
reg = <1>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
dai@2 {
reg = <2>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};
@ -1012,10 +1012,7 @@ wcd9335: codec@1,0 {
&sound {
compatible = "qcom,apq8096-sndcard";
model = "DB820c";
audio-routing = "RX_BIAS", "MCLK",
"MM_DL1", "MultiMedia1 Playback",
"MM_DL2", "MultiMedia2 Playback",
"MultiMedia3 Capture", "MM_UL3";
audio-routing = "RX_BIAS", "MCLK";
mm1-dai-link {
link-name = "MultiMedia1";

135
arch/arm64/boot/dts/qcom/ipq5332.dtsi
View File

@ -177,6 +177,46 @@ cpu_speed_bin: cpu-speed-bin@1d {
reg = <0x1d 0x2>;
bits = <7 2>;
};
tsens_sens11_off: s11@3a5 {
reg = <0x3a5 0x1>;
bits = <4 4>;
};
tsens_sens12_off: s12@3a6 {
reg = <0x3a6 0x1>;
bits = <0 4>;
};
tsens_sens13_off: s13@3a6 {
reg = <0x3a6 0x1>;
bits = <4 4>;
};
tsens_sens14_off: s14@3ad {
reg = <0x3ad 0x2>;
bits = <7 4>;
};
tsens_sens15_off: s15@3ae {
reg = <0x3ae 0x1>;
bits = <3 4>;
};
tsens_mode: mode@3e1 {
reg = <0x3e1 0x1>;
bits = <0 3>;
};
tsens_base0: base0@3e1 {
reg = <0x3e1 0x2>;
bits = <3 10>;
};
tsens_base1: base1@3e2 {
reg = <0x3e2 0x2>;
bits = <5 10>;
};
};
rng: rng@e3000 {
@ -186,6 +226,32 @@ rng: rng@e3000 {
clock-names = "core";
};
tsens: thermal-sensor@4a9000 {
compatible = "qcom,ipq5332-tsens";
reg = <0x004a9000 0x1000>,
<0x004a8000 0x1000>;
interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "combined";
nvmem-cells = <&tsens_mode>,
<&tsens_base0>,
<&tsens_base1>,
<&tsens_sens11_off>,
<&tsens_sens12_off>,
<&tsens_sens13_off>,
<&tsens_sens14_off>,
<&tsens_sens15_off>;
nvmem-cell-names = "mode",
"base0",
"base1",
"tsens_sens11_off",
"tsens_sens12_off",
"tsens_sens13_off",
"tsens_sens14_off",
"tsens_sens15_off";
#qcom,sensors = <5>;
#thermal-sensor-cells = <1>;
};
tlmm: pinctrl@1000000 {
compatible = "qcom,ipq5332-tlmm";
reg = <0x01000000 0x300000>;
@ -481,6 +547,75 @@ frame@b128000 {
};
};
thermal-zones {
rfa-0-thermal {
thermal-sensors = <&tsens 11>;
trips {
rfa-0-critical {
temperature = <125000>;
hysteresis = <1000>;
type = "critical";
};
};
};
rfa-1-thermal {
thermal-sensors = <&tsens 12>;
trips {
rfa-1-critical {
temperature = <125000>;
hysteresis = <1000>;
type = "critical";
};
};
};
misc-thermal {
thermal-sensors = <&tsens 13>;
trips {
misc-critical {
temperature = <125000>;
hysteresis = <1000>;
type = "critical";
};
};
};
cpu-top-thermal {
polling-delay-passive = <100>;
thermal-sensors = <&tsens 14>;
trips {
cpu-top-critical {
temperature = <115000>;
hysteresis = <1000>;
type = "critical";
};
cpu-passive {
temperature = <105000>;
hysteresis = <1000>;
type = "passive";
};
};
};
top-glue-thermal {
thermal-sensors = <&tsens 15>;
trips {
top-glue-critical {
temperature = <125000>;
hysteresis = <1000>;
type = "critical";
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

50
arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
View File

@ -7,6 +7,8 @@
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "ipq5424.dtsi"
/ {
@ -17,6 +19,33 @@ aliases {
serial0 = &uart1;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&gpio_keys_default>;
pinctrl-names = "default";
button-wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&gpio_leds_default>;
pinctrl-names = "default";
led-0 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tx";
default-state = "off";
};
};
vreg_misc_3p3: regulator-usb-3p3 {
compatible = "regulator-fixed";
regulator-min-microvolt = <3300000>;
@ -69,6 +98,13 @@ &qusb_phy_1 {
status = "okay";
};
&sdhc {
pinctrl-0 = <&sdc_default_state>;
pinctrl-names = "default";
status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
@ -95,6 +131,20 @@ &ssphy_0 {
};
&tlmm {
gpio_keys_default: gpio-keys-default-state {
pins = "gpio19";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
gpio_leds_default: gpio-leds-default-state {
pins = "gpio42";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
spi0_default_state: spi0-default-state {
clk-pins {
pins = "gpio6";

208
arch/arm64/boot/dts/qcom/ipq5424.dtsi
View File

@ -132,6 +132,11 @@ reserved-memory {
#size-cells = <2>;
ranges;
bootloader@8a200000 {
reg = <0x0 0x8a200000 0x0 0x400000>;
no-map;
};
tz@8a600000 {
reg = <0x0 0x8a600000 0x0 0x200000>;
no-map;
@ -152,6 +157,93 @@ soc@0 {
#size-cells = <2>;
ranges = <0 0 0 0 0x10 0>;
efuse@a4000 {
compatible = "qcom,ipq5424-qfprom", "qcom,qfprom";
reg = <0 0x000a4000 0 0x741>;
#address-cells = <1>;
#size-cells = <1>;
tsens_sens9_off: s9@3dc {
reg = <0x3dc 0x1>;
bits = <4 4>;
};
tsens_sens10_off: s10@3dd {
reg = <0x3dd 0x1>;
bits = <0 4>;
};
tsens_sens11_off: s11@3dd {
reg = <0x3dd 0x1>;
bits = <4 4>;
};
tsens_sens12_off: s12@3de {
reg = <0x3de 0x1>;
bits = <0 4>;
};
tsens_sens13_off: s13@3de {
reg = <0x3de 0x1>;
bits = <4 4>;
};
tsens_sens14_off: s14@3e5 {
reg = <0x3e5 0x2>;
bits = <7 4>;
};
tsens_sens15_off: s15@3e6 {
reg = <0x3e6 0x1>;
bits = <3 4>;
};
tsens_mode: mode@419 {
reg = <0x419 0x1>;
bits = <0 3>;
};
tsens_base0: base0@419 {
reg = <0x419 0x2>;
bits = <3 10>;
};
tsens_base1: base1@41a {
reg = <0x41a 0x2>;
bits = <5 10>;
};
};
tsens: thermal-sensor@4a9000 {
compatible = "qcom,ipq5424-tsens";
reg = <0 0x004a9000 0 0x1000>,
<0 0x004a8000 0 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "combined";
nvmem-cells = <&tsens_mode>,
<&tsens_base0>,
<&tsens_base1>,
<&tsens_sens9_off>,
<&tsens_sens10_off>,
<&tsens_sens11_off>,
<&tsens_sens12_off>,
<&tsens_sens13_off>,
<&tsens_sens14_off>,
<&tsens_sens15_off>;
nvmem-cell-names = "mode",
"base0",
"base1",
"tsens_sens9_off",
"tsens_sens10_off",
"tsens_sens11_off",
"tsens_sens12_off",
"tsens_sens13_off",
"tsens_sens14_off",
"tsens_sens15_off";
#qcom,sensors = <7>;
#thermal-sensor-cells = <1>;
};
rng: rng@4c3000 {
compatible = "qcom,ipq5424-trng", "qcom,trng";
reg = <0 0x004c3000 0 0x1000>;
@ -265,6 +357,8 @@ sdhc: mmc@7804000 {
<&xo_board>;
clock-names = "iface", "core", "xo";
supports-cqe;
status = "disabled";
};
@ -508,6 +602,120 @@ frame@f42d000 {
};
thermal_zones: thermal-zones {
cpu0-thermal {
polling-delay-passive = <100>;
thermal-sensors = <&tsens 14>;
trips {
cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
};
cpu1-thermal {
polling-delay-passive = <100>;
thermal-sensors = <&tsens 12>;
trips {
cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
};
cpu2-thermal {
polling-delay-passive = <100>;
thermal-sensors = <&tsens 11>;
trips {
cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
};
cpu3-thermal {
polling-delay-passive = <100>;
thermal-sensors = <&tsens 13>;
trips {
cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
};
wcss-tile2-thermal {
thermal-sensors = <&tsens 9>;
trips {
wcss-tile2-critical {
temperature = <125000>;
hysteresis = <9000>;
type = "critical";
};
};
};
wcss-tile3-thermal {
thermal-sensors = <&tsens 10>;
trips {
wcss-tile3-critical {
temperature = <125000>;
hysteresis = <9000>;
type = "critical";
};
};
};
top-glue-thermal {
thermal-sensors = <&tsens 15>;
trips {
top-glue-critical {
temperature = <125000>;
hysteresis = <9000>;
type = "critical";
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,

2
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
View File

@ -7,7 +7,7 @@
/dts-v1/;
#include "ipq6018.dtsi"
#include "ipq6018-mp5496.dtsi"
/ {
model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1";

44
arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi Normal file
View File

@ -0,0 +1,44 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* ipq6018-mp5496.dtsi describes common properties (e.g. regulators) that
* apply to most devices that make use of the IPQ6018 SoC and MP5496 PMIC.
*/
#include "ipq6018.dtsi"
&cpu0 {
cpu-supply = <&mp5496_s2>;
};
&cpu1 {
cpu-supply = <&mp5496_s2>;
};
&cpu2 {
cpu-supply = <&mp5496_s2>;
};
&cpu3 {
cpu-supply = <&mp5496_s2>;
};
&rpm_requests {
regulators {
compatible = "qcom,rpm-mp5496-regulators";
mp5496_s2: s2 {
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1062500>;
regulator-always-on;
};
mp5496_l2: l2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
};
};
&sdhc {
vqmmc-supply = <&mp5496_l2>;
};

37
arch/arm64/boot/dts/qcom/ipq6018.dtsi
View File

@ -43,7 +43,6 @@ cpu0: cpu@0 {
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq6018_s2>;
#cooling-cells = <2>;
};
@ -56,7 +55,6 @@ cpu1: cpu@1 {
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq6018_s2>;
#cooling-cells = <2>;
};
@ -69,7 +67,6 @@ cpu2: cpu@2 {
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq6018_s2>;
#cooling-cells = <2>;
};
@ -82,7 +79,6 @@ cpu3: cpu@3 {
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq6018_s2>;
#cooling-cells = <2>;
};
@ -119,6 +115,13 @@ opp-1056000000 {
clock-latency-ns = <200000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <850000>;
opp-supported-hw = <0x4>;
clock-latency-ns = <200000>;
};
opp-1320000000 {
opp-hz = /bits/ 64 <1320000000>;
opp-microvolt = <862500>;
@ -133,6 +136,13 @@ opp-1440000000 {
clock-latency-ns = <200000>;
};
opp-1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <937500>;
opp-supported-hw = <0x2>;
clock-latency-ns = <200000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <987500>;
@ -170,16 +180,6 @@ glink-edge {
rpm_requests: rpm-requests {
compatible = "qcom,rpm-ipq6018", "qcom,glink-smd-rpm";
qcom,glink-channels = "rpm_requests";
regulators {
compatible = "qcom,rpm-mp5496-regulators";
ipq6018_s2: s2 {
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1062500>;
regulator-always-on;
};
};
};
};
};
@ -210,8 +210,11 @@ tz: memory@4a600000 {
};
smem_region: memory@4aa00000 {
compatible = "qcom,smem";
reg = <0x0 0x4aa00000 0x0 0x100000>;
no-map;
hwlocks = <&tcsr_mutex 3>;
};
q6_region: memory@4ab00000 {
@ -220,12 +223,6 @@ q6_region: memory@4ab00000 {
};
};
smem {
compatible = "qcom,smem";
memory-region = <&smem_region>;
hwlocks = <&tcsr_mutex 3>;
};
soc: soc@0 {
#address-cells = <2>;
#size-cells = <2>;

55
arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
View File

@ -111,6 +111,13 @@ mp5496_l2: l2 {
regulator-always-on;
regulator-boot-on;
};
mp5496_l5: l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
};
};
@ -139,6 +146,50 @@ gpio_leds_default: gpio-leds-default-state {
drive-strength = <8>;
bias-pull-up;
};
qpic_snand_default_state: qpic-snand-default-state {
clock-pins {
pins = "gpio5";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
cs-pins {
pins = "gpio4";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
data-pins {
pins = "gpio0", "gpio1", "gpio2", "gpio3";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qpic_snand_default_state>;
pinctrl-names = "default";
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-engine = <&qpic_nand>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
};
};
&usb_0_dwc3 {
@ -146,7 +197,7 @@ &usb_0_dwc3 {
};
&usb_0_qmpphy {
vdda-pll-supply = <&mp5496_l2>;
vdda-pll-supply = <&mp5496_l5>;
vdda-phy-supply = <&regulator_fixed_0p925>;
status = "okay";
@ -154,7 +205,7 @@ &usb_0_qmpphy {
&usb_0_qusbphy {
vdd-supply = <&regulator_fixed_0p925>;
vdda-pll-supply = <&mp5496_l2>;
vdda-pll-supply = <&mp5496_l5>;
vdda-phy-dpdm-supply = <&regulator_fixed_3p3>;
status = "okay";

12
arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
View File

@ -55,18 +55,6 @@ &pcie3 {
status = "okay";
};
&sdhc_1 {
pinctrl-0 = <&sdc_default_state>;
pinctrl-names = "default";
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
max-frequency = <384000000>;
bus-width = <8>;
status = "okay";
};
&tlmm {
pcie1_default: pcie1-default-state {

114
arch/arm64/boot/dts/qcom/ipq9574.dtsi
View File

@ -378,6 +378,8 @@ cryptobam: dma-controller@704000 {
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
qcom,ee = <1>;
qcom,num-ees = <4>;
num-channels = <16>;
qcom,controlled-remotely;
};
@ -673,6 +675,33 @@ blsp1_spi4: spi@78b9000 {
status = "disabled";
};
qpic_bam: dma-controller@7984000 {
compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0x07984000 0x1c000>;
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_QPIC_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
status = "disabled";
};
qpic_nand: spi@79b0000 {
compatible = "qcom,ipq9574-snand";
reg = <0x079b0000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&gcc GCC_QPIC_CLK>,
<&gcc GCC_QPIC_AHB_CLK>,
<&gcc GCC_QPIC_IO_MACRO_CLK>;
clock-names = "core", "aon", "iom";
dmas = <&qpic_bam 0>,
<&qpic_bam 1>,
<&qpic_bam 2>;
dma-names = "tx", "rx", "cmd";
status = "disabled";
};
usb_0_qusbphy: phy@7b000 {
compatible = "qcom,ipq9574-qusb2-phy";
reg = <0x0007b000 0x180>;
@ -876,11 +905,11 @@ frame@b128000 {
pcie1: pcie@10000000 {
compatible = "qcom,pcie-ipq9574";
reg = <0x10000000 0xf1d>,
<0x10000f20 0xa8>,
<0x10001000 0x1000>,
<0x000f8000 0x4000>,
<0x10100000 0x1000>;
reg = <0x10000000 0xf1d>,
<0x10000f20 0xa8>,
<0x10001000 0x1000>,
<0x000f8000 0x4000>,
<0x10100000 0x1000>;
reg-names = "dbi", "elbi", "atu", "parf", "config";
device_type = "pci";
linux,pci-domain = <1>;
@ -956,11 +985,11 @@ pcie1: pcie@10000000 {
pcie3: pcie@18000000 {
compatible = "qcom,pcie-ipq9574";
reg = <0x18000000 0xf1d>,
<0x18000f20 0xa8>,
<0x18001000 0x1000>,
<0x000f0000 0x4000>,
<0x18100000 0x1000>;
reg = <0x18000000 0xf1d>,
<0x18000f20 0xa8>,
<0x18001000 0x1000>,
<0x000f0000 0x4000>,
<0x18100000 0x1000>;
reg-names = "dbi", "elbi", "atu", "parf", "config";
device_type = "pci";
linux,pci-domain = <3>;
@ -972,14 +1001,14 @@ pcie3: pcie@18000000 {
ranges = <0x01000000 0x0 0x00000000 0x18200000 0x0 0x100000>,
<0x02000000 0x0 0x18300000 0x18300000 0x0 0x7d00000>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi0",
"msi1",
"msi2",
@ -1036,11 +1065,11 @@ pcie3: pcie@18000000 {
pcie2: pcie@20000000 {
compatible = "qcom,pcie-ipq9574";
reg = <0x20000000 0xf1d>,
<0x20000f20 0xa8>,
<0x20001000 0x1000>,
<0x00088000 0x4000>,
<0x20100000 0x1000>;
reg = <0x20000000 0xf1d>,
<0x20000f20 0xa8>,
<0x20001000 0x1000>,
<0x00088000 0x4000>,
<0x20100000 0x1000>;
reg-names = "dbi", "elbi", "atu", "parf", "config";
device_type = "pci";
linux,pci-domain = <2>;
@ -1116,11 +1145,11 @@ pcie2: pcie@20000000 {
pcie0: pci@28000000 {
compatible = "qcom,pcie-ipq9574";
reg = <0x28000000 0xf1d>,
<0x28000f20 0xa8>,
<0x28001000 0x1000>,
<0x00080000 0x4000>,
<0x28100000 0x1000>;
reg = <0x28000000 0xf1d>,
<0x28000f20 0xa8>,
<0x28001000 0x1000>,
<0x00080000 0x4000>,
<0x28100000 0x1000>;
reg-names = "dbi", "elbi", "atu", "parf", "config";
device_type = "pci";
linux,pci-domain = <0>;
@ -1193,6 +1222,35 @@ pcie0: pci@28000000 {
status = "disabled";
};
nsscc: clock-controller@39b00000 {
compatible = "qcom,ipq9574-nsscc";
reg = <0x39b00000 0x80000>;
clocks = <&xo_board_clk>,
<&cmn_pll NSS_1200MHZ_CLK>,
<&cmn_pll PPE_353MHZ_CLK>,
<&gcc GPLL0_OUT_AUX>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<&gcc GCC_NSSCC_CLK>;
clock-names = "xo",
"nss_1200",
"ppe_353",
"gpll0_out",
"uniphy0_rx",
"uniphy0_tx",
"uniphy1_rx",
"uniphy1_tx",
"uniphy2_rx",
"uniphy2_tx",
"bus";
#clock-cells = <1>;
#reset-cells = <1>;
#interconnect-cells = <1>;
};
};
thermal-zones {

3
arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts
View File

@ -133,6 +133,9 @@ touchscreen@38 {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts
View File

@ -214,6 +214,9 @@ led@1 {
&blsp_uart2 {
status = "okay";
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
};
&mpss_mem {

3
arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts
View File

@ -130,6 +130,9 @@ touchscreen@38 {
&blsp_uart2 {
status = "okay";
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
};
&mpss_mem {

3
arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts
View File

@ -131,6 +131,9 @@ touchscreen@38 {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts
View File

@ -214,6 +214,9 @@ nfc@28 {
&blsp_uart2 {
status = "okay";
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
};
&lpass {

3
arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts
View File

@ -59,6 +59,9 @@ reg_sd_vmmc: regulator-sdcard-vmmc {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts
View File

@ -112,6 +112,9 @@ touchscreen@34 {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
View File

@ -254,6 +254,9 @@ rmi4-f12@12 {
&blsp_uart2 {
status = "okay";
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
};
&pm8916_bms {

3
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts
View File

@ -178,6 +178,9 @@ imu@68 {
&blsp_uart2 {
status = "okay";
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
};
&mpss_mem {

8
arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi
View File

@ -58,19 +58,19 @@ dai@20 {
&q6asmdai {
dai@0 {
reg = <0>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
direction = <Q6ASM_DAI_RX>;
};
dai@1 {
reg = <1>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
direction = <Q6ASM_DAI_TX>;
};
dai@2 {
reg = <2>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
direction = <Q6ASM_DAI_RX>;
};
dai@3 {
reg = <3>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA4>;
direction = <Q6ASM_DAI_RX>;
is-compress-dai;
};

11
arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi
View File

@ -69,6 +69,9 @@ rmi4-f11@11 {
};
&blsp_uart1 {
pinctrl-0 = <&blsp_uart1_console_default>;
pinctrl-1 = <&blsp_uart1_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};
@ -129,14 +132,6 @@ &wcnss_mem {
status = "okay";
};
/* CTS/RTX are not used */
&blsp_uart1_default {
pins = "gpio0", "gpio1";
};
&blsp_uart1_sleep {
pins = "gpio0", "gpio1";
};
&tlmm {
gpio_keys_default: gpio-keys-default-state {
pins = "gpio107";

3
arch/arm64/boot/dts/qcom/msm8916-mtp.dts
View File

@ -23,5 +23,8 @@ chosen {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
View File

@ -302,6 +302,9 @@ charger: charger {
&blsp_uart2 {
status = "okay";
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
};
&gpu {

3
arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi
View File

@ -304,6 +304,9 @@ charger: charger {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi
View File

@ -116,6 +116,9 @@ fuelgauge@36 {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi
View File

@ -135,6 +135,9 @@ touchscreen: touchscreen@50 {
&blsp_uart2 {
status = "okay";
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
};
&mpss_mem {

3
arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts
View File

@ -319,6 +319,9 @@ rt5033_charger: charger {
&blsp_uart2 {
status = "okay";
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
};
&gpu {

3
arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi
View File

@ -72,6 +72,9 @@ &bam_dmux_dma {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi
View File

@ -93,6 +93,9 @@ touchscreen@38 {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts
View File

@ -169,6 +169,9 @@ led@2 {
&blsp_uart2 {
status = "okay";
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
};
&mpss_mem {

64
arch/arm64/boot/dts/qcom/msm8916.dtsi
View File

@ -4,6 +4,7 @@
*/
#include <dt-bindings/arm/coresight-cti-dt.h>
#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-msm8916.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/interconnect/qcom,msm8916.h>
@ -1231,29 +1232,50 @@ blsp_spi6_sleep: blsp-spi6-sleep-state {
bias-pull-down;
};
blsp_uart1_default: blsp-uart1-default-state {
/* TX, RX, CTS_N, RTS_N */
pins = "gpio0", "gpio1", "gpio2", "gpio3";
function = "blsp_uart1";
drive-strength = <16>;
bias-disable;
blsp_uart1_console_default: blsp-uart1-console-default-state {
tx-pins {
pins = "gpio0";
function = "blsp_uart1";
drive-strength = <16>;
bias-disable;
bootph-all;
};
rx-pins {
pins = "gpio1";
function = "blsp_uart1";
drive-strength = <16>;
bias-pull-up;
bootph-all;
};
};
blsp_uart1_sleep: blsp-uart1-sleep-state {
pins = "gpio0", "gpio1", "gpio2", "gpio3";
blsp_uart1_console_sleep: blsp-uart1-console-sleep-state {
pins = "gpio0", "gpio1";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
blsp_uart2_default: blsp-uart2-default-state {
pins = "gpio4", "gpio5";
function = "blsp_uart2";
drive-strength = <16>;
bias-disable;
blsp_uart2_console_default: blsp-uart2-console-default-state {
tx-pins {
pins = "gpio4";
function = "blsp_uart2";
drive-strength = <16>;
bias-disable;
bootph-all;
};
rx-pins {
pins = "gpio5";
function = "blsp_uart2";
drive-strength = <16>;
bias-pull-up;
bootph-all;
};
};
blsp_uart2_sleep: blsp-uart2-sleep-state {
blsp_uart2_console_sleep: blsp-uart2-console-sleep-state {
pins = "gpio4", "gpio5";
function = "gpio";
drive-strength = <2>;
@ -1497,8 +1519,8 @@ gcc: clock-controller@1800000 {
reg = <0x01800000 0x80000>;
clocks = <&xo_board>,
<&sleep_clk>,
<&mdss_dsi0_phy 1>,
<&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<0>,
<0>,
<0>;
@ -1590,8 +1612,8 @@ mdss_dsi0: dsi@1a98000 {
assigned-clocks = <&gcc BYTE0_CLK_SRC>,
<&gcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>;
assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
clocks = <&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_AHB_CLK>,
@ -2158,9 +2180,6 @@ blsp_uart1: serial@78af000 {
clock-names = "core", "iface";
dmas = <&blsp_dma 0>, <&blsp_dma 1>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp_uart1_default>;
pinctrl-1 = <&blsp_uart1_sleep>;
status = "disabled";
};
@ -2172,9 +2191,6 @@ blsp_uart2: serial@78b0000 {
clock-names = "core", "iface";
dmas = <&blsp_dma 2>, <&blsp_dma 3>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp_uart2_default>;
pinctrl-1 = <&blsp_uart2_sleep>;
status = "disabled";
};

27
arch/arm64/boot/dts/qcom/msm8917-xiaomi-riva.dts
View File

@ -20,6 +20,14 @@ / {
qcom,msm-id = <QCOM_ID_MSM8917 0>;
qcom,board-id = <0x1000b 2>, <0x2000b 2>;
pwm_backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pm8937_pwm 0 100000>;
brightness-levels = <0 255>;
num-interpolated-steps = <255>;
default-brightness-level = <128>;
};
battery: battery {
compatible = "simple-battery";
charge-full-design-microamp-hours = <3000000>;
@ -119,7 +127,7 @@ bq27426@55 {
monitored-battery = <&battery>;
};
bq25601@6b{
bq25601@6b {
compatible = "ti,bq25601";
reg = <0x6b>;
interrupts-extended = <&tlmm 61 IRQ_TYPE_EDGE_FALLING>;
@ -131,6 +139,23 @@ bq25601@6b{
};
};
&pm8937_gpios {
pwm_enable_default: pwm-enable-default-state {
pins = "gpio8";
function = "dtest2";
output-low;
bias-disable;
qcom,drive-strength = <2>;
};
};
&pm8937_pwm {
pinctrl-0 = <&pwm_enable_default>;
pinctrl-names = "default";
status = "okay";
};
&pm8937_resin {
linux,code = <KEY_VOLUMEDOWN>;

11
arch/arm64/boot/dts/qcom/msm8917.dtsi
View File

@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-msm8917.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -587,7 +588,7 @@ tsens_s4_p2: s4-p2@217 {
bits = <1 6>;
};
tsens_s9_p1: s9-p1@230{
tsens_s9_p1: s9-p1@230 {
reg = <0x230 1>;
bits = <0 6>;
};
@ -961,8 +962,8 @@ gcc: clock-controller@1800000 {
#power-domain-cells = <1>;
clocks = <&xo_board>,
<&sleep_clk>,
<&mdss_dsi0_phy 1>,
<&mdss_dsi0_phy 0>;
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi0_phy DSI_BYTE_PLL_CLK>;
clock-names = "xo",
"sleep_clk",
"dsi0pll",
@ -1051,8 +1052,8 @@ mdss_dsi0: dsi@1a94000 {
assigned-clocks = <&gcc BYTE0_CLK_SRC>,
<&gcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>;
assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
clocks = <&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_AHB_CLK>,

3
arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts
View File

@ -126,6 +126,9 @@ touchscreen@1c {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts
View File

@ -243,6 +243,9 @@ touchscreen@4a {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts
View File

@ -373,6 +373,9 @@ charger: charger {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

3
arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi
View File

@ -126,6 +126,9 @@ touchscreen: touchscreen@38 {
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};

75
arch/arm64/boot/dts/qcom/msm8939.dtsi
View File

@ -4,6 +4,7 @@
* Copyright (c) 2020-2023, Linaro Limited
*/
#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-msm8939.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/interconnect/qcom,msm8939.h>
@ -46,6 +47,7 @@ cpu0: cpu@100 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
reg = <0x100>;
next-level-cache = <&l2_1>;
qcom,acc = <&acc0>;
@ -64,6 +66,7 @@ cpu1: cpu@101 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
reg = <0x101>;
next-level-cache = <&l2_1>;
qcom,acc = <&acc1>;
@ -77,6 +80,7 @@ cpu2: cpu@102 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
reg = <0x102>;
next-level-cache = <&l2_1>;
qcom,acc = <&acc2>;
@ -90,6 +94,7 @@ cpu3: cpu@103 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
reg = <0x103>;
next-level-cache = <&l2_1>;
qcom,acc = <&acc3>;
@ -103,6 +108,7 @@ cpu4: cpu@0 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
reg = <0x0>;
qcom,acc = <&acc4>;
qcom,saw = <&saw4>;
@ -121,6 +127,7 @@ cpu5: cpu@1 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
reg = <0x1>;
next-level-cache = <&l2_0>;
qcom,acc = <&acc5>;
@ -134,6 +141,7 @@ cpu6: cpu@2 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
reg = <0x2>;
next-level-cache = <&l2_0>;
qcom,acc = <&acc6>;
@ -147,6 +155,7 @@ cpu7: cpu@3 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
reg = <0x3>;
next-level-cache = <&l2_0>;
qcom,acc = <&acc7>;
@ -896,28 +905,50 @@ blsp_spi6_sleep: blsp-spi6-sleep-state {
bias-pull-down;
};
blsp_uart1_default: blsp-uart1-default-state {
pins = "gpio0", "gpio1", "gpio2", "gpio3";
function = "blsp_uart1";
drive-strength = <16>;
bias-disable;
blsp_uart1_console_default: blsp-uart1-console-default-state {
tx-pins {
pins = "gpio0";
function = "blsp_uart1";
drive-strength = <16>;
bias-disable;
bootph-all;
};
rx-pins {
pins = "gpio1";
function = "blsp_uart1";
drive-strength = <16>;
bias-pull-up;
bootph-all;
};
};
blsp_uart1_sleep: blsp-uart1-sleep-state {
pins = "gpio0", "gpio1", "gpio2", "gpio3";
blsp_uart1_console_sleep: blsp-uart1-console-sleep-state {
pins = "gpio0", "gpio1";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
blsp_uart2_default: blsp-uart2-default-state {
pins = "gpio4", "gpio5";
function = "blsp_uart2";
drive-strength = <16>;
bias-disable;
blsp_uart2_console_default: blsp-uart2-console-default-state {
tx-pins {
pins = "gpio4";
function = "blsp_uart2";
drive-strength = <16>;
bias-disable;
bootph-all;
};
rx-pins {
pins = "gpio5";
function = "blsp_uart2";
drive-strength = <16>;
bias-pull-up;
bootph-all;
};
};
blsp_uart2_sleep: blsp-uart2-sleep-state {
blsp_uart2_console_sleep: blsp-uart2-console-sleep-state {
pins = "gpio4", "gpio5";
function = "gpio";
drive-strength = <2>;
@ -1172,8 +1203,8 @@ gcc: clock-controller@1800000 {
reg = <0x01800000 0x80000>;
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
<&sleep_clk>,
<&mdss_dsi0_phy 1>,
<&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<0>,
<0>,
<0>;
@ -1291,8 +1322,8 @@ mdss_dsi0: dsi@1a98000 {
"core";
assigned-clocks = <&gcc BYTE0_CLK_SRC>,
<&gcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>;
assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
phys = <&mdss_dsi0_phy>;
status = "disabled";
@ -1360,8 +1391,8 @@ mdss_dsi1: dsi@1aa0000 {
"core";
assigned-clocks = <&gcc BYTE1_CLK_SRC>,
<&gcc PCLK1_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>;
assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
phys = <&mdss_dsi1_phy>;
status = "disabled";
@ -1761,9 +1792,6 @@ blsp_uart1: serial@78af000 {
clock-names = "core", "iface";
dmas = <&blsp_dma 0>, <&blsp_dma 1>;
dma-names = "tx", "rx";
pinctrl-0 = <&blsp_uart1_default>;
pinctrl-1 = <&blsp_uart1_sleep>;
pinctrl-names = "default", "sleep";
status = "disabled";
};
@ -1775,9 +1803,6 @@ blsp_uart2: serial@78b0000 {
clock-names = "core", "iface";
dmas = <&blsp_dma 2>, <&blsp_dma 3>;
dma-names = "tx", "rx";
pinctrl-0 = <&blsp_uart2_default>;
pinctrl-1 = <&blsp_uart2_sleep>;
pinctrl-names = "default", "sleep";
status = "disabled";
};

158
arch/arm64/boot/dts/qcom/msm8953.dtsi
View File

@ -1,9 +1,12 @@
// SPDX-License-Identifier: BSD-3-Clause
/* Copyright (c) 2022, The Linux Foundation. All rights reserved. */
#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-msm8953.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interconnect/qcom,msm8953.h>
#include <dt-bindings/interconnect/qcom,rpm-icc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,apr.h>
@ -44,6 +47,8 @@ cpu0: cpu@0 {
reg = <0x0>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&bimc SLV_EBI RPM_ACTIVE_TAG>;
next-level-cache = <&l2_0>;
#cooling-cells = <2>;
};
@ -54,6 +59,8 @@ cpu1: cpu@1 {
reg = <0x1>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&bimc SLV_EBI RPM_ACTIVE_TAG>;
next-level-cache = <&l2_0>;
#cooling-cells = <2>;
};
@ -64,6 +71,8 @@ cpu2: cpu@2 {
reg = <0x2>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&bimc SLV_EBI RPM_ACTIVE_TAG>;
next-level-cache = <&l2_0>;
#cooling-cells = <2>;
};
@ -74,6 +83,8 @@ cpu3: cpu@3 {
reg = <0x3>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&bimc SLV_EBI RPM_ACTIVE_TAG>;
next-level-cache = <&l2_0>;
#cooling-cells = <2>;
};
@ -84,6 +95,8 @@ cpu4: cpu@100 {
reg = <0x100>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&bimc SLV_EBI RPM_ACTIVE_TAG>;
next-level-cache = <&l2_1>;
#cooling-cells = <2>;
};
@ -94,6 +107,8 @@ cpu5: cpu@101 {
reg = <0x101>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&bimc SLV_EBI RPM_ACTIVE_TAG>;
next-level-cache = <&l2_1>;
#cooling-cells = <2>;
};
@ -104,6 +119,8 @@ cpu6: cpu@102 {
reg = <0x102>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&bimc SLV_EBI RPM_ACTIVE_TAG>;
next-level-cache = <&l2_1>;
#cooling-cells = <2>;
};
@ -114,6 +131,8 @@ cpu7: cpu@103 {
reg = <0x103>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&bimc SLV_EBI RPM_ACTIVE_TAG>;
next-level-cache = <&l2_1>;
#cooling-cells = <2>;
};
@ -470,6 +489,13 @@ rng@e3000 {
clock-names = "core";
};
bimc: interconnect@400000 {
compatible = "qcom,msm8953-bimc";
reg = <0x00400000 0x5a000>;
#interconnect-cells = <2>;
};
tsens0: thermal-sensor@4a9000 {
compatible = "qcom,msm8953-tsens", "qcom,tsens-v2";
reg = <0x004a9000 0x1000>, /* TM */
@ -486,6 +512,29 @@ restart@4ab000 {
reg = <0x004ab000 0x4>;
};
pcnoc: interconnect@500000 {
compatible = "qcom,msm8953-pcnoc";
reg = <0x00500000 0x12080>;
clocks = <&gcc GCC_PCNOC_USB3_AXI_CLK>;
clock-names = "pcnoc_usb3_axi";
#interconnect-cells = <2>;
};
snoc: interconnect@580000 {
compatible = "qcom,msm8953-snoc";
reg = <0x00580000 0x16080>;
#interconnect-cells = <2>;
snoc_mm: interconnect-snoc {
compatible = "qcom,msm8953-snoc-mm";
#interconnect-cells = <2>;
};
};
tlmm: pinctrl@1000000 {
compatible = "qcom,msm8953-pinctrl";
reg = <0x01000000 0x300000>;
@ -767,6 +816,20 @@ spi_6_sleep: spi-6-sleep-state {
bias-disable;
};
uart_5_default: uart-5-default-state {
pins = "gpio16", "gpio17", "gpio18", "gpio19";
function = "blsp_uart5";
drive-strength = <16>;
bias-disable;
};
uart_5_sleep: uart-5-sleep-state {
pins = "gpio16", "gpio17", "gpio18", "gpio19";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
wcnss_pin_a: wcnss-active-state {
wcss-wlan2-pins {
@ -807,10 +870,10 @@ gcc: clock-controller@1800000 {
#power-domain-cells = <1>;
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
<&sleep_clk>,
<&mdss_dsi0_phy 1>,
<&mdss_dsi0_phy 0>,
<&mdss_dsi1_phy 1>,
<&mdss_dsi1_phy 0>;
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi1_phy DSI_BYTE_PLL_CLK>;
clock-names = "xo",
"sleep",
"dsi0pll",
@ -849,6 +912,13 @@ mdss: display-subsystem@1a00000 {
interrupt-controller;
#interrupt-cells = <1>;
interconnects = <&snoc_mm MAS_MDP RPM_ALWAYS_TAG
&bimc SLV_EBI RPM_ALWAYS_TAG>,
<&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&pcnoc SLV_DISP_SS_CFG RPM_ACTIVE_TAG>;
interconnect-names = "mdp0-mem",
"cpu-cfg";
clocks = <&gcc GCC_MDSS_AHB_CLK>,
<&gcc GCC_MDSS_AXI_CLK>,
<&gcc GCC_MDSS_VSYNC_CLK>,
@ -917,8 +987,8 @@ mdss_dsi0: dsi@1a94000 {
assigned-clocks = <&gcc BYTE0_CLK_SRC>,
<&gcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>;
assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
clocks = <&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_AHB_CLK>,
@ -987,8 +1057,8 @@ mdss_dsi1: dsi@1a96000 {
assigned-clocks = <&gcc BYTE1_CLK_SRC>,
<&gcc PCLK1_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi1_phy 0>,
<&mdss_dsi1_phy 1>;
assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
clocks = <&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_AHB_CLK>,
@ -1065,6 +1135,11 @@ gpu: gpu@1c00000 {
"alwayson";
power-domains = <&gcc OXILI_GX_GDSC>;
interconnects = <&bimc MAS_OXILI RPM_ALWAYS_TAG
&bimc SLV_EBI RPM_ALWAYS_TAG>,
<&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&pcnoc SLV_GPU_CFG RPM_ACTIVE_TAG>;
iommus = <&gpu_iommu 0>;
operating-points-v2 = <&gpu_opp_table>;
@ -1302,6 +1377,13 @@ usb3: usb@70f8800 {
<&gcc GCC_USB30_MASTER_CLK>;
assigned-clock-rates = <19200000>, <133330000>;
interconnects = <&pcnoc MAS_USB3 RPM_ALWAYS_TAG
&bimc SLV_EBI RPM_ALWAYS_TAG>,
<&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&pcnoc SLV_USB3 RPM_ACTIVE_TAG>;
interconnect-names = "usb-ddr",
"apps-usb";
power-domains = <&gcc USB30_GDSC>;
qcom,select-utmi-as-pipe-clk;
@ -1354,6 +1436,13 @@ sdhc_1: mmc@7824900 {
<&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "core", "xo";
interconnects = <&pcnoc MAS_SDCC_1 RPM_ALWAYS_TAG
&bimc SLV_EBI RPM_ALWAYS_TAG>,
<&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&pcnoc SLV_SDCC_1 RPM_ACTIVE_TAG>;
interconnect-names = "sdhc-ddr",
"cpu-sdhc";
power-domains = <&rpmpd MSM8953_VDDCX>;
operating-points-v2 = <&sdhc1_opp_table>;
@ -1374,26 +1463,36 @@ sdhc1_opp_table: opp-table-sdhc1 {
opp-25000000 {
opp-hz = /bits/ 64 <25000000>;
opp-peak-kBps = <200000>, <100000>;
opp-avg-kBps = <65360>, <32768>;
required-opps = <&rpmpd_opp_low_svs>;
};
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
opp-peak-kBps = <400000>, <200000>;
opp-avg-kBps = <130718>, <65360>;
required-opps = <&rpmpd_opp_svs>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-peak-kBps = <400000>, <400000>;
opp-avg-kBps = <130718>, <65360>;
required-opps = <&rpmpd_opp_svs>;
};
opp-192000000 {
opp-hz = /bits/ 64 <192000000>;
opp-peak-kBps = <800000>, <600000>;
opp-avg-kBps = <261438>, <130718>;
required-opps = <&rpmpd_opp_nom>;
};
opp-384000000 {
opp-hz = /bits/ 64 <384000000>;
opp-peak-kBps = <800000>, <800000>;
opp-avg-kBps = <261438>, <300000>;
required-opps = <&rpmpd_opp_nom>;
};
};
@ -1414,6 +1513,13 @@ sdhc_2: mmc@7864900 {
<&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "core", "xo";
interconnects = <&pcnoc MAS_SDCC_2 RPM_ALWAYS_TAG
&bimc SLV_EBI RPM_ALWAYS_TAG>,
<&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
&pcnoc SLV_SDCC_2 RPM_ACTIVE_TAG>;
interconnect-names = "sdhc-ddr",
"cpu-sdhc";
power-domains = <&rpmpd MSM8953_VDDCX>;
operating-points-v2 = <&sdhc2_opp_table>;
@ -1430,26 +1536,36 @@ sdhc2_opp_table: opp-table-sdhc2 {
opp-25000000 {
opp-hz = /bits/ 64 <25000000>;
opp-peak-kBps = <200000>, <100000>;
opp-avg-kBps = <65360>, <32768>;
required-opps = <&rpmpd_opp_low_svs>;
};
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
opp-peak-kBps = <400000>, <400000>;
opp-avg-kBps = <130718>, <65360>;
required-opps = <&rpmpd_opp_svs>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-peak-kBps = <800000>, <400000>;
opp-avg-kBps = <130718>, <130718>;
required-opps = <&rpmpd_opp_svs>;
};
opp-177770000 {
opp-hz = /bits/ 64 <177770000>;
opp-peak-kBps = <600000>, <600000>;
opp-avg-kBps = <261438>, <130718>;
required-opps = <&rpmpd_opp_nom>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-peak-kBps = <800000>, <800000>;
opp-avg-kBps = <261438>, <130718>;
required-opps = <&rpmpd_opp_nom>;
};
};
@ -1592,6 +1708,24 @@ blsp2_dma: dma-controller@7ac4000 {
qcom,controlled-remotely;
};
uart_5: serial@7aef000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x07aef000 0x200>;
interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP2_UART1_APPS_CLK>,
<&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "core",
"iface";
dmas = <&blsp2_dma 0>, <&blsp2_dma 1>;
dma-names = "tx", "rx";
pinctrl-0 = <&uart_5_default>;
pinctrl-1 = <&uart_5_sleep>;
pinctrl-names = "default", "sleep";
status = "disabled";
};
i2c_5: i2c@7af5000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x07af5000 0x600>;
@ -1932,19 +2066,19 @@ q6asmdai: dais {
#sound-dai-cells = <1>;
dai@0 {
reg = <0>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
direction = <Q6ASM_DAI_RX>;
};
dai@1 {
reg = <1>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
direction = <Q6ASM_DAI_TX>;
};
dai@2 {
reg = <2>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
direction = <Q6ASM_DAI_RX>;
};
dai@3 {
reg = <3>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA4>;
direction = <Q6ASM_DAI_RX>;
is-compress-dai;
};

17
arch/arm64/boot/dts/qcom/msm8976.dtsi
View File

@ -6,6 +6,7 @@
* Copyright (c) 2022, Marijn Suijten <marijn.suijten@somainline.org>
*/
#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-msm8976.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/gpio/gpio.h>
@ -824,10 +825,10 @@ gcc: clock-controller@1800000 {
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
<&rpmcc RPM_SMD_XO_A_CLK_SRC>,
<&mdss_dsi0_phy 1>,
<&mdss_dsi0_phy 0>,
<&mdss_dsi1_phy 1>,
<&mdss_dsi1_phy 0>;
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi1_phy DSI_BYTE_PLL_CLK>;
clock-names = "xo",
"xo_a",
"dsi0pll",
@ -970,8 +971,8 @@ mdss_dsi0: dsi@1a94000 {
assigned-clocks = <&gcc GCC_MDSS_BYTE0_CLK_SRC>,
<&gcc GCC_MDSS_PCLK0_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>;
assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
phys = <&mdss_dsi0_phy>;
@ -1046,8 +1047,8 @@ mdss_dsi1: dsi@1a96000 {
assigned-clocks = <&gcc GCC_MDSS_BYTE1_CLK_SRC>,
<&gcc GCC_MDSS_PCLK1_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi1_phy 0>,
<&mdss_dsi1_phy 1>;
assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
phys = <&mdss_dsi1_phy>;

6
arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts
View File

@ -93,26 +93,32 @@ key-vol-up {
&cpu0 {
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
};
&cpu1 {
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
};
&cpu2 {
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
};
&cpu3 {
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
};
&cpu4 {
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
};
&cpu5 {
enable-method = "spin-table";
cpu-release-addr = /bits/ 64 <0>;
};
&pm8994_resin {

6
arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi
View File

@ -288,15 +288,15 @@ &q6asmdai {
#size-cells = <0>;
dai@0 {
reg = <0>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
dai@1 {
reg = <1>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
dai@2 {
reg = <2>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};

11
arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
View File

@ -137,15 +137,15 @@ &mss_pil {
&q6asmdai {
dai@0 {
reg = <0>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
dai@1 {
reg = <1>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
dai@2 {
reg = <2>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};
@ -156,10 +156,7 @@ &slpi_pil {
&sound {
compatible = "qcom,apq8096-sndcard";
model = "gemini";
audio-routing = "RX_BIAS", "MCLK",
"MM_DL1", "MultiMedia1 Playback",
"MM_DL2", "MultiMedia2 Playback",
"MultiMedia3 Capture", "MM_UL3";
audio-routing = "RX_BIAS", "MCLK";
mm1-dai-link {
link-name = "MultiMedia1";

21
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@ -4,6 +4,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-msm8996.h>
#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
@ -937,10 +938,10 @@ mmcc: clock-controller@8c0000 {
clocks = <&xo_board>,
<&gcc GPLL0>,
<&gcc GCC_MMSS_NOC_CFG_AHB_CLK>,
<&mdss_dsi0_phy 1>,
<&mdss_dsi0_phy 0>,
<&mdss_dsi1_phy 1>,
<&mdss_dsi1_phy 0>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
<&mdss_hdmi_phy>;
clock-names = "xo",
"gpll0",
@ -1071,8 +1072,10 @@ mdss_dsi0: dsi@994000 {
"core_mmss",
"pixel",
"core";
assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
<&mmcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
phys = <&mdss_dsi0_phy>;
status = "disabled";
@ -1139,8 +1142,10 @@ mdss_dsi1: dsi@996000 {
"core_mmss",
"pixel",
"core";
assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
<&mmcc PCLK1_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
phys = <&mdss_dsi1_phy>;
status = "disabled";

6
arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts
View File

@ -87,15 +87,15 @@ &pmi8994_wled {
&q6asmdai {
dai@0 {
reg = <0>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
dai@1 {
reg = <1>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
dai@2 {
reg = <2>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};

6
arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts
View File

@ -139,15 +139,15 @@ led@6 {
&q6asmdai {
dai@0 {
reg = <0>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
dai@1 {
reg = <1>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
dai@2 {
reg = <2>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};

2
arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dts
View File

@ -101,5 +101,5 @@ i2c5_hid_active: i2c5-hid-active-state {
};
&wifi {
qcom,ath10k-calibration-variant = "Lenovo_Miix630";
qcom,calibration-variant = "Lenovo_Miix630";
};

21
arch/arm64/boot/dts/qcom/msm8998.dtsi
View File

@ -2,6 +2,7 @@
/* Copyright (c) 2016, The Linux Foundation. All rights reserved. */
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-msm8998.h>
#include <dt-bindings/clock/qcom,gpucc-msm8998.h>
#include <dt-bindings/clock/qcom,mmcc-msm8998.h>
@ -2790,10 +2791,10 @@ mmcc: clock-controller@c8c0000 {
"gpll0_div";
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
<&gcc GCC_MMSS_GPLL0_CLK>,
<&mdss_dsi0_phy 1>,
<&mdss_dsi0_phy 0>,
<&mdss_dsi1_phy 1>,
<&mdss_dsi1_phy 0>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
<&mdss_hdmi_phy 0>,
<0>,
<0>,
@ -2829,8 +2830,8 @@ mdss_mdp: display-controller@c901000 {
compatible = "qcom,msm8998-dpu";
reg = <0x0c901000 0x8f000>,
<0x0c9a8e00 0xf0>,
<0x0c9b0000 0x2008>,
<0x0c9b8000 0x1040>;
<0x0c9b0000 0x3000>,
<0x0c9b8000 0x3000>;
reg-names = "mdp",
"regdma",
"vbif",
@ -2932,8 +2933,8 @@ mdss_dsi0: dsi@c994000 {
"bus";
assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
<&mmcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>;
assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmpd MSM8998_VDDCX>;
@ -3008,8 +3009,8 @@ mdss_dsi1: dsi@c996000 {
"bus";
assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
<&mmcc PCLK1_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi1_phy 0>,
<&mdss_dsi1_phy 1>;
assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmpd MSM8998_VDDCX>;

8
arch/arm64/boot/dts/qcom/pm8937.dtsi
View File

@ -143,6 +143,14 @@ pmic@1 {
#address-cells = <1>;
#size-cells = <0>;
pm8937_pwm: pwm {
compatible = "qcom,pm8937-pwm", "qcom,pm8916-pwm";
#pwm-cells = <2>;
status = "disabled";
};
pm8937_spmi_regulators: regulators {
compatible = "qcom,pm8937-regulators";
};

35
arch/arm64/boot/dts/qcom/qcm2290.dtsi
View File

@ -6,6 +6,7 @@
*/
#include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-qcm2290.h>
#include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
@ -550,6 +551,13 @@ qup_uart0_default: qup-uart0-default-state {
bias-disable;
};
qup_uart3_default: qup-uart3-default-state {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "qup3";
drive-strength = <2>;
bias-disable;
};
qup_uart4_default: qup-uart4-default-state {
pins = "gpio12", "gpio13";
function = "qup4";
@ -1239,6 +1247,23 @@ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
status = "disabled";
};
uart3: serial@4a8c000 {
compatible = "qcom,geni-uart";
reg = <0x0 0x04a8c000 0x0 0x4000>;
interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
clock-names = "se";
pinctrl-0 = <&qup_uart3_default>;
pinctrl-names = "default";
interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
&qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
<&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
&config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>;
interconnect-names = "qup-core",
"qup-config";
status = "disabled";
};
i2c4: i2c@4a90000 {
compatible = "qcom,geni-i2c";
reg = <0x0 0x04a90000 0x0 0x4000>;
@ -1616,7 +1641,7 @@ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>,
mdp: display-controller@5e01000 {
compatible = "qcom,qcm2290-dpu";
reg = <0x0 0x05e01000 0x0 0x8f000>,
<0x0 0x05eb0000 0x0 0x2008>;
<0x0 0x05eb0000 0x0 0x3000>;
reg-names = "mdp",
"vbif";
@ -1702,8 +1727,8 @@ mdss_dsi0: dsi@5e94000 {
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
<&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
assigned-clock-parents = <&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>;
assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmpd QCM2290_VDDCX>;
@ -1785,8 +1810,8 @@ dispcc: clock-controller@5f00000 {
<&rpmcc RPM_SMD_XO_A_CLK_SRC>,
<&gcc GCC_DISP_GPLL0_CLK_SRC>,
<&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
<&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>;
<&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
clock-names = "bi_tcxo",
"bi_tcxo_ao",
"gcc_disp_gpll0_clk_src",

219
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
View File

@ -101,7 +101,15 @@ port@1 {
reg = <1>;
pmic_glink_ss_in: endpoint {
remote-endpoint = <&usb_1_dwc3_ss>;
remote-endpoint = <&redriver_ss_out>;
};
};
port@2 {
reg = <2>;
pmic_glink_sbu: endpoint {
remote-endpoint = <&ocp96011_sbu_mux>;
};
};
};
@ -138,6 +146,51 @@ vreg_ois_dvdd_1p1: regulator-ois-dvdd-1p1 {
vin-supply = <&vreg_s8b>;
};
vreg_oled_dvdd: regulator-oled-dvdd {
compatible = "regulator-fixed";
regulator-name = "oled_dvdd";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vreg_s1b>;
regulator-boot-on;
};
vreg_oled_vci: regulator-oled-vci {
compatible = "regulator-fixed";
regulator-name = "oled_vci";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vreg_l13c>;
regulator-boot-on;
};
vreg_usb_redrive_1v8: regulator-usb-redrive-1v8 {
compatible = "regulator-fixed";
regulator-name = "USB_REDRIVE_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&tlmm 61 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vreg_bob>;
regulator-boot-on;
pinctrl-0 = <&usb_redrive_1v8_en_default>;
pinctrl-names = "default";
};
reserved-memory {
cont_splash_mem: cont-splash@e1000000 {
reg = <0x0 0xe1000000 0x0 0x2300000>;
@ -597,11 +650,6 @@ eeprom@51 {
};
};
&dispcc {
/* Disable for now so simple-framebuffer continues working */
status = "disabled";
};
&gcc {
protected-clocks = <GCC_CFG_NOC_LPASS_CLK>,
<GCC_EDP_CLKREF_EN>,
@ -628,6 +676,14 @@ &gpi_dma1 {
status = "okay";
};
&gpu {
status = "okay";
};
&gpu_zap_shader {
firmware-name = "qcom/qcm6490/fairphone5/a660_zap.mbn";
};
&i2c1 {
status = "okay";
@ -702,7 +758,26 @@ vreg_l7p: ldo7 {
};
/* Pixelworks @ 26 */
/* FSA4480 USB audio switch @ 42 */
typec-mux@42 {
compatible = "ocs,ocp96011", "fcs,fsa4480";
reg = <0x42>;
interrupts-extended = <&tlmm 7 IRQ_TYPE_LEVEL_LOW>;
vcc-supply = <&vreg_bob>;
mode-switch;
orientation-switch;
port {
ocp96011_sbu_mux: endpoint {
remote-endpoint = <&pmic_glink_sbu>;
data-lanes = <1 0>;
};
};
};
/* AW86927FCR haptics @ 5a */
};
@ -716,7 +791,36 @@ &i2c2 {
&i2c4 {
status = "okay";
/* PTN36502 USB redriver @ 1a */
typec-mux@1a {
compatible = "nxp,ptn36502";
reg = <0x1a>;
vdd18-supply = <&vreg_usb_redrive_1v8>;
retimer-switch;
orientation-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
redriver_ss_out: endpoint {
remote-endpoint = <&pmic_glink_ss_in>;
};
};
port@1 {
reg = <1>;
redriver_ss_in: endpoint {
remote-endpoint = <&usb_dp_qmpphy_out>;
};
};
};
};
};
&i2c9 {
@ -733,6 +837,54 @@ &ipa {
status = "okay";
};
&mdss {
status = "okay";
};
&mdss_dp {
status = "okay";
};
&mdss_dp_out {
data-lanes = <0 1>;
};
&mdss_dsi {
vdda-supply = <&vreg_l6b>;
status = "okay";
panel@0 {
compatible = "fairphone,fp5-rm692e5-boe", "raydium,rm692e5";
reg = <0>;
reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
vci-supply = <&vreg_oled_vci>;
vddio-supply = <&vreg_l12c>;
dvdd-supply = <&vreg_oled_dvdd>;
pinctrl-0 = <&disp_reset_n_active>, <&mdp_vsync>;
pinctrl-1 = <&disp_reset_n_suspend>, <&mdp_vsync>;
pinctrl-names = "default", "sleep";
port {
panel_in: endpoint {
remote-endpoint = <&mdss_dsi0_out>;
};
};
};
};
&mdss_dsi0_out {
data-lanes = <0 1 2 3>;
remote-endpoint = <&panel_in>;
};
&mdss_dsi_phy {
vdds-supply = <&vreg_l10c>;
status = "okay";
};
&pm7250b_adc {
pinctrl-0 = <&pm7250b_adc_default>;
pinctrl-names = "default";
@ -998,7 +1150,17 @@ &sdhc_2 {
&spi13 {
status = "okay";
/* Goodix touchscreen @ 0 */
touchscreen@0 {
compatible = "goodix,gt9897";
reg = <0>;
interrupts-extended = <&tlmm 81 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&tlmm 105 GPIO_ACTIVE_LOW>;
avdd-supply = <&vreg_l3c>;
vddio-supply = <&vreg_l2c>;
spi-max-frequency = <1000000>;
touchscreen-size-x = <1224>;
touchscreen-size-y = <2700>;
};
};
&tlmm {
@ -1015,6 +1177,20 @@ bluetooth_enable_default: bluetooth-enable-default-state {
bias-disable;
};
disp_reset_n_active: disp-reset-n-active-state {
pins = "gpio44";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
disp_reset_n_suspend: disp-reset-n-suspend-state {
pins = "gpio44";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
hall_sensor_default: hall-sensor-default-state {
pins = "gpio155";
function = "gpio";
@ -1022,6 +1198,13 @@ hall_sensor_default: hall-sensor-default-state {
bias-pull-up;
};
mdp_vsync: mdp-vsync-state {
pins = "gpio80";
function = "mdp_vsync";
drive-strength = <2>;
bias-pull-down;
};
pm8008_int_default: pm8008-int-default-state {
pins = "gpio25";
function = "gpio";
@ -1080,6 +1263,14 @@ sw_ctrl_default: sw-ctrl-default-state {
function = "gpio";
bias-pull-down;
};
usb_redrive_1v8_en_default: usb-redrive-1v8-en-default-state {
pins = "gpio61";
function = "gpio";
drive-strength = <2>;
bias-disable;
output-high;
};
};
&uart5 {
@ -1154,10 +1345,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
&usb_1_dwc3_ss {
remote-endpoint = <&pmic_glink_ss_in>;
};
&usb_1_hsphy {
vdda-pll-supply = <&vreg_l10c>;
vdda18-supply = <&vreg_l1c>;
@ -1184,12 +1371,16 @@ &usb_1_qmpphy {
status = "okay";
};
&usb_dp_qmpphy_out {
remote-endpoint = <&redriver_ss_in>;
};
&venus {
firmware-name = "qcom/qcm6490/fairphone5/venus.mbn";
status = "okay";
};
&wifi {
qcom,ath11k-calibration-variant = "Fairphone_5";
qcom,calibration-variant = "Fairphone_5";
status = "okay";
};

28
arch/arm64/boot/dts/qcom/qcm6490-idp.dts
View File

@ -507,6 +507,27 @@ vreg_bob_3p296: bob {
};
};
&gcc {
protected-clocks = <GCC_AGGRE_NOC_PCIE_1_AXI_CLK> ,<GCC_PCIE_1_AUX_CLK>,
<GCC_PCIE_1_AUX_CLK_SRC>, <GCC_PCIE_1_CFG_AHB_CLK>,
<GCC_PCIE_1_MSTR_AXI_CLK>, <GCC_PCIE_1_PHY_RCHNG_CLK_SRC>,
<GCC_PCIE_1_PIPE_CLK>, <GCC_PCIE_1_PIPE_CLK_SRC>,
<GCC_PCIE_1_SLV_AXI_CLK>, <GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>, <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>,<GCC_USB30_SEC_MASTER_CLK>,
<GCC_USB30_SEC_MASTER_CLK_SRC>, <GCC_USB30_SEC_MOCK_UTMI_CLK>,
<GCC_USB30_SEC_MOCK_UTMI_CLK_SRC>,
<GCC_USB30_SEC_MOCK_UTMI_POSTDIV_CLK_SRC>, <GCC_USB30_SEC_SLEEP_CLK>,
<GCC_USB3_SEC_PHY_AUX_CLK>, <GCC_USB3_SEC_PHY_AUX_CLK_SRC>,
<GCC_USB3_SEC_PHY_COM_AUX_CLK>, <GCC_USB3_SEC_PHY_PIPE_CLK>,
<GCC_USB3_SEC_PHY_PIPE_CLK_SRC>, <GCC_CFG_NOC_LPASS_CLK>,
<GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, <GCC_MSS_CFG_AHB_CLK>,
<GCC_MSS_OFFLINE_AXI_CLK>, <GCC_MSS_SNOC_AXI_CLK>,
<GCC_MSS_Q6_MEMNOC_AXI_CLK>, <GCC_MSS_Q6SS_BOOT_CLK_SRC>,
<GCC_SEC_CTRL_CLK_SRC>, <GCC_WPSS_AHB_CLK>,
<GCC_WPSS_AHB_BDG_MST_CLK>, <GCC_WPSS_RSCP_CLK>;
};
&gpu {
status = "okay";
};
@ -755,7 +776,12 @@ &usb_1_qmpphy {
&wifi {
memory-region = <&wlan_fw_mem>;
qcom,ath11k-calibration-variant = "Qualcomm_qcm6490idp";
qcom,calibration-variant = "Qualcomm_qcm6490idp";
status = "okay";
};
&lpass_audiocc {
compatible = "qcom,qcm6490-lpassaudiocc";
/delete-property/ power-domains;
};

2
arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts
View File

@ -953,7 +953,7 @@ &usb_1_qmpphy {
};
&wifi {
qcom,ath11k-calibration-variant = "SHIFTphone_8";
qcom,calibration-variant = "SHIFTphone_8";
status = "okay";
};

32
arch/arm64/boot/dts/qcom/qcs615.dtsi
View File

@ -417,6 +417,12 @@ reserved-memory {
#size-cells = <2>;
ranges;
aop_cmd_db_mem: aop-cmd-db@85f20000 {
compatible = "qcom,cmd-db";
reg = <0x0 0x85f20000 0x0 0x20000>;
no-map;
};
smem_region: smem@86000000 {
compatible = "qcom,smem";
reg = <0x0 0x86000000 0x0 0x200000>;
@ -453,6 +459,11 @@ qusb2_hstx_trim: hstx-trim@1f8 {
};
};
rng@793000 {
compatible = "qcom,qcs615-trng", "qcom,trng";
reg = <0x0 0x00793000 0x0 0x1000>;
};
sdhc_1: mmc@7c4000 {
compatible = "qcom,qcs615-sdhci", "qcom,sdhci-msm-v5";
reg = <0x0 0x007c4000 0x0 0x1000>,
@ -1819,7 +1830,7 @@ replicator@6046000 {
in-ports {
port {
replicator0_in: endpoint {
remote-endpoint= <&tmc_etf_out>;
remote-endpoint = <&tmc_etf_out>;
};
};
};
@ -1832,7 +1843,7 @@ port@1 {
reg = <1>;
replicator0_out1: endpoint {
remote-endpoint= <&replicator1_in>;
remote-endpoint = <&replicator1_in>;
};
};
};
@ -1872,7 +1883,7 @@ replicator@604a000 {
in-ports {
port {
replicator1_in: endpoint {
remote-endpoint= <&replicator0_out1>;
remote-endpoint = <&replicator0_out1>;
};
};
};
@ -1880,7 +1891,7 @@ replicator1_in: endpoint {
out-ports {
port {
replicator1_out: endpoint {
remote-endpoint= <&funnel_swao_in6>;
remote-endpoint = <&funnel_swao_in6>;
};
};
};
@ -2311,7 +2322,7 @@ port@6 {
reg = <6>;
funnel_swao_in6: endpoint {
remote-endpoint= <&replicator1_out>;
remote-endpoint = <&replicator1_out>;
};
};
@ -2319,7 +2330,7 @@ port@7 {
reg = <7>;
funnel_swao_in7: endpoint {
remote-endpoint= <&tpda_swao_out>;
remote-endpoint = <&tpda_swao_out>;
};
};
};
@ -2343,7 +2354,7 @@ tmc@6b09000 {
in-ports {
port {
tmc_etf_swao_in: endpoint {
remote-endpoint= <&funnel_swao_out>;
remote-endpoint = <&funnel_swao_out>;
};
};
};
@ -2351,7 +2362,7 @@ tmc_etf_swao_in: endpoint {
out-ports {
port {
tmc_etf_swao_out: endpoint {
remote-endpoint= <&replicator_swao_in>;
remote-endpoint = <&replicator_swao_in>;
};
};
};
@ -3197,7 +3208,7 @@ pdc: interrupt-controller@b220000 {
interrupt-controller;
};
aoss_qmp: power-controller@c300000 {
aoss_qmp: power-management@c300000 {
compatible = "qcom,qcs615-aoss-qmp", "qcom,aoss-qmp";
reg = <0x0 0x0c300000 0x0 0x400>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
@ -3304,7 +3315,6 @@ spmi_bus: spmi@c440000 {
#interrupt-cells = <4>;
#address-cells = <2>;
#size-cells = <0>;
cell-index = <0>;
qcom,channel = <0>;
qcom,ee = <0>;
};
@ -3590,6 +3600,7 @@ usb_1_dwc3: usb@a600000 {
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
@ -3651,6 +3662,7 @@ usb_2_dwc3: usb@a800000 {
phy-names = "usb2-phy";
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;

89
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso Normal file
View File

@ -0,0 +1,89 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/*
* Camera Sensor overlay on top of rb3gen2 core kit.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,camcc-sc7280.h>
#include <dt-bindings/gpio/gpio.h>
&camss {
vdda-phy-supply = <&vreg_l10c_0p88>;
vdda-pll-supply = <&vreg_l6b_1p2>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
/* The port index denotes CSIPHY id i.e. csiphy3 */
port@3 {
reg = <3>;
csiphy3_ep: endpoint {
clock-lanes = <7>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&imx577_ep>;
};
};
};
};
&cci1 {
status = "okay";
};
&cci1_i2c1 {
#address-cells = <1>;
#size-cells = <0>;
camera@1a {
compatible = "sony,imx577";
reg = <0x1a>;
reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "suspend";
pinctrl-0 = <&cam2_default>;
pinctrl-1 = <&cam2_suspend>;
clocks = <&camcc CAM_CC_MCLK3_CLK>;
assigned-clocks = <&camcc CAM_CC_MCLK3_CLK>;
assigned-clock-rates = <24000000>;
dovdd-supply = <&vreg_l18b_1p8>;
avdd-supply = <&vph_pwr>;
dvdd-supply = <&vph_pwr>;
port {
imx577_ep: endpoint {
link-frequencies = /bits/ 64 <600000000>;
data-lanes = <1 2 3 4>;
remote-endpoint = <&csiphy3_ep>;
};
};
};
};
&tlmm {
cam2_default: cam2-default-state {
pins = "gpio67";
function = "cam_mclk";
drive-strength = <2>;
bias-disable;
};
cam2_suspend: cam2-suspend-state {
pins = "gpio67";
function = "cam_mclk";
drive-strength = <2>;
bias-pull-down;
};
};

287
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
@ -9,6 +9,8 @@
#define PM7250B_SID 8
#define PM7250B_SID1 9
#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
#include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
@ -34,6 +36,7 @@ / {
aliases {
serial0 = &uart5;
serial1 = &uart7;
};
chosen {
@ -174,6 +177,7 @@ pmic-glink {
#address-cells = <1>;
#size-cells = <0>;
orientation-gpios = <&tlmm 140 GPIO_ACTIVE_HIGH>;
connector@0 {
compatible = "usb-c-connector";
@ -212,12 +216,107 @@ pmic_glink_sbu_in: endpoint {
};
};
thermal-zones {
sdm-skin-thermal {
thermal-sensors = <&pmk8350_adc_tm 3>;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
quiet-thermal {
thermal-sensors = <&pmk8350_adc_tm 1>;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
xo-thermal {
thermal-sensors = <&pmk8350_adc_tm 0>;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
};
wcn6750-pmu {
compatible = "qcom,wcn6750-pmu";
pinctrl-0 = <&bt_en>;
pinctrl-names = "default";
vddaon-supply = <&vreg_s7b_0p972>;
vddasd-supply = <&vreg_l11c_2p8>;
vddpmu-supply = <&vreg_s7b_0p972>;
vddrfa0p8-supply = <&vreg_s7b_0p972>;
vddrfa1p2-supply = <&vreg_s8b_1p272>;
vddrfa1p7-supply = <&vreg_s1b_1p872>;
vddrfa2p2-supply = <&vreg_s1c_2p19>;
bt-enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
regulators {
vreg_pmu_rfa_cmn: ldo0 {
regulator-name = "vreg_pmu_rfa_cmn";
};
vreg_pmu_aon_0p59: ldo1 {
regulator-name = "vreg_pmu_aon_0p59";
};
vreg_pmu_wlcx_0p8: ldo2 {
regulator-name = "vreg_pmu_wlcx_0p8";
};
vreg_pmu_wlmx_0p85: ldo3 {
regulator-name = "vreg_pmu_wlmx_0p85";
};
vreg_pmu_btcmx_0p85: ldo4 {
regulator-name = "vreg_pmu_btcmx_0p85";
};
vreg_pmu_rfa_0p8: ldo5 {
regulator-name = "vreg_pmu_rfa_0p8";
};
vreg_pmu_rfa_1p2: ldo6 {
regulator-name = "vreg_pmu_rfa_1p2";
};
vreg_pmu_rfa_1p7: ldo7 {
regulator-name = "vreg_pmu_rfa_1p7";
};
vreg_pmu_pcie_0p9: ldo8 {
regulator-name = "vreg_pmu_pcie_0p9";
};
vreg_pmu_pcie_1p8: ldo9 {
regulator-name = "vreg_pmu_pcie_1p8";
};
};
};
};
&apps_rsc {
@ -745,6 +844,36 @@ kypd_vol_up_n: kypd-vol-up-n-state {
};
};
&pm7325_temp_alarm {
io-channels = <&pmk8350_vadc PM7325_ADC7_DIE_TEMP>;
io-channel-names = "thermal";
};
&pmk8350_adc_tm {
status = "okay";
xo-therm@0 {
reg = <0>;
io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
quiet-therm@1 {
reg = <1>;
io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM1_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
sdm-skin-therm@3 {
reg = <3>;
io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM3_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
};
&pm8350c_pwm {
nvmem = <&pmk8350_sdam_21>,
<&pmk8350_sdam_22>;
@ -789,6 +918,44 @@ &pmk8350_rtc {
status = "okay";
};
&pmk8350_vadc {
channel@3 {
reg = <PMK8350_ADC7_DIE_TEMP>;
label = "pmk8350_die_temp";
qcom,pre-scaling = <1 1>;
};
channel@44 {
reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>;
label = "xo_therm";
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
qcom,ratiometric;
};
channel@103 {
reg = <PM7325_ADC7_DIE_TEMP>;
label = "pm7325_die_temp";
qcom,pre-scaling = <1 1>;
};
channel@144 {
reg = <PM7325_ADC7_AMUX_THM1_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
label = "pm7325_quiet_therm";
};
channel@146 {
reg = <PM7325_ADC7_AMUX_THM3_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
label = "pm7325_sdm_skin_therm";
};
};
&pon_pwrkey {
status = "okay";
};
@ -799,6 +966,39 @@ &pon_resin {
status = "okay";
};
&qup_uart7_cts {
/*
* Configure a bias-bus-hold on CTS to lower power
* usage when Bluetooth is turned off. Bus hold will
* maintain a low power state regardless of whether
* the Bluetooth module drives the pin in either
* direction or leaves the pin fully unpowered.
*/
bias-bus-hold;
};
&qup_uart7_rts {
/* We'll drive RTS, so no pull */
drive-strength = <2>;
bias-disable;
};
&qup_uart7_rx {
/*
* Configure a pull-up on RX. This is needed to avoid
* garbage data when the TX pin of the Bluetooth module is
* in tri-state (module powered off or not driving the
* signal yet).
*/
bias-pull-up;
};
&qup_uart7_tx {
/* We'll drive TX, so no pull */
drive-strength = <2>;
bias-disable;
};
&qupv3_id_0 {
status = "okay";
};
@ -842,12 +1042,90 @@ &sdhc_2 {
&tlmm {
gpio-reserved-ranges = <32 2>, /* ADSP */
<48 4>; /* NFC */
bt_en: bt-en-state {
pins = "gpio85";
function = "gpio";
output-low;
bias-disable;
};
qup_uart7_sleep_cts: qup-uart7-sleep-cts-state {
pins = "gpio28";
function = "gpio";
/*
* Configure a bias-bus-hold on CTS to lower power
* usage when Bluetooth is turned off. Bus hold will
* maintain a low power state regardless of whether
* the Bluetooth module drives the pin in either
* direction or leaves the pin fully unpowered.
*/
bias-bus-hold;
};
qup_uart7_sleep_rts: qup-uart7-sleep-rts-state {
pins = "gpio29";
function = "gpio";
/*
* Configure pull-down on RTS. As RTS is active low
* signal, pull it low to indicate the BT SoC that it
* can wakeup the system anytime from suspend state by
* pulling RX low (by sending wakeup bytes).
*/
bias-pull-down;
};
qup_uart7_sleep_rx: qup-uart7-sleep-rx-state {
pins = "gpio31";
function = "gpio";
/*
* Configure a pull-up on RX. This is needed to avoid
* garbage data when the TX pin of the Bluetooth module
* is floating which may cause spurious wakeups.
*/
bias-pull-up;
};
qup_uart7_sleep_tx: qup-uart7-sleep-tx-state {
pins = "gpio30";
function = "gpio";
/*
* Configure pull-up on TX when it isn't actively driven
* to prevent BT SoC from receiving garbage during sleep.
*/
bias-pull-up;
};
};
&uart5 {
status = "okay";
};
&uart7 {
/delete-property/ interrupts;
interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
pinctrl-1 = <&qup_uart7_sleep_cts>,
<&qup_uart7_sleep_rts>,
<&qup_uart7_sleep_tx>,
<&qup_uart7_sleep_rx>;
pinctrl-names = "default",
"sleep";
status = "okay";
bluetooth: bluetooth {
compatible = "qcom,wcn6750-bt";
vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
vddaon-supply = <&vreg_pmu_aon_0p59>;
vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>;
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
max-speed = <3200000>;
};
};
&usb_1 {
status = "okay";
};
@ -919,7 +1197,7 @@ &venus {
&wifi {
memory-region = <&wlan_fw_mem>;
qcom,ath11k-calibration-variant = "Qualcomm_rb3gen2";
qcom,calibration-variant = "Qualcomm_rb3gen2";
status = "okay";
};
@ -986,3 +1264,8 @@ sd_cd: sd-cd-state {
bias-pull-up;
};
};
&lpass_audiocc {
compatible = "qcom,qcm6490-lpassaudiocc";
/delete-property/ power-domains;
};

51
arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi Normal file
View File

@ -0,0 +1,51 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/input/input.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pmm8620au_0: pmic@0 {
compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pmm8620au_0_rtc: rtc@6100 {
compatible = "qcom,pmk8350-rtc";
reg = <0x6100>, <0x6200>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
allow-set-time;
};
pmm8620au_0_gpios: gpio@8800 {
compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pmm8620au_0_gpios 0 0 12>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pmm8650au_1: pmic@2 {
compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
reg = <0x2 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pmm8650au_1_gpios: gpio@8800 {
compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pmm8650au_1_gpios 0 0 12>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};

37
arch/arm64/boot/dts/qcom/qcs8300-ride.dts
View File

@ -9,6 +9,7 @@
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "qcs8300.dtsi"
#include "qcs8300-pmics.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS8300 Ride";
compatible = "qcom,qcs8300-ride", "qcom,qcs8300";
@ -21,6 +22,16 @@ aliases {
chosen {
stdout-path = "serial0:115200n8";
};
regulator-usb2-vbus {
compatible = "regulator-fixed";
regulator-name = "USB2_VBUS";
gpio = <&pmm8650au_1_gpios 7 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&usb2_en>;
pinctrl-names = "default";
enable-active-high;
regulator-always-on;
};
};
&apps_rsc {
@ -257,7 +268,6 @@ queue3 {
mtl_tx_setup: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-sp;
queue0 {
snps,dcb-algorithm;
@ -285,6 +295,15 @@ queue3 {
};
};
&pmm8650au_1_gpios {
usb2_en: usb2-en-state {
pins = "gpio7";
function = "normal";
output-enable;
power-source = <0>;
};
};
&qupv3_id_0 {
status = "okay";
};
@ -354,6 +373,14 @@ &usb_1_hsphy {
status = "okay";
};
&usb_2_hsphy {
vdda-pll-supply = <&vreg_l7a>;
vdda18-supply = <&vreg_l7c>;
vdda33-supply = <&vreg_l9a>;
status = "okay";
};
&usb_qmpphy {
vdda-phy-supply = <&vreg_l7a>;
vdda-pll-supply = <&vreg_l5a>;
@ -368,3 +395,11 @@ &usb_1 {
&usb_1_dwc3 {
dr_mode = "peripheral";
};
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
dr_mode = "host";
};

2057
arch/arm64/boot/dts/qcom/qcs8300.dtsi
View File

File diff suppressed because it is too large Load Diff

9
arch/arm64/boot/dts/qcom/qdu1000.dtsi
View File

@ -47,7 +47,7 @@ cpu0: cpu@0 {
enable-method = "psci";
power-domains = <&cpu_pd0>;
power-domain-names = "psci";
qcom,freq-domains = <&cpufreq_hw 0>;
qcom,freq-domain = <&cpufreq_hw 0>;
next-level-cache = <&l2_0>;
l2_0: l2-cache {
compatible = "cache";
@ -70,7 +70,7 @@ cpu1: cpu@100 {
enable-method = "psci";
power-domains = <&cpu_pd1>;
power-domain-names = "psci";
qcom,freq-domains = <&cpufreq_hw 0>;
qcom,freq-domain = <&cpufreq_hw 0>;
next-level-cache = <&l2_100>;
l2_100: l2-cache {
compatible = "cache";
@ -88,7 +88,7 @@ cpu2: cpu@200 {
enable-method = "psci";
power-domains = <&cpu_pd2>;
power-domain-names = "psci";
qcom,freq-domains = <&cpufreq_hw 0>;
qcom,freq-domain = <&cpufreq_hw 0>;
next-level-cache = <&l2_200>;
l2_200: l2-cache {
compatible = "cache";
@ -106,7 +106,7 @@ cpu3: cpu@300 {
enable-method = "psci";
power-domains = <&cpu_pd3>;
power-domain-names = "psci";
qcom,freq-domains = <&cpufreq_hw 0>;
qcom,freq-domain = <&cpufreq_hw 0>;
next-level-cache = <&l2_300>;
l2_300: l2-cache {
compatible = "cache";
@ -1022,6 +1022,7 @@ usb_1_dwc3: usb@a600000 {
iommus = <&apps_smmu 0xc0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;

2
arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
View File

@ -620,7 +620,7 @@ &wifi {
vdd-1.8-xo-supply = <&pm4125_l13>;
vdd-1.3-rfa-supply = <&pm4125_l10>;
vdd-3.3-ch0-supply = <&pm4125_l22>;
qcom,ath10k-calibration-variant = "Thundercomm_RB1";
qcom,calibration-variant = "Thundercomm_RB1";
firmware-name = "qcm2290";
status = "okay";
};

4
arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
View File

@ -110,8 +110,6 @@ sound {
pinctrl-0 = <&lpi_i2s2_active>;
pinctrl-names = "default";
model = "Qualcomm-RB2-WSA8815-Speakers-DMIC0";
audio-routing = "MM_DL1", "MultiMedia1 Playback",
"MM_DL2", "MultiMedia2 Playback";
mm1-dai-link {
link-name = "MultiMedia1";
@ -749,7 +747,7 @@ &wifi {
vdd-1.8-xo-supply = <&vreg_l16a_1p3>;
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l23a_3p3>;
qcom,ath10k-calibration-variant = "Thundercomm_RB2";
qcom,calibration-variant = "Thundercomm_RB2";
firmware-name = "qrb4210";
status = "okay";

11
arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dtso
View File

@ -9,17 +9,6 @@
#include <dt-bindings/clock/qcom,camcc-sm8250.h>
#include <dt-bindings/gpio/gpio.h>
/ {
reserved-memory {
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
reusable;
linux,cma-default;
};
};
};
&camcc {
status = "okay";
};

31
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
View File

@ -1008,15 +1008,21 @@ dai@20 {
&q6asmdai {
dai@0 {
reg = <0>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
dai@1 {
reg = <1>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
dai@2 {
reg = <2>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
dai@3 {
direction = <Q6ASM_DAI_RX>;
is-compress-dai;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA4>;
};
};
@ -1032,6 +1038,12 @@ &sdhc_2 {
no-mmc;
};
&slpi {
firmware-name = "qcom/sm8250/Thundercomm/RB5/slpi.mbn";
status = "okay";
};
&sound {
compatible = "qcom,qrb5165-rb5-sndcard";
pinctrl-0 = <&tert_mi2s_active>;
@ -1041,10 +1053,7 @@ &sound {
"SpkrLeft IN", "WSA_SPK1 OUT",
"SpkrRight IN", "WSA_SPK2 OUT",
"VA DMIC0", "vdd-micb",
"VA DMIC1", "vdd-micb",
"MM_DL1", "MultiMedia1 Playback",
"MM_DL2", "MultiMedia2 Playback",
"MultiMedia3 Capture", "MM_UL3";
"VA DMIC1", "vdd-micb";
mm1-dai-link {
link-name = "MultiMedia1";
@ -1067,6 +1076,14 @@ cpu {
};
};
mm4-dai-link {
link-name = "MultiMedia4";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
};
};
hdmi-dai-link {
link-name = "HDMI Playback";
cpu {

5
arch/arm64/boot/dts/qcom/sa8155p-adp.dts
View File

@ -326,7 +326,6 @@ &ethernet {
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii";
max-speed = <1000>;
mdio {
compatible = "snps,dwmac-mdio";
@ -383,12 +382,12 @@ &qupv3_id_1 {
&remoteproc_adsp {
status = "okay";
firmware-name = "qcom/sa8155p/adsp.mdt";
firmware-name = "qcom/sa8155p/adsp.mbn";
};
&remoteproc_cdsp {
status = "okay";
firmware-name = "qcom/sa8155p/cdsp.mdt";
firmware-name = "qcom/sa8155p/cdsp.mbn";
};
&sdhc_2 {

4
arch/arm64/boot/dts/qcom/sa8540p-ride.dts
View File

@ -155,7 +155,6 @@ &ethernet0 {
snps,mtl-rx-config = <&ethernet0_mtl_rx_setup>;
snps,mtl-tx-config = <&ethernet0_mtl_tx_setup>;
max-speed = <1000>;
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii-txid";
@ -225,7 +224,6 @@ queue3 {
ethernet0_mtl_tx_setup: tx-queues-config {
snps,tx-queues-to-use = <1>;
snps,tx-sched-sp;
queue0 {
snps,dcb-algorithm;
@ -257,7 +255,6 @@ &ethernet1 {
snps,mtl-rx-config = <&ethernet1_mtl_rx_setup>;
snps,mtl-tx-config = <&ethernet1_mtl_tx_setup>;
max-speed = <1000>;
phy-mode = "rgmii-txid";
pinctrl-names = "default";
@ -302,7 +299,6 @@ queue3 {
ethernet1_mtl_tx_setup: tx-queues-config {
snps,tx-queues-to-use = <1>;
snps,tx-sched-sp;
queue0 {
snps,dcb-algorithm;

5
arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
View File

@ -411,7 +411,6 @@ queue3 {
mtl_tx_setup: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-sp;
queue0 {
snps,dcb-algorithm;
@ -480,7 +479,6 @@ queue3 {
mtl_tx_setup1: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-sp;
queue0 {
snps,dcb-algorithm;
@ -878,7 +876,7 @@ wifi@0 {
compatible = "pci17cb,1101";
reg = <0x10000 0x0 0x0 0x0 0x0>;
qcom,ath11k-calibration-variant = "QC_SA8775P_Ride";
qcom,calibration-variant = "QC_SA8775P_Ride";
vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
vddaon-supply = <&vreg_pmu_aon_0p59>;
@ -937,6 +935,7 @@ &uart17 {
bluetooth {
compatible = "qcom,wcn6855-bt";
firmware-name = "QCA6698/hpnv21", "QCA6698/hpbtfw21.tlv";
vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
vddaon-supply = <&vreg_pmu_aon_0p59>;

422
arch/arm64/boot/dts/qcom/sa8775p.dtsi
View File

@ -2413,20 +2413,40 @@ cryptobam: dma-controller@1dc4000 {
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
qcom,ee = <0>;
qcom,num-ees = <4>;
num-channels = <20>;
qcom,controlled-remotely;
iommus = <&apps_smmu 0x480 0x00>,
<&apps_smmu 0x481 0x00>;
};
crypto: crypto@1dfa000 {
compatible = "qcom,sa8775p-qce", "qcom,qce";
reg = <0x0 0x01dfa000 0x0 0x6000>;
dmas = <&cryptobam 4>, <&cryptobam 5>;
dma-names = "rx", "tx";
iommus = <&apps_smmu 0x480 0x00>,
<&apps_smmu 0x481 0x00>;
interconnects = <&aggre2_noc MASTER_CRYPTO_CORE0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "memory";
ctcu@4001000 {
compatible = "qcom,sa8775p-ctcu";
reg = <0x0 0x04001000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ctcu_in0: endpoint {
remote-endpoint = <&etr0_out>;
};
};
port@1 {
reg = <1>;
ctcu_in1: endpoint {
remote-endpoint = <&etr1_out>;
};
};
};
};
stm: stm@4002000 {
@ -2633,6 +2653,122 @@ qdss_funnel_in1: endpoint {
};
};
replicator@4046000 {
compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
reg = <0x0 0x04046000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
in-ports {
port {
qdss_rep_in: endpoint {
remote-endpoint = <&swao_rep_out0>;
};
};
};
out-ports {
port {
qdss_rep_out0: endpoint {
remote-endpoint = <&etr_rep_in>;
};
};
};
};
tmc_etr: tmc@4048000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x0 0x04048000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
iommus = <&apps_smmu 0x04c0 0x00>;
arm,scatter-gather;
in-ports {
port {
etr0_in: endpoint {
remote-endpoint = <&etr_rep_out0>;
};
};
};
out-ports {
port {
etr0_out: endpoint {
remote-endpoint = <&ctcu_in0>;
};
};
};
};
replicator@404e000 {
compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
reg = <0x0 0x0404e000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
in-ports {
port {
etr_rep_in: endpoint {
remote-endpoint = <&qdss_rep_out0>;
};
};
};
out-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
etr_rep_out0: endpoint {
remote-endpoint = <&etr0_in>;
};
};
port@1 {
reg = <1>;
etr_rep_out1: endpoint {
remote-endpoint = <&etr1_in>;
};
};
};
};
tmc_etr1: tmc@404f000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x0 0x0404f000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
iommus = <&apps_smmu 0x04a0 0x40>;
arm,scatter-gather;
arm,buffer-size = <0x400000>;
in-ports {
port {
etr1_in: endpoint {
remote-endpoint = <&etr_rep_out1>;
};
};
};
out-ports {
port {
etr1_out: endpoint {
remote-endpoint = <&ctcu_in1>;
};
};
};
};
funnel@4b04000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0x0 0x4b04000 0x0 0x1000>;
@ -2708,6 +2844,14 @@ out-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
swao_rep_out0: endpoint {
remote-endpoint = <&qdss_rep_in>;
};
};
port@1 {
reg = <1>;
swao_rep_out1: endpoint {
@ -3815,10 +3959,10 @@ mdss0: display-subsystem@ae00000 {
reg-names = "mdss";
/* same path used twice */
interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
interconnect-names = "mdp0-mem",
@ -3848,7 +3992,7 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
mdss0_mdp: display-controller@ae01000 {
compatible = "qcom,sa8775p-dpu";
reg = <0x0 0x0ae01000 0x0 0x8f000>,
<0x0 0x0aeb0000 0x0 0x2008>;
<0x0 0x0aeb0000 0x0 0x3000>;
reg-names = "mdp", "vbif";
clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
@ -4660,6 +4804,10 @@ cpufreq_hw: cpufreq@18591000 {
<0x0 0x18593000 0x0 0x1000>;
reg-names = "freq-domain0", "freq-domain1";
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1";
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
clock-names = "xo", "alternate";
@ -4903,15 +5051,7 @@ compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
iommus = <&apps_smmu 0x2141 0x04a0>,
<&apps_smmu 0x2161 0x04a0>,
<&apps_smmu 0x2181 0x0400>,
<&apps_smmu 0x21c1 0x04a0>,
<&apps_smmu 0x21e1 0x04a0>,
<&apps_smmu 0x2541 0x04a0>,
<&apps_smmu 0x2561 0x04a0>,
<&apps_smmu 0x2581 0x0400>,
<&apps_smmu 0x25c1 0x04a0>,
<&apps_smmu 0x25e1 0x04a0>;
<&apps_smmu 0x2181 0x0400>;
dma-coherent;
};
@ -4919,15 +5059,7 @@ compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
iommus = <&apps_smmu 0x2142 0x04a0>,
<&apps_smmu 0x2162 0x04a0>,
<&apps_smmu 0x2182 0x0400>,
<&apps_smmu 0x21c2 0x04a0>,
<&apps_smmu 0x21e2 0x04a0>,
<&apps_smmu 0x2542 0x04a0>,
<&apps_smmu 0x2562 0x04a0>,
<&apps_smmu 0x2582 0x0400>,
<&apps_smmu 0x25c2 0x04a0>,
<&apps_smmu 0x25e2 0x04a0>;
<&apps_smmu 0x2182 0x0400>;
dma-coherent;
};
@ -4935,15 +5067,7 @@ compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x2143 0x04a0>,
<&apps_smmu 0x2163 0x04a0>,
<&apps_smmu 0x2183 0x0400>,
<&apps_smmu 0x21c3 0x04a0>,
<&apps_smmu 0x21e3 0x04a0>,
<&apps_smmu 0x2543 0x04a0>,
<&apps_smmu 0x2563 0x04a0>,
<&apps_smmu 0x2583 0x0400>,
<&apps_smmu 0x25c3 0x04a0>,
<&apps_smmu 0x25e3 0x04a0>;
<&apps_smmu 0x2183 0x0400>;
dma-coherent;
};
@ -4951,15 +5075,7 @@ compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x2144 0x04a0>,
<&apps_smmu 0x2164 0x04a0>,
<&apps_smmu 0x2184 0x0400>,
<&apps_smmu 0x21c4 0x04a0>,
<&apps_smmu 0x21e4 0x04a0>,
<&apps_smmu 0x2544 0x04a0>,
<&apps_smmu 0x2564 0x04a0>,
<&apps_smmu 0x2584 0x0400>,
<&apps_smmu 0x25c4 0x04a0>,
<&apps_smmu 0x25e4 0x04a0>;
<&apps_smmu 0x2184 0x0400>;
dma-coherent;
};
@ -4967,15 +5083,7 @@ compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x2145 0x04a0>,
<&apps_smmu 0x2165 0x04a0>,
<&apps_smmu 0x2185 0x0400>,
<&apps_smmu 0x21c5 0x04a0>,
<&apps_smmu 0x21e5 0x04a0>,
<&apps_smmu 0x2545 0x04a0>,
<&apps_smmu 0x2565 0x04a0>,
<&apps_smmu 0x2585 0x0400>,
<&apps_smmu 0x25c5 0x04a0>,
<&apps_smmu 0x25e5 0x04a0>;
<&apps_smmu 0x2185 0x0400>;
dma-coherent;
};
@ -4983,15 +5091,7 @@ compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x2146 0x04a0>,
<&apps_smmu 0x2166 0x04a0>,
<&apps_smmu 0x2186 0x0400>,
<&apps_smmu 0x21c6 0x04a0>,
<&apps_smmu 0x21e6 0x04a0>,
<&apps_smmu 0x2546 0x04a0>,
<&apps_smmu 0x2566 0x04a0>,
<&apps_smmu 0x2586 0x0400>,
<&apps_smmu 0x25c6 0x04a0>,
<&apps_smmu 0x25e6 0x04a0>;
<&apps_smmu 0x2186 0x0400>;
dma-coherent;
};
@ -4999,15 +5099,7 @@ compute-cb@7 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x2147 0x04a0>,
<&apps_smmu 0x2167 0x04a0>,
<&apps_smmu 0x2187 0x0400>,
<&apps_smmu 0x21c7 0x04a0>,
<&apps_smmu 0x21e7 0x04a0>,
<&apps_smmu 0x2547 0x04a0>,
<&apps_smmu 0x2567 0x04a0>,
<&apps_smmu 0x2587 0x0400>,
<&apps_smmu 0x25c7 0x04a0>,
<&apps_smmu 0x25e7 0x04a0>;
<&apps_smmu 0x2187 0x0400>;
dma-coherent;
};
@ -5015,15 +5107,7 @@ compute-cb@8 {
compatible = "qcom,fastrpc-compute-cb";
reg = <8>;
iommus = <&apps_smmu 0x2148 0x04a0>,
<&apps_smmu 0x2168 0x04a0>,
<&apps_smmu 0x2188 0x0400>,
<&apps_smmu 0x21c8 0x04a0>,
<&apps_smmu 0x21e8 0x04a0>,
<&apps_smmu 0x2548 0x04a0>,
<&apps_smmu 0x2568 0x04a0>,
<&apps_smmu 0x2588 0x0400>,
<&apps_smmu 0x25c8 0x04a0>,
<&apps_smmu 0x25e8 0x04a0>;
<&apps_smmu 0x2188 0x0400>;
dma-coherent;
};
@ -5031,31 +5115,7 @@ compute-cb@9 {
compatible = "qcom,fastrpc-compute-cb";
reg = <9>;
iommus = <&apps_smmu 0x2149 0x04a0>,
<&apps_smmu 0x2169 0x04a0>,
<&apps_smmu 0x2189 0x0400>,
<&apps_smmu 0x21c9 0x04a0>,
<&apps_smmu 0x21e9 0x04a0>,
<&apps_smmu 0x2549 0x04a0>,
<&apps_smmu 0x2569 0x04a0>,
<&apps_smmu 0x2589 0x0400>,
<&apps_smmu 0x25c9 0x04a0>,
<&apps_smmu 0x25e9 0x04a0>;
dma-coherent;
};
compute-cb@10 {
compatible = "qcom,fastrpc-compute-cb";
reg = <10>;
iommus = <&apps_smmu 0x214a 0x04a0>,
<&apps_smmu 0x216a 0x04a0>,
<&apps_smmu 0x218a 0x0400>,
<&apps_smmu 0x21ca 0x04a0>,
<&apps_smmu 0x21ea 0x04a0>,
<&apps_smmu 0x254a 0x04a0>,
<&apps_smmu 0x256a 0x04a0>,
<&apps_smmu 0x258a 0x0400>,
<&apps_smmu 0x25ca 0x04a0>,
<&apps_smmu 0x25ea 0x04a0>;
<&apps_smmu 0x2189 0x0400>;
dma-coherent;
};
@ -5063,15 +5123,7 @@ compute-cb@11 {
compatible = "qcom,fastrpc-compute-cb";
reg = <11>;
iommus = <&apps_smmu 0x214b 0x04a0>,
<&apps_smmu 0x216b 0x04a0>,
<&apps_smmu 0x218b 0x0400>,
<&apps_smmu 0x21cb 0x04a0>,
<&apps_smmu 0x21eb 0x04a0>,
<&apps_smmu 0x254b 0x04a0>,
<&apps_smmu 0x256b 0x04a0>,
<&apps_smmu 0x258b 0x0400>,
<&apps_smmu 0x25cb 0x04a0>,
<&apps_smmu 0x25eb 0x04a0>;
<&apps_smmu 0x218b 0x0400>;
dma-coherent;
};
};
@ -5131,15 +5183,7 @@ compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
iommus = <&apps_smmu 0x2941 0x04a0>,
<&apps_smmu 0x2961 0x04a0>,
<&apps_smmu 0x2981 0x0400>,
<&apps_smmu 0x29c1 0x04a0>,
<&apps_smmu 0x29e1 0x04a0>,
<&apps_smmu 0x2d41 0x04a0>,
<&apps_smmu 0x2d61 0x04a0>,
<&apps_smmu 0x2d81 0x0400>,
<&apps_smmu 0x2dc1 0x04a0>,
<&apps_smmu 0x2de1 0x04a0>;
<&apps_smmu 0x2981 0x0400>;
dma-coherent;
};
@ -5147,15 +5191,7 @@ compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
iommus = <&apps_smmu 0x2942 0x04a0>,
<&apps_smmu 0x2962 0x04a0>,
<&apps_smmu 0x2982 0x0400>,
<&apps_smmu 0x29c2 0x04a0>,
<&apps_smmu 0x29e2 0x04a0>,
<&apps_smmu 0x2d42 0x04a0>,
<&apps_smmu 0x2d62 0x04a0>,
<&apps_smmu 0x2d82 0x0400>,
<&apps_smmu 0x2dc2 0x04a0>,
<&apps_smmu 0x2de2 0x04a0>;
<&apps_smmu 0x2982 0x0400>;
dma-coherent;
};
@ -5163,15 +5199,7 @@ compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x2943 0x04a0>,
<&apps_smmu 0x2963 0x04a0>,
<&apps_smmu 0x2983 0x0400>,
<&apps_smmu 0x29c3 0x04a0>,
<&apps_smmu 0x29e3 0x04a0>,
<&apps_smmu 0x2d43 0x04a0>,
<&apps_smmu 0x2d63 0x04a0>,
<&apps_smmu 0x2d83 0x0400>,
<&apps_smmu 0x2dc3 0x04a0>,
<&apps_smmu 0x2de3 0x04a0>;
<&apps_smmu 0x2983 0x0400>;
dma-coherent;
};
@ -5179,15 +5207,7 @@ compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x2944 0x04a0>,
<&apps_smmu 0x2964 0x04a0>,
<&apps_smmu 0x2984 0x0400>,
<&apps_smmu 0x29c4 0x04a0>,
<&apps_smmu 0x29e4 0x04a0>,
<&apps_smmu 0x2d44 0x04a0>,
<&apps_smmu 0x2d64 0x04a0>,
<&apps_smmu 0x2d84 0x0400>,
<&apps_smmu 0x2dc4 0x04a0>,
<&apps_smmu 0x2de4 0x04a0>;
<&apps_smmu 0x2984 0x0400>;
dma-coherent;
};
@ -5195,15 +5215,7 @@ compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x2945 0x04a0>,
<&apps_smmu 0x2965 0x04a0>,
<&apps_smmu 0x2985 0x0400>,
<&apps_smmu 0x29c5 0x04a0>,
<&apps_smmu 0x29e5 0x04a0>,
<&apps_smmu 0x2d45 0x04a0>,
<&apps_smmu 0x2d65 0x04a0>,
<&apps_smmu 0x2d85 0x0400>,
<&apps_smmu 0x2dc5 0x04a0>,
<&apps_smmu 0x2de5 0x04a0>;
<&apps_smmu 0x2985 0x0400>;
dma-coherent;
};
@ -5211,15 +5223,7 @@ compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x2946 0x04a0>,
<&apps_smmu 0x2966 0x04a0>,
<&apps_smmu 0x2986 0x0400>,
<&apps_smmu 0x29c6 0x04a0>,
<&apps_smmu 0x29e6 0x04a0>,
<&apps_smmu 0x2d46 0x04a0>,
<&apps_smmu 0x2d66 0x04a0>,
<&apps_smmu 0x2d86 0x0400>,
<&apps_smmu 0x2dc6 0x04a0>,
<&apps_smmu 0x2de6 0x04a0>;
<&apps_smmu 0x2986 0x0400>;
dma-coherent;
};
@ -5227,15 +5231,7 @@ compute-cb@7 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x2947 0x04a0>,
<&apps_smmu 0x2967 0x04a0>,
<&apps_smmu 0x2987 0x0400>,
<&apps_smmu 0x29c7 0x04a0>,
<&apps_smmu 0x29e7 0x04a0>,
<&apps_smmu 0x2d47 0x04a0>,
<&apps_smmu 0x2d67 0x04a0>,
<&apps_smmu 0x2d87 0x0400>,
<&apps_smmu 0x2dc7 0x04a0>,
<&apps_smmu 0x2de7 0x04a0>;
<&apps_smmu 0x2987 0x0400>;
dma-coherent;
};
@ -5243,15 +5239,7 @@ compute-cb@8 {
compatible = "qcom,fastrpc-compute-cb";
reg = <8>;
iommus = <&apps_smmu 0x2948 0x04a0>,
<&apps_smmu 0x2968 0x04a0>,
<&apps_smmu 0x2988 0x0400>,
<&apps_smmu 0x29c8 0x04a0>,
<&apps_smmu 0x29e8 0x04a0>,
<&apps_smmu 0x2d48 0x04a0>,
<&apps_smmu 0x2d68 0x04a0>,
<&apps_smmu 0x2d88 0x0400>,
<&apps_smmu 0x2dc8 0x04a0>,
<&apps_smmu 0x2de8 0x04a0>;
<&apps_smmu 0x2988 0x0400>;
dma-coherent;
};
@ -5259,15 +5247,7 @@ compute-cb@9 {
compatible = "qcom,fastrpc-compute-cb";
reg = <9>;
iommus = <&apps_smmu 0x2949 0x04a0>,
<&apps_smmu 0x2969 0x04a0>,
<&apps_smmu 0x2989 0x0400>,
<&apps_smmu 0x29c9 0x04a0>,
<&apps_smmu 0x29e9 0x04a0>,
<&apps_smmu 0x2d49 0x04a0>,
<&apps_smmu 0x2d69 0x04a0>,
<&apps_smmu 0x2d89 0x0400>,
<&apps_smmu 0x2dc9 0x04a0>,
<&apps_smmu 0x2de9 0x04a0>;
<&apps_smmu 0x2989 0x0400>;
dma-coherent;
};
@ -5275,15 +5255,7 @@ compute-cb@10 {
compatible = "qcom,fastrpc-compute-cb";
reg = <10>;
iommus = <&apps_smmu 0x294a 0x04a0>,
<&apps_smmu 0x296a 0x04a0>,
<&apps_smmu 0x298a 0x0400>,
<&apps_smmu 0x29ca 0x04a0>,
<&apps_smmu 0x29ea 0x04a0>,
<&apps_smmu 0x2d4a 0x04a0>,
<&apps_smmu 0x2d6a 0x04a0>,
<&apps_smmu 0x2d8a 0x0400>,
<&apps_smmu 0x2dca 0x04a0>,
<&apps_smmu 0x2dea 0x04a0>;
<&apps_smmu 0x298a 0x0400>;
dma-coherent;
};
@ -5291,15 +5263,7 @@ compute-cb@11 {
compatible = "qcom,fastrpc-compute-cb";
reg = <11>;
iommus = <&apps_smmu 0x294b 0x04a0>,
<&apps_smmu 0x296b 0x04a0>,
<&apps_smmu 0x298b 0x0400>,
<&apps_smmu 0x29cb 0x04a0>,
<&apps_smmu 0x29eb 0x04a0>,
<&apps_smmu 0x2d4b 0x04a0>,
<&apps_smmu 0x2d6b 0x04a0>,
<&apps_smmu 0x2d8b 0x0400>,
<&apps_smmu 0x2dcb 0x04a0>,
<&apps_smmu 0x2deb 0x04a0>;
<&apps_smmu 0x298b 0x0400>;
dma-coherent;
};
@ -5307,15 +5271,7 @@ compute-cb@12 {
compatible = "qcom,fastrpc-compute-cb";
reg = <12>;
iommus = <&apps_smmu 0x294c 0x04a0>,
<&apps_smmu 0x296c 0x04a0>,
<&apps_smmu 0x298c 0x0400>,
<&apps_smmu 0x29cc 0x04a0>,
<&apps_smmu 0x29ec 0x04a0>,
<&apps_smmu 0x2d4c 0x04a0>,
<&apps_smmu 0x2d6c 0x04a0>,
<&apps_smmu 0x2d8c 0x0400>,
<&apps_smmu 0x2dcc 0x04a0>,
<&apps_smmu 0x2dec 0x04a0>;
<&apps_smmu 0x298c 0x0400>;
dma-coherent;
};
@ -5323,15 +5279,7 @@ compute-cb@13 {
compatible = "qcom,fastrpc-compute-cb";
reg = <13>;
iommus = <&apps_smmu 0x294d 0x04a0>,
<&apps_smmu 0x296d 0x04a0>,
<&apps_smmu 0x298d 0x0400>,
<&apps_smmu 0x29Cd 0x04a0>,
<&apps_smmu 0x29ed 0x04a0>,
<&apps_smmu 0x2d4d 0x04a0>,
<&apps_smmu 0x2d6d 0x04a0>,
<&apps_smmu 0x2d8d 0x0400>,
<&apps_smmu 0x2dcd 0x04a0>,
<&apps_smmu 0x2ded 0x04a0>;
<&apps_smmu 0x298d 0x0400>;
dma-coherent;
};
};

61
arch/arm64/boot/dts/qcom/sar2130p.dtsi
View File

@ -1474,6 +1474,67 @@ pcie@0 {
};
};
pcie1_ep: pcie-ep@1c08000 {
compatible = "qcom,sar2130p-pcie-ep";
reg = <0x0 0x01c08000 0x0 0x3000>,
<0x0 0x40000000 0x0 0xf1d>,
<0x0 0x40000f20 0x0 0xa8>,
<0x0 0x40001000 0x0 0x1000>,
<0x0 0x40200000 0x0 0x1000000>,
<0x0 0x01c0b000 0x0 0x1000>,
<0x0 0x40002000 0x0 0x2000>;
reg-names = "parf",
"dbi",
"elbi",
"atu",
"addr_space",
"mmio",
"dma";
clocks = <&gcc GCC_PCIE_1_AUX_CLK>,
<&gcc GCC_PCIE_1_CFG_AHB_CLK>,
<&gcc GCC_PCIE_1_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_1_SLV_AXI_CLK>,
<&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
<&gcc GCC_DDRSS_PCIE_SF_CLK>,
<&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
<&gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK>,
<&gcc GCC_QMIP_PCIE_AHB_CLK>;
clock-names = "aux",
"cfg",
"bus_master",
"bus_slave",
"slave_q2a",
"ddrss_sf_tbu",
"aggre_noc_axi",
"cnoc_sf_axi",
"qmip_pcie_ahb";
interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global",
"doorbell",
"dma";
interconnects = <&pcie_noc MASTER_PCIE_1 QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&config_noc SLAVE_PCIE_1 QCOM_ICC_TAG_ACTIVE_ONLY>;
interconnect-names = "pcie-mem",
"cpu-pcie";
iommus = <&apps_smmu 0x1e00 0x1>;
resets = <&gcc GCC_PCIE_1_BCR>;
reset-names = "core";
power-domains = <&gcc PCIE_1_GDSC>;
phys = <&pcie1_phy>;
phy-names = "pciephy";
num-lanes = <2>;
status = "disabled";
};
pcie1_phy: phy@1c0e000 {
compatible = "qcom,sar2130p-qmp-gen3x2-pcie-phy";
reg = <0x0 0x01c0e000 0x0 0x2000>;

8
arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts
View File

@ -530,19 +530,19 @@ dai@104 {
&q6asmdai {
dai@0 {
reg = <0>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
dai@1 {
reg = <1>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
dai@2 {
reg = <2>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
dai@3 {
reg = <3>;
reg = <MSM_FRONTEND_DAI_MULTIMEDIA4>;
};
};

22
arch/arm64/boot/dts/qcom/sc7180-el2.dtso Normal file
View File

@ -0,0 +1,22 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* sc7180 specific modifications required to boot in EL2.
*/
/dts-v1/;
/plugin/;
/* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */
&gpu {
zap-shader {
status = "disabled";
};
};
/* Venus can be used in EL2 if booted similarly to ChromeOS devices. */
&venus {
video-firmware {
iommus = <&apps_smmu 0x0c42 0x0>;
};
};

2
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
View File

@ -188,7 +188,7 @@ &sound_multimedia1_codec {
};
&wifi {
qcom,ath10k-calibration-variant = "GO_HOMESTAR";
qcom,calibration-variant = "GO_HOMESTAR";
};
/* PINCTRL - modifications to sc7180-trogdor.dtsi */

2
arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown.dts
View File

@ -79,7 +79,7 @@ &pp3300_dx_edp {
};
&wifi {
qcom,ath10k-calibration-variant = "GO_KINGOFTOWN";
qcom,calibration-variant = "GO_KINGOFTOWN";
};
/* PINCTRL - modifications to sc7180-trogdor.dtsi */

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