mirror of
https://github.com/torvalds/linux.git
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TI K3 device tree updates for v6.16
Generic Fixups/Cleanups: * am62*: emmc - drop disable-wp, Add bootphase tags to support MMC boot SoC Specific features and Fixes: AM62Ax: * C7x and R5F support added * Bug fix for emmc clock to point to default * CPUFreq thermal throttling on thermal alert AM62P5: * Add RNG Node (common to J722s) * Bug fix for emmc clock to point to default (common to J722S) AM625: * Wakeup R5 node * Bug fix for emmc clock to point to default * PRUSS-M support * New GPU bindings AM64: * Switch to 64-bit address space for PCIe0 * Add PCIe control nodes for main_conf region * Reserve timer nodes used by MCU F/w. AM65: * MMC: Add missing delay timing values for SDR and legacy modes * Add compatible for AM65x syscon and PCIe control properties (dtbs_check fixes) J7200: * PCIe control node to scm_conf, switch to 64-bit address space for PCIe1. J721E: * PCIe control node to scm_conf, switch to 64-bit address space for PCIe0,1. J721S2: * GPU node for Imagination Tech Rouge BXS GPU. * PCIe control node to scm_conf, switch to 64-bit address space for PCIe1. J722s/AM67A: * Switch serdes status to be enabled by board file than at SoC level. * Switch to 64-bit address space for PCIe0. J784S4/J742S2/AM69: * Add ASPCIE0 and enable output for PCIe1 * Fix length of serdes_ln_ctrl. * Switch to 64-bit address space for PCIe0,1. Board Specific: AM62Ax: * SK: co-processors C7x, R5, PWM support added * phycore-som: co-processors C7x, R5 AM62P5: * Add Toradex Verdin AM62P boards with Dahlia, Ivy, Mallow and Yavia support. * SK: Add remote processor support, PWM AM625: * Add BeagleBoard.org PocketBeagle-2 support * phycore-som: Enable R5F support * Verdin: Add eeprom compatible fallback * SK: Enable PWM, voltage supplies, clock, i2cmux rename for camera overlays (dtbs_check fixes) * BeaglePlay: Add voltage supplies for camera overlays (dtbs_check fixes) * phyboard-lyra: Add cooling maps for fan * emmc bug fixes: add non-removable flag for eMMC. AM65: * EVM: Add missing power supply description ofr Rocktech panel (dtbs_check fixes) J721E: * EVM: Enable OSPI1 * EVM/SK: Dt nodes description for mandatory power suplpies for panel and sensors (dtbs_check fixes) J721S2/AM68: * Add phyBOARD-Izar-AM68x * am68-SK: Fix regulator hierarchy J722s/AM67A: * EVM: Add mux controls for CSI2, power regulator nodes and add overlays for quad IMX219 and TEVI OV5640. * BeagleY-AI: Add bootph for main_gpio1 J784S4/J742S2/AM69: * usxgmii expansion board: Drop un-necessary pinctrl-names * evm: Add overlay for USB0 Type-A option -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmgiBIoACgkQ3bWEnRc2 JJ33HA//V738htoKu7xT1fUZg51GGTPH/lEOTuApKUW+9rXZefuvov5BQsUcSRDM uZgAD1wMVmgp9AFXS7O2KK4lGL8h5SnCpQwXUHO3QrD17uMbLSutTe19P3+S9OHk AGKfLbz6WVUIN8WT3S2zcPoKDp8PQgs6rysBr88iw0nnMgTdVRi8hXNt1jJqWlh3 DWiavXH6vVoHWtXG/ptgef2+PNYD75NPwAgmV5klDUhyTb6Sb3D4bf5FdFs/vdGz yA0t9a4Bl59UCn7u2S1gOEdmYYDELNQsAnWDytySYn0UjGw7CWdaZrLSZdvWPf5O o/qimF2frR4cWNtgV3il5SXkXV6v+ZPm+wh9u1dN3CR6f7xDBZh7UpudxOUdPx6q F8iv54hw53RT4wM23KokPA+I2sP8xXxrZoY+fWPzuJXDJWsjumlzNHXqx4aEWq2F EJubyL5XtWHZuRHSoxxyqUBHSOQhTt/Kf5AsRD4QJO/HOUbDUahKqKXuv/mGYmwB Vdqx+P9UxLdnWoI5pil6naZHrvqiHDTVJhwfSgaJwHVgqtm/Qb2o1MB430+fHMn4 LenCB1Qtx5J92LbCSAJlY/eguRlvwt2UDzBSAEKod8QuWJqqTRw42T/eJBwXayJf BS2M6mCXjYPAy1/a0xrMY9Z+f1ZvmUGBcJOpvMhZRaf8VR5BsKo= =CjR6 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguBV0ACgkQmmx57+YA GNkhABAAw1l0lJ4YuwgNXlLOw912uEleiHLSYTakpK65xscnXcmY6O+CP3Hugoe1 daVb0RDoYusD/MyQXTz8KIu9Ji55ki078d7JSs2DfN1nlO+DjlY63Vw0zaAtRMgq iSOR/pDjsejsC73QckpsHzD0hvRpW4rHhxlWzy0YlsMXvrY92Tx0EwFtuQfdQO1z E89l0JkiFYk5ZIi2UUMC67ZgMUNEvNVsJ5biyov+4LXCfzNkPwTUAMZvPQxdSTCr IavMtX0upOz9HghWUKnmBVyOQmGA/UMHHH0jZx/McPCu57DPci/u8QYWkat3jfCi QGoBrVc4ZqBCO/rmhSZtRjdwKQ+3FK5HGtYa6M9iHJ/qWCQGqlroK5+BIMAJtyHb ryhC3Fhq1SYoucgpI/ggI0bg3Mufwpwf3l65U50eV6/IKNp6FfwKb+6Wu3JfTF8h E6JsfWWUrlNUQrE9NbQwtL2+aDnSXu/glJxwS1wqu1w6LI1Z0WpyYM0u6WISNAHL Y7iCiZVBaOGVRHejTUSJbScec3oYvIeW0q9MvkepV7yKo0AML7vuIvgy2EPmK7MJ 6uKcluhT49qbh98MvlSXU1QZsjDUxne4DO9Bej8NpbqlF0tt900RdkOHc/rqZFFk uO8Ie4sydNl0ZfRcioL0YcioSoX0IUg90ebyTROrC0vjYP2T/bU= =w9D6 -----END PGP SIGNATURE----- Merge tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.16 Generic Fixups/Cleanups: * am62*: emmc - drop disable-wp, Add bootphase tags to support MMC boot SoC Specific features and Fixes: AM62Ax: * C7x and R5F support added * Bug fix for emmc clock to point to default * CPUFreq thermal throttling on thermal alert AM62P5: * Add RNG Node (common to J722s) * Bug fix for emmc clock to point to default (common to J722S) AM625: * Wakeup R5 node * Bug fix for emmc clock to point to default * PRUSS-M support * New GPU bindings AM64: * Switch to 64-bit address space for PCIe0 * Add PCIe control nodes for main_conf region * Reserve timer nodes used by MCU F/w. AM65: * MMC: Add missing delay timing values for SDR and legacy modes * Add compatible for AM65x syscon and PCIe control properties (dtbs_check fixes) J7200: * PCIe control node to scm_conf, switch to 64-bit address space for PCIe1. J721E: * PCIe control node to scm_conf, switch to 64-bit address space for PCIe0,1. J721S2: * GPU node for Imagination Tech Rouge BXS GPU. * PCIe control node to scm_conf, switch to 64-bit address space for PCIe1. J722s/AM67A: * Switch serdes status to be enabled by board file than at SoC level. * Switch to 64-bit address space for PCIe0. J784S4/J742S2/AM69: * Add ASPCIE0 and enable output for PCIe1 * Fix length of serdes_ln_ctrl. * Switch to 64-bit address space for PCIe0,1. Board Specific: AM62Ax: * SK: co-processors C7x, R5, PWM support added * phycore-som: co-processors C7x, R5 AM62P5: * Add Toradex Verdin AM62P boards with Dahlia, Ivy, Mallow and Yavia support. * SK: Add remote processor support, PWM AM625: * Add BeagleBoard.org PocketBeagle-2 support * phycore-som: Enable R5F support * Verdin: Add eeprom compatible fallback * SK: Enable PWM, voltage supplies, clock, i2cmux rename for camera overlays (dtbs_check fixes) * BeaglePlay: Add voltage supplies for camera overlays (dtbs_check fixes) * phyboard-lyra: Add cooling maps for fan * emmc bug fixes: add non-removable flag for eMMC. AM65: * EVM: Add missing power supply description ofr Rocktech panel (dtbs_check fixes) J721E: * EVM: Enable OSPI1 * EVM/SK: Dt nodes description for mandatory power suplpies for panel and sensors (dtbs_check fixes) J721S2/AM68: * Add phyBOARD-Izar-AM68x * am68-SK: Fix regulator hierarchy J722s/AM67A: * EVM: Add mux controls for CSI2, power regulator nodes and add overlays for quad IMX219 and TEVI OV5640. * BeagleY-AI: Add bootph for main_gpio1 J784S4/J742S2/AM69: * usxgmii expansion board: Drop un-necessary pinctrl-names * evm: Add overlay for USB0 Type-A option * tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (86 commits) arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640 arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219 arm64: dts: ti: j722s-evm: Add MUX to control CSI2RX arm64: dts: ti: j722s-evm: Add DT nodes for power regulators arm64: dts: ti: k3-am62a-phycore-som: Reserve main_timer2 for C7x DSP arm64: dts: ti: k3-am62a-phycore-som: Reserve main_rti4 for C7x DSP arm64: dts: ti: k3-am62a-phycore-som: Enable Co-processors arm64: dts: ti: k3-am62-phycore-som: Enable Co-processors arm64: dts: ti: k3-am62x-phyboard-lyra-gpio-fan: Update cooling maps arm64: dts: ti: k3-am62a: Enable CPU freq throttling on thermal alert arm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E arm64: dts: ti: k3-j721s2: Add GPU node arm64: dts: ti: k3-am62: New GPU binding details arm64: dts: ti: k3-am62-main: Add PRUSS-M node arm64: dts: ti: k3-am64: Reserve timers used by MCU FW arm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 for C7x DSP arm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP arm64: dts: ti: k3-am62x-sk-common: Enable IPC with remote processors arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors ... Link: https://lore.kernel.org/r/20250512144807.yn64klchtmjjl6ac@protrude Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
179fa6e8c2
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@ -46,6 +46,7 @@ properties:
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- description: K3 AM625 SoC
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items:
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- enum:
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- beagle,am62-pocketbeagle2
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- beagle,am625-beagleplay
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- ti,am625-sk
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- ti,am62-lp-sk
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@ -75,6 +76,30 @@ properties:
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- const: toradex,verdin-am62 # Verdin AM62 Module
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- const: ti,am625
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- description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards
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items:
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- enum:
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- toradex,verdin-am62p-nonwifi-dahlia # Verdin AM62P Module on Dahlia
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- toradex,verdin-am62p-nonwifi-dev # Verdin AM62P Module on Verdin Development Board
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- toradex,verdin-am62p-nonwifi-ivy # Verdin AM62P Module on Ivy
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- toradex,verdin-am62p-nonwifi-mallow # Verdin AM62P Module on Mallow
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- toradex,verdin-am62p-nonwifi-yavia # Verdin AM62P Module on Yavia
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- const: toradex,verdin-am62p-nonwifi # Verdin AM62P Module without Wi-Fi / BT
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- const: toradex,verdin-am62p # Verdin AM62P Module
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- const: ti,am62p5
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- description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards with Wi-Fi / BT
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items:
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- enum:
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- toradex,verdin-am62p-wifi-dahlia # Verdin AM62P Wi-Fi / BT Module on Dahlia
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- toradex,verdin-am62p-wifi-dev # Verdin AM62P Wi-Fi / BT M. on Verdin Development B.
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- toradex,verdin-am62p-wifi-ivy # Verdin AM62P Wi-Fi / BT Module on Ivy
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- toradex,verdin-am62p-wifi-mallow # Verdin AM62P Wi-Fi / BT Module on Mallow
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- toradex,verdin-am62p-wifi-yavia # Verdin AM62P Wi-Fi / BT Module on Yavia
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- const: toradex,verdin-am62p-wifi # Verdin AM62P Wi-Fi / BT Module
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- const: toradex,verdin-am62p # Verdin AM62P Module
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- const: ti,am62p5
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- description: K3 AM642 SoC
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items:
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- enum:
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@ -139,6 +164,13 @@ properties:
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- ti,j721s2-evm
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- const: ti,j721s2
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- description: K3 J721s2 SoC Phytec SoM based boards
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items:
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- enum:
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- phytec,am68-phyboard-izar
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- const: phytec,am68-phycore-som
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- const: ti,j721s2
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- description: K3 J722S SoC and Boards
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items:
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- enum:
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@ -26,6 +26,7 @@ properties:
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compatible:
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items:
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- enum:
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- ti,am654-system-controller
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- ti,j7200-system-controller
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- ti,j721e-system-controller
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- ti,j721s2-system-controller
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@ -68,6 +69,23 @@ patternProperties:
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description:
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The node corresponding to SoC chip identification.
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"^pcie-ctrl@[0-9a-f]+$":
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type: object
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description:
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The node corresponding to PCIe control register.
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"^clock@[0-9a-f]+$":
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type: object
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$ref: /schemas/soc/ti/ti,am654-serdes-ctrl.yaml#
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description:
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This is the Serdes Control region.
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"^dss-oldi-io-ctrl@[0-9a-f]+$":
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type: object
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$ref: /schemas/mfd/syscon.yaml#
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description:
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This is the DSS OLDI CTRL region.
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required:
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- compatible
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- reg
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@ -110,5 +128,10 @@ examples:
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compatible = "ti,am654-chipid";
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reg = <0x14 0x4>;
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};
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pcie0_ctrl: pcie-ctrl@4070 {
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compatible = "ti,j784s4-pcie-ctrl", "syscon";
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reg = <0x4070 0x4>;
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};
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};
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...
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@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-yavia.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62x-phyboard-lyra-gpio-fan.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk-nand.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am62-pocketbeagle2.dtb
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# Boards with AM62Ax SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
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@ -34,6 +35,16 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb
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# Boards with AM62Px SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-dahlia.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-dev.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-ivy.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-mallow.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-yavia.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-dahlia.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-dev.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-ivy.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-mallow.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-yavia.dtb
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# Common overlays for SK-AM62* family of boards
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dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-csi2-ov5640.dtbo
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@ -109,6 +120,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk-csi2-dual-imx219.dtbo
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# Boards with J721s2 SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am68-phyboard-izar.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board-pcie1-ep.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
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@ -120,6 +132,8 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
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# Boards with J722s SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
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# Boards with J784s4 SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
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@ -128,6 +142,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-pcie0-pcie1-ep.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-quad-port-eth-exp1.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-usxgmii-exp1-exp2.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-j784s4-j742s2-evm-usb0-type-a.dtbo
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# Boards with J742S2 SoC
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dtb-$(CONFIG_ARCH_K3) += k3-j742s2-evm.dtb
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@ -212,10 +227,18 @@ k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \
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k3-j721e-sk-csi2-dual-imx219.dtbo
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k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
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k3-j721s2-evm-pcie1-ep.dtbo
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k3-j722s-evm-csi2-quad-rpi-cam-imx219-dtbs := k3-j722s-evm.dtb \
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k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
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k3-j722s-evm-csi2-quad-tevi-ov5640-dtbs := k3-j722s-evm.dtb \
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k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
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k3-j742s2-evm-usb0-type-a-dtbs := k3-j742s2-evm.dtb \
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k3-j784s4-j742s2-evm-usb0-type-a.dtbo
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k3-j784s4-evm-pcie0-pcie1-ep-dtbs := k3-j784s4-evm.dtb \
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k3-j784s4-evm-pcie0-pcie1-ep.dtbo
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k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \
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k3-j784s4-evm-quad-port-eth-exp1.dtbo
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k3-j784s4-evm-usb0-type-a-dtbs := k3-j784s4-evm.dtb \
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k3-j784s4-j742s2-evm-usb0-type-a.dtbo
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k3-j784s4-evm-usxgmii-exp1-exp2-dtbs := k3-j784s4-evm.dtb \
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k3-j784s4-evm-usxgmii-exp1-exp2.dtbo
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dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
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@ -246,8 +269,12 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
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k3-j721e-evm-pcie1-ep.dtb \
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k3-j721e-sk-csi2-dual-imx219.dtb \
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k3-j721s2-evm-pcie1-ep.dtb \
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k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \
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k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \
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k3-j742s2-evm-usb0-type-a.dtb \
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k3-j784s4-evm-pcie0-pcie1-ep.dtb \
|
||||
k3-j784s4-evm-quad-port-eth-exp1.dtb \
|
||||
k3-j784s4-evm-usb0-type-a.dtb \
|
||||
k3-j784s4-evm-usxgmii-exp1-exp2.dtb
|
||||
|
||||
# Enable support for device-tree overlays
|
||||
|
|
@ -269,5 +296,6 @@ DTC_FLAGS_k3-j721e-common-proc-board += -@
|
|||
DTC_FLAGS_k3-j721e-evm-pcie0-ep += -@
|
||||
DTC_FLAGS_k3-j721e-sk += -@
|
||||
DTC_FLAGS_k3-j721s2-common-proc-board += -@
|
||||
DTC_FLAGS_k3-j722s-evm += -@
|
||||
DTC_FLAGS_k3-j784s4-evm += -@
|
||||
DTC_FLAGS_k3-j742s2-evm += -@
|
||||
|
|
|
|||
|
|
@ -69,6 +69,7 @@ vddshv_sdio: regulator-4 {
|
|||
gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
|
||||
states = <1800000 0x0>,
|
||||
<3300000 0x1>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -77,12 +78,14 @@ vddshv_sdio_pins_default: vddshv-sdio-default-pins {
|
|||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (C13) UART0_RTSn.GPIO1_23 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
pmic_irq_pins_default: pmic-irq-default-pins {
|
||||
|
|
@ -118,6 +121,7 @@ exp1: gpio@22 {
|
|||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
exp2: gpio@23 {
|
||||
|
|
@ -229,6 +233,14 @@ &tlv320aic3106 {
|
|||
DVDD-supply = <&buck2_reg>;
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_gpio1 {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&gpmc0 {
|
||||
ranges = <0 0 0x00 0x51000000 0x01000000>; /* CS0 space. Min partition = 16MB */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -552,8 +552,6 @@ sdhci0: mmc@fa10000 {
|
|||
power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
|
||||
clock-names = "clk_ahb", "clk_xin";
|
||||
assigned-clocks = <&k3_clks 57 6>;
|
||||
assigned-clock-parents = <&k3_clks 57 8>;
|
||||
bus-width = <8>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
|
|
@ -691,12 +689,14 @@ ospi0: spi@fc40000 {
|
|||
};
|
||||
|
||||
gpu: gpu@fd00000 {
|
||||
compatible = "ti,am62-gpu", "img,img-axe";
|
||||
compatible = "ti,am62-gpu", "img,img-axe-1-16m", "img,img-axe",
|
||||
"img,img-rogue";
|
||||
reg = <0x00 0x0fd00000 0x00 0x20000>;
|
||||
clocks = <&k3_clks 187 0>;
|
||||
clock-names = "core";
|
||||
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
|
||||
power-domain-names = "a";
|
||||
};
|
||||
|
||||
cpsw3g: ethernet@8000000 {
|
||||
|
|
@ -1079,6 +1079,96 @@ dphy0: phy@30110000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
pruss: pruss@30040000 {
|
||||
compatible = "ti,am625-pruss";
|
||||
reg = <0x00 0x30040000 0x00 0x80000>;
|
||||
power-domains = <&k3_pds 81 TI_SCI_PD_EXCLUSIVE>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x00 0x30040000 0x80000>;
|
||||
|
||||
pruss_mem: memories@0 {
|
||||
reg = <0x0 0x2000>,
|
||||
<0x2000 0x2000>,
|
||||
<0x10000 0x10000>;
|
||||
reg-names = "dram0", "dram1", "shrdram2";
|
||||
};
|
||||
|
||||
pruss_cfg: cfg@26000 {
|
||||
compatible = "ti,pruss-cfg", "syscon";
|
||||
reg = <0x26000 0x200>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x26000 0x2000>;
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pruss_coreclk_mux: coreclk-mux@3c {
|
||||
reg = <0x3c>;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&k3_clks 81 0>, /* pruss_core_clk */
|
||||
<&k3_clks 81 14>; /* pruss_iclk */
|
||||
assigned-clocks = <&pruss_coreclk_mux>;
|
||||
assigned-clock-parents = <&k3_clks 81 14>;
|
||||
};
|
||||
|
||||
pruss_iepclk_mux: iepclk-mux@30 {
|
||||
reg = <0x30>;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&k3_clks 81 3>, /* pruss_iep_clk */
|
||||
<&pruss_coreclk_mux>; /* pruss_coreclk_mux */
|
||||
assigned-clocks = <&pruss_iepclk_mux>;
|
||||
assigned-clock-parents = <&pruss_coreclk_mux>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pruss_intc: interrupt-controller@20000 {
|
||||
compatible = "ti,pruss-intc";
|
||||
reg = <0x20000 0x2000>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "host_intr0", "host_intr1",
|
||||
"host_intr2", "host_intr3",
|
||||
"host_intr4", "host_intr5",
|
||||
"host_intr6", "host_intr7";
|
||||
};
|
||||
|
||||
pru0: pru@34000 {
|
||||
compatible = "ti,am625-pru";
|
||||
reg = <0x34000 0x3000>,
|
||||
<0x22000 0x100>,
|
||||
<0x22400 0x100>;
|
||||
reg-names = "iram", "control", "debug";
|
||||
firmware-name = "am62x-pru0-fw";
|
||||
interrupt-parent = <&pruss_intc>;
|
||||
interrupts = <16 2 2>;
|
||||
interrupt-names = "vring";
|
||||
};
|
||||
|
||||
pru1: pru@38000 {
|
||||
compatible = "ti,am625-pru";
|
||||
reg = <0x38000 0x3000>,
|
||||
<0x24000 0x100>,
|
||||
<0x24400 0x100>;
|
||||
reg-names = "iram", "control", "debug";
|
||||
firmware-name = "am62x-pru1-fw";
|
||||
interrupt-parent = <&pruss_intc>;
|
||||
interrupts = <18 3 3>;
|
||||
interrupt-names = "vring";
|
||||
};
|
||||
};
|
||||
|
||||
gpmc0: memory-controller@3b000000 {
|
||||
compatible = "ti,am64-gpmc";
|
||||
power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
|
|
|||
|
|
@ -64,6 +64,18 @@ mcu_m4fss_memory_region: m4f-memory@9cc00000 {
|
|||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9da00000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9db00000 0x00 0xc00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_tfa_ddr: tfa@9e780000 {
|
||||
reg = <0x00 0x9e780000 0x00 0x80000>;
|
||||
alignment = <0x1000>;
|
||||
|
|
@ -75,12 +87,6 @@ secure_ddr: optee@9e800000 {
|
|||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9db00000 0x00 0x00c00000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_5v0_som: regulator-vcc-5v0-som {
|
||||
|
|
@ -240,10 +246,17 @@ cpsw3g_phy1: ethernet-phy@1 {
|
|||
};
|
||||
|
||||
&mailbox0_cluster0 {
|
||||
status = "okay";
|
||||
|
||||
mbox_m4_0: mbox-m4-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
|
||||
mbox_r5_0: mbox-r5-0 {
|
||||
ti,mbox-rx = <2 0 0>;
|
||||
ti,mbox-tx = <3 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pktdma {
|
||||
|
|
@ -381,8 +394,17 @@ serial_flash: flash@0 {
|
|||
&sdhci0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||
disable-wp;
|
||||
non-removable;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_r5fss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
|
||||
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
|
||||
<&wkup_r5fss0_core0_memory_region>;
|
||||
};
|
||||
|
|
|
|||
521
arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
Normal file
521
arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
Normal file
|
|
@ -0,0 +1,521 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/*
|
||||
* https://www.beagleboard.org/boards/pocketbeagle-2
|
||||
*
|
||||
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
|
||||
* Copyright (C) 2025 Robert Nelson, BeagleBoard.org Foundation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "k3-am625.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "beagle,am62-pocketbeagle2", "ti,am625";
|
||||
model = "BeagleBoard.org PocketBeagle2";
|
||||
|
||||
aliases {
|
||||
serial0 = &wkup_uart0;
|
||||
serial1 = &main_uart1;
|
||||
serial2 = &main_uart6;
|
||||
serial3 = &main_uart0;
|
||||
mmc1 = &sdhci1;
|
||||
usb0 = &usb0;
|
||||
usb1 = &usb1;
|
||||
i2c0 = &main_i2c0;
|
||||
i2c2 = &main_i2c2;
|
||||
i2c3 = &wkup_i2c0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &main_uart6;
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
/* 512MB RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x20000000>;
|
||||
device_type = "memory";
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
reserved_memory: reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
/* global cma region */
|
||||
linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x00 0x8000000>;
|
||||
linux,cma-default;
|
||||
};
|
||||
|
||||
mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9cb00000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_m4fss_memory_region: m4f-memory@9cc00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9cc00000 0x00 0xe00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_tfa_ddr: tfa@9e780000 {
|
||||
reg = <0x00 0x9e780000 0x00 0x80000>;
|
||||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_ddr: optee@9e800000 {
|
||||
reg = <0x00 0x9e800000 0x00 0x01800000>;
|
||||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9db00000 0x00 0xc00000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
vsys_5v0: regulator-1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vsys_5v0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vdd_3v3: regulator-2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vsys_5v0>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vdd_mmc1: regulator-3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_mmc1";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vdd_3v3_sd_pins_default>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
vin-supply = <&vdd_3v3>;
|
||||
gpio = <&main_gpio0 0 GPIO_ACTIVE_HIGH>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vdd_sd_dv: regulator-4 {
|
||||
compatible = "regulator-gpio";
|
||||
regulator-name = "sd_hs200_switch";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vdd_sd_dv_pins_default>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vdd_3v3>;
|
||||
gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
|
||||
states = <1800000 0x0>,
|
||||
<3300000 0x1>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
adc_vref: regulator-5 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "default";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&led_pins_default>;
|
||||
bootph-all;
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_HEARTBEAT;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
gpios = <&main_gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
led-2 {
|
||||
function = LED_FUNCTION_DISK_ACTIVITY;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
linux,default-trigger = "mmc1";
|
||||
gpios = <&main_gpio0 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
led-3 {
|
||||
function = LED_FUNCTION_INDICATOR;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&main_gpio0 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
led-4 {
|
||||
function = LED_FUNCTION_INDICATOR;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&main_gpio0 3 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
led_pins_default: led-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x000c, PIN_OUTPUT, 7) /* (E25) OSPI0_D0.GPIO0_3 */
|
||||
AM62X_IOPAD(0x0010, PIN_OUTPUT, 7) /* (G24) OSPI0_D1.GPIO0_4 */
|
||||
AM62X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (F25) OSPI0_D2.GPIO0_5 */
|
||||
AM62X_IOPAD(0x0018, PIN_OUTPUT, 7) /* (F24) OSPI0_D3.GPIO0_6 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_i2c0_pins_default: main-i2c0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
|
||||
AM62X_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_i2c2_pins_default: main-i2c2-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
|
||||
AM62X_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_uart0_pins_default: main-uart0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */
|
||||
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_uart1_pins_default: main-uart1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */
|
||||
AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */
|
||||
AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19/D15) MCASP0_AFSR.UART1_RXD */
|
||||
AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20/D16) MCASP0_ACLKR.UART1_TXD */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_uart6_pins_default: main-uart6-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x001c, PIN_INPUT, 3) /* (J23) OSPI0_D4.UART6_RXD */
|
||||
AM62X_IOPAD(0x0020, PIN_OUTPUT, 3) /* (J25) OSPI0_D5.UART6_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main-mmc1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */
|
||||
AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */
|
||||
AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22/A19) MMC1_DAT0 */
|
||||
AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21/B19) MMC1_DAT1 */
|
||||
AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21/B20) MMC1_DAT2 */
|
||||
AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22/C19) MMC1_DAT3 */
|
||||
AM62X_IOPAD(0x240, PIN_INPUT, 7) /* (D17/C15) MMC1_SDCD.GPIO1_48 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0244, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO1_49 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
pmic_irq_pins_default: pmic-irq-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0) /* (D16) EXTINTn */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vdd_3v3_sd_pins_default: vdd-3v3-sd-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0000, PIN_OUTPUT, 7) /* (H24) OSPI0_CLK.GPIO0_0 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
usb1_pins_default: usb1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0258, PIN_INPUT, 0) /* (F18) USB1_DRVVBUS */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
epwm2_pins_default: epwm2-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01e8, PIN_OUTPUT, 8) /* (B17) I2C1_SCL.EHRPWM2_A */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&epwm2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&epwm2_pins_default>;
|
||||
};
|
||||
|
||||
&mailbox0_cluster0 {
|
||||
mbox_m4_0: mbox-m4-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart0_pins_default>;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart1_pins_default>;
|
||||
bootph-pre-ram;
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_uart6 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart6_pins_default>;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c0_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
|
||||
ad7291: adc@20 {
|
||||
/* Emulated with MSPM0L1105 */
|
||||
compatible = "adi,ad7291";
|
||||
reg = <0x20>;
|
||||
vref-supply = <&adc_vref>;
|
||||
};
|
||||
|
||||
eeprom: eeprom@50 {
|
||||
/* Emulated with MSPM0L1105 */
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c2_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_m4fss {
|
||||
mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
|
||||
memory-region = <&mcu_m4fss_dma_memory_region>,
|
||||
<&mcu_m4fss_memory_region>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_pmx0 {
|
||||
wkup_uart0_pins_default: wkup-uart0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6/A7) WKUP_UART0_CTSn */
|
||||
AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4/B4) WKUP_UART0_RTSn */
|
||||
AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4/B5) WKUP_UART0_RXD */
|
||||
AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5/C6) WKUP_UART0_TXD */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_MCU_IOPAD(0x004c, PIN_INPUT_PULLUP, 0) /* (B9) WKUP_I2C0_SCL */
|
||||
AM62X_MCU_IOPAD(0x0050, PIN_INPUT_PULLUP, 0) /* (A9) WKUP_I2C0_SDA */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
/* SD/MMC */
|
||||
vmmc-supply = <&vdd_mmc1>;
|
||||
vqmmc-supply = <&vdd_sd_dv>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||
disable-wp;
|
||||
cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>;
|
||||
cd-debounce-delay-ms = <100>;
|
||||
bootph-all;
|
||||
ti,fails-without-test-cd;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
bootph-all;
|
||||
ti,vbus-divider;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
/* This is a Type-C socket, but wired as USB 2.0 */
|
||||
dr_mode = "peripheral";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&usbss1 {
|
||||
ti,vbus-divider;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
/*
|
||||
* Default set here is compatible with original PocketBeagle,
|
||||
* Expansion boards assumed this was pre-setup as host.
|
||||
*/
|
||||
dr_mode = "host";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb1_pins_default>;
|
||||
};
|
||||
|
||||
&wkup_uart0 {
|
||||
/* WKUP UART0 is used by Device Manager firmware */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wkup_uart0_pins_default>;
|
||||
bootph-all;
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&wkup_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wkup_i2c0_pins_default>;
|
||||
clock-frequency = <100000>;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
|
||||
tps65219: pmic@30 {
|
||||
compatible = "ti,tps65219";
|
||||
reg = <0x30>;
|
||||
buck1-supply = <&vsys_5v0>;
|
||||
buck2-supply = <&vsys_5v0>;
|
||||
buck3-supply = <&vsys_5v0>;
|
||||
ldo1-supply = <&vdd_3v3>;
|
||||
ldo2-supply = <&buck2_reg>;
|
||||
ldo3-supply = <&vdd_3v3>;
|
||||
ldo4-supply = <&vdd_3v3>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_irq_pins_default>;
|
||||
interrupt-parent = <&gic500>;
|
||||
interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
bootph-all;
|
||||
system-power-controller;
|
||||
ti,power-button;
|
||||
|
||||
regulators {
|
||||
buck1_reg: buck1 {
|
||||
regulator-name = "VDD_CORE";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck2_reg: buck2 {
|
||||
regulator-name = "VDD_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck3_reg: buck3 {
|
||||
regulator-name = "VDD_1V2";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
/*
|
||||
* Regulator is left as is unused, vdd_sd
|
||||
* is controlled via GPIO with bypass config
|
||||
* as per the NVM configuration
|
||||
*/
|
||||
regulator-name = "VDD_SD_3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-allow-bypass;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: ldo2 {
|
||||
regulator-name = "VDDA_0V85";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: ldo3 {
|
||||
regulator-name = "VDDA_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: ldo4 {
|
||||
regulator-name = "VDD_2V5";
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -114,7 +114,7 @@ sensor@4f {
|
|||
|
||||
/* EEPROM */
|
||||
eeprom@57 {
|
||||
compatible = "st,24c02";
|
||||
compatible = "st,24c02", "atmel,24c02";
|
||||
reg = <0x57>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -118,7 +118,7 @@ sensor@4f {
|
|||
|
||||
/* EEPROM */
|
||||
eeprom@57 {
|
||||
compatible = "st,24c02";
|
||||
compatible = "st,24c02", "atmel,24c02";
|
||||
reg = <0x57>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -106,6 +106,31 @@ wkup_rti0: watchdog@2b000000 {
|
|||
status = "reserved";
|
||||
};
|
||||
|
||||
wkup_r5fss0: r5fss@78000000 {
|
||||
compatible = "ti,am62-r5fss";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x78000000 0x00 0x78000000 0x8000>,
|
||||
<0x78100000 0x00 0x78100000 0x8000>;
|
||||
power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
|
||||
wkup_r5fss0_core0: r5f@78000000 {
|
||||
compatible = "ti,am62-r5f";
|
||||
reg = <0x78000000 0x00008000>,
|
||||
<0x78100000 0x00008000>;
|
||||
reg-names = "atcm", "btcm";
|
||||
resets = <&k3_reset 121 1>;
|
||||
firmware-name = "am62-wkup-r5f0_0-fw";
|
||||
ti,atcm-enable = <1>;
|
||||
ti,btcm-enable = <1>;
|
||||
ti,loczrama = <1>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <121>;
|
||||
ti,sci-proc-ids = <0x01 0xff>;
|
||||
};
|
||||
};
|
||||
|
||||
wkup_vtm0: temperature-sensor@b00000 {
|
||||
compatible = "ti,j7200-vtm";
|
||||
reg = <0x00 0xb00000 0x00 0x400>,
|
||||
|
|
|
|||
|
|
@ -86,7 +86,9 @@ cbass_main: bus@f0000 {
|
|||
/* Wakeup Domain Range */
|
||||
<0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
|
||||
<0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>,
|
||||
<0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
|
||||
<0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>,
|
||||
<0x00 0x78000000 0x00 0x78000000 0x00 0x00008000>, /* DM R5 ATCM*/
|
||||
<0x00 0x78100000 0x00 0x78100000 0x00 0x00008000>; /* DM R5 BTCM*/
|
||||
|
||||
cbass_mcu: bus@4000000 {
|
||||
bootph-all;
|
||||
|
|
@ -103,7 +105,9 @@ cbass_wakeup: bus@b00000 {
|
|||
#size-cells = <2>;
|
||||
ranges = <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
|
||||
<0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */
|
||||
<0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
|
||||
<0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>,
|
||||
<0x00 0x78000000 0x00 0x78000000 0x00 0x00008000>, /* DM R5 ATCM*/
|
||||
<0x00 0x78100000 0x00 0x78100000 0x00 0x00008000>; /* DM R5 BTCM*/
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -15,6 +15,33 @@ clk_ov5640_fixed: ov5640-xclk {
|
|||
#clock-cells = <0>;
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
reg_2p8v: regulator-2p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "2P8V";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
vin-supply = <&vdd_3v3>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vdd_3v3>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p5v: regulator-1p5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P5V";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
vin-supply = <&vdd_3v3>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
|
|
@ -39,6 +66,10 @@ ov5640: camera@3c {
|
|||
clocks = <&clk_ov5640_fixed>;
|
||||
clock-names = "xclk";
|
||||
|
||||
AVDD-supply = <®_2p8v>;
|
||||
DOVDD-supply = <®_1p8v>;
|
||||
DVDD-supply = <®_1p5v>;
|
||||
|
||||
port {
|
||||
csi2_cam0: endpoint {
|
||||
remote-endpoint = <&csi2rx0_in_sensor>;
|
||||
|
|
|
|||
|
|
@ -15,6 +15,33 @@ clk_ov5640_fixed: ov5640-xclk {
|
|||
#clock-cells = <0>;
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
reg_2p8v: regulator-2p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "2P8V";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
vin-supply = <&vdd_3v3>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vdd_3v3>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vdd_3v3>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
|
|
@ -39,6 +66,10 @@ ov5640: camera@3c {
|
|||
clocks = <&clk_ov5640_fixed>;
|
||||
clock-names = "xclk";
|
||||
|
||||
AVDD-supply = <®_2p8v>;
|
||||
DOVDD-supply = <®_1p8v>;
|
||||
DVDD-supply = <®_3p3v>;
|
||||
|
||||
port {
|
||||
csi2_cam0: endpoint {
|
||||
remote-endpoint = <&csi2rx0_in_sensor>;
|
||||
|
|
|
|||
|
|
@ -832,9 +832,9 @@ &main_spi2 {
|
|||
|
||||
&sdhci0 {
|
||||
bootph-all;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_pins_default>;
|
||||
disable-wp;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -575,8 +575,6 @@ sdhci0: mmc@fa10000 {
|
|||
power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
|
||||
clock-names = "clk_ahb", "clk_xin";
|
||||
assigned-clocks = <&k3_clks 57 6>;
|
||||
assigned-clock-parents = <&k3_clks 57 8>;
|
||||
bus-width = <8>;
|
||||
mmc-hs200-1_8v;
|
||||
ti,clkbuf-sel = <0x7>;
|
||||
|
|
@ -1123,6 +1121,18 @@ vpu: video-codec@30210000 {
|
|||
power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>;
|
||||
};
|
||||
|
||||
c7x_0: dsp@7e000000 {
|
||||
compatible = "ti,am62a-c7xv-dsp";
|
||||
reg = <0x00 0x7e000000 0x00 0x00100000>;
|
||||
reg-names = "l2sram";
|
||||
resets = <&k3_reset 208 1>;
|
||||
firmware-name = "am62a-c71_0-fw";
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <208>;
|
||||
ti,sci-proc-ids = <0x04 0xff>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
e5010: jpeg-encoder@fd20000 {
|
||||
compatible = "ti,am62a-jpeg-enc", "img,e5010-jpeg-enc";
|
||||
reg = <0x00 0xfd20000 0x00 0x100>,
|
||||
|
|
|
|||
|
|
@ -174,4 +174,29 @@ mcu_mcan1: can@4e18000 {
|
|||
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_r5fss0: r5fss@79000000 {
|
||||
compatible = "ti,am62-r5fss";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x79000000 0x00 0x79000000 0x8000>,
|
||||
<0x79020000 0x00 0x79020000 0x8000>;
|
||||
power-domains = <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
|
||||
mcu_r5fss0_core0: r5f@79000000 {
|
||||
compatible = "ti,am62-r5f";
|
||||
reg = <0x79000000 0x00008000>,
|
||||
<0x79020000 0x00008000>;
|
||||
reg-names = "atcm", "btcm";
|
||||
resets = <&k3_reset 9 1>;
|
||||
firmware-name = "am62a-mcu-r5f0_0-fw";
|
||||
ti,atcm-enable = <0>;
|
||||
ti,btcm-enable = <1>;
|
||||
ti,loczrama = <0>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <9>;
|
||||
ti,sci-proc-ids = <0x03 0xff>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -59,6 +59,42 @@ linux,cma {
|
|||
linux,cma-default;
|
||||
};
|
||||
|
||||
c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x99800000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
c7x_0_memory_region: c7x-memory@99900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x99900000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9b800000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9b900000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c800000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c900000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_tfa_ddr: tfa@9e780000 {
|
||||
reg = <0x00 0x9e780000 0x00 0x80000>;
|
||||
alignment = <0x1000>;
|
||||
|
|
@ -70,12 +106,6 @@ secure_ddr: optee@9e800000 {
|
|||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c900000 0x00 0x01e00000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_5v0_som: regulator-vcc-5v0-som {
|
||||
|
|
@ -170,6 +200,13 @@ AM62AX_IOPAD(0x1f4, PIN_INPUT, 0) /* (D16) EXTINTn */
|
|||
};
|
||||
};
|
||||
|
||||
&c7x_0 {
|
||||
mboxes = <&mailbox0_cluster1 &mbox_c7x_0>;
|
||||
memory-region = <&c7x_0_dma_memory_region>,
|
||||
<&c7x_0_memory_region>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw3g {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_rgmii1_pins_default>;
|
||||
|
|
@ -200,6 +237,33 @@ &fss {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&mailbox0_cluster0 {
|
||||
status = "okay";
|
||||
|
||||
mbox_r5_0: mbox-r5-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox0_cluster1 {
|
||||
status = "okay";
|
||||
|
||||
mbox_c7x_0: mbox-c7x-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox0_cluster2 {
|
||||
status = "okay";
|
||||
|
||||
mbox_mcu_r5_0: mbox-mcu-r5-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c0_pins_default>;
|
||||
|
|
@ -315,6 +379,26 @@ &main_pktdma {
|
|||
bootph-all;
|
||||
};
|
||||
|
||||
/* main_rti4 is used by C7x DSP */
|
||||
&main_rti4 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
/* main_timer2 is used by C7x DSP */
|
||||
&main_timer2 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&mcu_r5fss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster2 &mbox_mcu_r5_0>;
|
||||
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
|
||||
<&mcu_r5fss0_core0_memory_region>;
|
||||
};
|
||||
|
||||
&ospi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ospi0_pins_default>;
|
||||
|
|
@ -338,8 +422,17 @@ serial_flash: flash@0 {
|
|||
&sdhci0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||
disable-wp;
|
||||
non-removable;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_r5fss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
|
||||
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
|
||||
<&wkup_r5fss0_core0_memory_region>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -12,12 +12,29 @@ main0_thermal: main0-thermal {
|
|||
thermal-sensors = <&wkup_vtm0 0>;
|
||||
|
||||
trips {
|
||||
main0_alert: main0-alert {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
main0_crit: main0-crit {
|
||||
temperature = <125000>; /* milliCelsius */
|
||||
hysteresis = <2000>; /* milliCelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&main0_alert>;
|
||||
cooling-device =
|
||||
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
main1_thermal: main1-thermal {
|
||||
|
|
@ -26,25 +43,59 @@ main1_thermal: main1-thermal {
|
|||
thermal-sensors = <&wkup_vtm0 1>;
|
||||
|
||||
trips {
|
||||
main1_alert: main1-alert {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
main1_crit: main1-crit {
|
||||
temperature = <125000>; /* milliCelsius */
|
||||
hysteresis = <2000>; /* milliCelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&main1_alert>;
|
||||
cooling-device =
|
||||
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
main2_thermal: main2-thermal {
|
||||
polling-delay-passive = <250>; /* milliSeconds */
|
||||
polling-delay = <500>; /* milliSeconds */
|
||||
thermal-sensors = <&wkup_vtm0 2>;
|
||||
polling-delay-passive = <250>; /* milliSeconds */
|
||||
polling-delay = <500>; /* milliSeconds */
|
||||
thermal-sensors = <&wkup_vtm0 2>;
|
||||
|
||||
trips {
|
||||
main2_alert: main2-alert {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
main2_crit: main2-crit {
|
||||
temperature = <125000>; /* milliCelsius */
|
||||
hysteresis = <2000>; /* milliCelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&main2_alert>;
|
||||
cooling-device =
|
||||
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -103,6 +103,31 @@ wkup_rti0: watchdog@2b000000 {
|
|||
status = "reserved";
|
||||
};
|
||||
|
||||
wkup_r5fss0: r5fss@78000000 {
|
||||
compatible = "ti,am62-r5fss";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x78000000 0x00 0x78000000 0x8000>,
|
||||
<0x78100000 0x00 0x78100000 0x8000>;
|
||||
power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
|
||||
wkup_r5fss0_core0: r5f@78000000 {
|
||||
compatible = "ti,am62-r5f";
|
||||
reg = <0x78000000 0x00008000>,
|
||||
<0x78100000 0x00008000>;
|
||||
reg-names = "atcm", "btcm";
|
||||
resets = <&k3_reset 121 1>;
|
||||
firmware-name = "am62a-wkup-r5f0_0-fw";
|
||||
ti,atcm-enable = <1>;
|
||||
ti,btcm-enable = <1>;
|
||||
ti,loczrama = <1>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <121>;
|
||||
ti,sci-proc-ids = <0x01 0xff>;
|
||||
};
|
||||
};
|
||||
|
||||
wkup_vtm0: temperature-sensor@b00000 {
|
||||
compatible = "ti,j7200-vtm";
|
||||
reg = <0x00 0xb00000 0x00 0x400>,
|
||||
|
|
|
|||
|
|
@ -52,6 +52,42 @@ linux,cma {
|
|||
linux,cma-default;
|
||||
};
|
||||
|
||||
c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x99800000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
c7x_0_memory_region: c7x-memory@99900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x99900000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9b800000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9b900000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c800000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c900000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_tfa_ddr: tfa@9e780000 {
|
||||
reg = <0x00 0x9e780000 0x00 0x80000>;
|
||||
alignment = <0x1000>;
|
||||
|
|
@ -63,12 +99,6 @@ secure_ddr: optee@9e800000 {
|
|||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c900000 0x00 0x01e00000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
opp-table {
|
||||
|
|
@ -313,6 +343,7 @@ AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */
|
|||
AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */
|
||||
AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main-mmc1-default-pins {
|
||||
|
|
@ -383,6 +414,25 @@ vddshv_sdio_pins_default: vddshv-sdio-default-pins {
|
|||
AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_ecap0_pins_default: main-ecap0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x01b8, PIN_OUTPUT, 3) /* (C16) SPI0_CS1.ECAP0_IN_APWM_OUT */
|
||||
>;
|
||||
};
|
||||
|
||||
main_ecap2_pins_default: main-ecap2-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (A19) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */
|
||||
>;
|
||||
};
|
||||
|
||||
main_epwm1_pins_default: main-epwm1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */
|
||||
AM62AX_IOPAD(0x01a0, PIN_OUTPUT, 6) /* (B20) MCASP0_AXR0.EHRPWM1_B */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_pmx0 {
|
||||
|
|
@ -614,7 +664,7 @@ &sdhci0 {
|
|||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||
disable-wp;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
|
|
@ -652,6 +702,11 @@ &main_uart1 {
|
|||
status = "reserved";
|
||||
};
|
||||
|
||||
/* main_timer2 is used by C7x DSP */
|
||||
&main_timer2 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
status = "okay";
|
||||
ti,vbus-divider;
|
||||
|
|
@ -741,3 +796,83 @@ dpi1_out: endpoint {
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ecap0 {
|
||||
/* P26 of J3 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_ecap0_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecap2 {
|
||||
/* P11 of J3 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_ecap2_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&epwm1 {
|
||||
/* P36/P33 of J3 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_epwm1_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mailbox0_cluster0 {
|
||||
status = "okay";
|
||||
|
||||
mbox_r5_0: mbox-r5-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox0_cluster1 {
|
||||
status = "okay";
|
||||
|
||||
mbox_c7x_0: mbox-c7x-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox0_cluster2 {
|
||||
status = "okay";
|
||||
|
||||
mbox_mcu_r5_0: mbox-mcu-r5-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_r5fss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;
|
||||
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
|
||||
<&wkup_r5fss0_core0_memory_region>;
|
||||
};
|
||||
|
||||
&mcu_r5fss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>;
|
||||
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
|
||||
<&mcu_r5fss0_core0_memory_region>;
|
||||
};
|
||||
|
||||
&c7x_0 {
|
||||
mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>;
|
||||
memory-region = <&c7x_0_dma_memory_region>,
|
||||
<&c7x_0_memory_region>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* main_rti4 is used by C7x DSP */
|
||||
&main_rti4 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -50,6 +50,7 @@ cpu0: cpu@0 {
|
|||
next-level-cache = <&L2_0>;
|
||||
operating-points-v2 = <&a53_opp_table>;
|
||||
clocks = <&k3_clks 135 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
|
|
@ -66,6 +67,7 @@ cpu1: cpu@1 {
|
|||
next-level-cache = <&L2_0>;
|
||||
operating-points-v2 = <&a53_opp_table>;
|
||||
clocks = <&k3_clks 136 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
|
|
@ -82,6 +84,7 @@ cpu2: cpu@2 {
|
|||
next-level-cache = <&L2_0>;
|
||||
operating-points-v2 = <&a53_opp_table>;
|
||||
clocks = <&k3_clks 137 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
|
|
@ -98,6 +101,7 @@ cpu3: cpu@3 {
|
|||
next-level-cache = <&L2_0>;
|
||||
operating-points-v2 = <&a53_opp_table>;
|
||||
clocks = <&k3_clks 138 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -227,9 +227,18 @@ crypto: crypto@40900000 {
|
|||
reg = <0x00 0x40900000 0x00 0x1200>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
|
||||
|
||||
dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>,
|
||||
<&main_pktdma 0x7507 0>;
|
||||
dma-names = "tx", "rx1", "rx2";
|
||||
|
||||
rng: rng@40910000 {
|
||||
compatible = "inside-secure,safexcel-eip76";
|
||||
reg = <0x00 0x40910000 0x0 0x7d>;
|
||||
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "reserved";
|
||||
};
|
||||
};
|
||||
|
||||
secure_proxy_sa3: mailbox@43600000 {
|
||||
|
|
@ -564,8 +573,6 @@ sdhci0: mmc@fa10000 {
|
|||
power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
|
||||
clock-names = "clk_ahb", "clk_xin";
|
||||
assigned-clocks = <&k3_clks 57 2>;
|
||||
assigned-clock-parents = <&k3_clks 57 4>;
|
||||
bus-width = <8>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
|
|
|
|||
228
arch/arm64/boot/dts/ti/k3-am62p-verdin-dahlia.dtsi
Normal file
228
arch/arm64/boot/dts/ti/k3-am62p-verdin-dahlia.dtsi
Normal file
|
|
@ -0,0 +1,228 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* Common dtsi for Verdin AM62P SoM on Dahlia carrier board
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit
|
||||
*/
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
eeprom1 = &carrier_eeprom;
|
||||
};
|
||||
|
||||
reg_1v8_sw: regulator-1v8-sw {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-name = "On-carrier +V1.8_SW";
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,bitclock-master = <&codec_dai>;
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,frame-master = <&codec_dai>;
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,name = "verdin-wm8904";
|
||||
simple-audio-card,routing =
|
||||
"Headphone Jack", "HPOUTL",
|
||||
"Headphone Jack", "HPOUTR",
|
||||
"IN2L", "Line In Jack",
|
||||
"IN2R", "Line In Jack",
|
||||
"Microphone Jack", "MICBIAS",
|
||||
"IN1L", "Microphone Jack";
|
||||
simple-audio-card,widgets =
|
||||
"Microphone", "Microphone Jack",
|
||||
"Headphone", "Headphone Jack",
|
||||
"Line", "Line In Jack";
|
||||
|
||||
codec_dai: simple-audio-card,codec {
|
||||
sound-dai = <&wm8904_1a>;
|
||||
};
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&mcasp0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin ETHs */
|
||||
&cpsw3g {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
|
||||
&cpsw3g_mdio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin ETH_1 (On-module PHY) */
|
||||
&cpsw_port1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PWM_3_DSI */
|
||||
&epwm0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PWM_1, PWM_2 */
|
||||
&epwm2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie_1_reset>,
|
||||
<&pinctrl_gpio_5>,
|
||||
<&pinctrl_gpio_6>,
|
||||
<&pinctrl_gpio_7>,
|
||||
<&pinctrl_gpio_8>;
|
||||
};
|
||||
|
||||
/* Verdin I2C_1 */
|
||||
&main_i2c0 {
|
||||
status = "okay";
|
||||
|
||||
wm8904_1a: audio-codec@1a {
|
||||
compatible = "wlf,wm8904";
|
||||
reg = <0x1a>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2s1_mclk>;
|
||||
clocks = <&audio_refclk0>;
|
||||
clock-names = "mclk";
|
||||
#sound-dai-cells = <0>;
|
||||
AVDD-supply = <®_1v8_sw>;
|
||||
CPVDD-supply = <®_1v8_sw>;
|
||||
DBVDD-supply = <®_1v8_sw>;
|
||||
DCVDD-supply = <®_1v8_sw>;
|
||||
MICVDD-supply = <®_1v8_sw>;
|
||||
};
|
||||
|
||||
/* Current measurement into module VCC */
|
||||
hwmon@40 {
|
||||
compatible = "ti,ina219";
|
||||
reg = <0x40>;
|
||||
shunt-resistor = <10000>;
|
||||
};
|
||||
|
||||
temperature-sensor@4f {
|
||||
compatible = "ti,tmp75c";
|
||||
reg = <0x4f>;
|
||||
};
|
||||
|
||||
carrier_eeprom: eeprom@57 {
|
||||
compatible = "st,24c02", "atmel,24c02";
|
||||
reg = <0x57>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin I2C_2_DSI */
|
||||
&main_i2c1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin I2C_4_CSI */
|
||||
&main_i2c3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CAN_1 */
|
||||
&main_mcan0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin SPI_1 */
|
||||
&main_spi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_3, used as the Linux console */
|
||||
&main_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_1 */
|
||||
&main_uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin I2S_1 */
|
||||
&mcasp0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_1>,
|
||||
<&pinctrl_gpio_2>,
|
||||
<&pinctrl_gpio_3>,
|
||||
<&pinctrl_gpio_4>;
|
||||
};
|
||||
|
||||
/* Verdin I2C_3_HDMI */
|
||||
&mcu_i2c0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CAN_2 */
|
||||
&mcu_mcan0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_4 */
|
||||
&mcu_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin QSPI_1 */
|
||||
&ospi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* We support turning off sleep moci on Dahlia */
|
||||
®_force_sleep_moci {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* Verdin SD_1 */
|
||||
&sdhci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin USB_1 */
|
||||
&usbss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin USB_2 */
|
||||
&usbss1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CTRL_WAKE1_MICO# */
|
||||
&verdin_gpio_keys {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PCIE_1_RESET# */
|
||||
&verdin_pcie_1_reset_hog {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_2 */
|
||||
&wkup_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
245
arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi
Normal file
245
arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi
Normal file
|
|
@ -0,0 +1,245 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* Common dtsi for Verdin AM62P SoM on Development carrier board
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/verdin-development-board-kit
|
||||
*/
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
eeprom1 = &carrier_eeprom;
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,bitclock-master = <&codec_dai>;
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,frame-master = <&codec_dai>;
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,name = "verdin-nau8822";
|
||||
simple-audio-card,routing =
|
||||
"Headphones", "LHP",
|
||||
"Headphones", "RHP",
|
||||
"Speaker", "LSPK",
|
||||
"Speaker", "RSPK",
|
||||
"Line Out", "AUXOUT1",
|
||||
"Line Out", "AUXOUT2",
|
||||
"LAUX", "Line In",
|
||||
"RAUX", "Line In",
|
||||
"LMICP", "Mic In",
|
||||
"RMICP", "Mic In";
|
||||
simple-audio-card,widgets =
|
||||
"Headphones", "Headphones",
|
||||
"Line Out", "Line Out",
|
||||
"Speaker", "Speaker",
|
||||
"Microphone", "Mic In",
|
||||
"Line", "Line In";
|
||||
|
||||
codec_dai: simple-audio-card,codec {
|
||||
sound-dai = <&nau8822_1a>;
|
||||
};
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&mcasp0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin ETHs */
|
||||
&cpsw3g {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_rgmii1>, <&pinctrl_rgmii2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
|
||||
&cpsw3g_mdio {
|
||||
status = "okay";
|
||||
|
||||
carrier_eth_phy: ethernet-phy@7 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_eth2_rgmii_int>;
|
||||
interrupt-parent = <&main_gpio0>;
|
||||
interrupts = <42 IRQ_TYPE_EDGE_FALLING>;
|
||||
micrel,led-mode = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin ETH_1 (On-module PHY) */
|
||||
&cpsw_port1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin ETH_2_RGMII */
|
||||
&cpsw_port2 {
|
||||
phy-handle = <&carrier_eth_phy>;
|
||||
phy-mode = "rgmii-rxid";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PWM_3_DSI */
|
||||
&epwm0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PWM_1, PWM_2 */
|
||||
&epwm2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie_1_reset>,
|
||||
<&pinctrl_gpio_5>,
|
||||
<&pinctrl_gpio_6>,
|
||||
<&pinctrl_gpio_7>,
|
||||
<&pinctrl_gpio_8>;
|
||||
};
|
||||
|
||||
/* Verdin I2C_1 */
|
||||
&main_i2c0 {
|
||||
status = "okay";
|
||||
|
||||
nau8822_1a: audio-codec@1a {
|
||||
compatible = "nuvoton,nau8822";
|
||||
reg = <0x1a>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2s1_mclk>;
|
||||
clock-names = "mclk";
|
||||
clocks = <&audio_refclk0>;
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
carrier_gpio_expander: gpio@21 {
|
||||
compatible = "nxp,pcal6416";
|
||||
reg = <0x21>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
/* Current measurement into module VCC */
|
||||
hwmon@40 {
|
||||
compatible = "ti,ina219";
|
||||
reg = <0x40>;
|
||||
shunt-resistor = <10000>;
|
||||
};
|
||||
|
||||
temperature-sensor@4f {
|
||||
compatible = "ti,tmp75c";
|
||||
reg = <0x4f>;
|
||||
};
|
||||
|
||||
carrier_eeprom: eeprom@57 {
|
||||
compatible = "st,24c02", "atmel,24c02";
|
||||
reg = <0x57>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin I2C_2_DSI */
|
||||
&main_i2c1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin I2C_4_CSI */
|
||||
&main_i2c3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CAN_1 */
|
||||
&main_mcan0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin SPI_1 */
|
||||
&main_spi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_3, used as the Linux console */
|
||||
&main_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_1, connector X50 through RS485 transceiver */
|
||||
&main_uart1 {
|
||||
rs485-rx-during-tx;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin I2S_1 */
|
||||
&mcasp0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_1>,
|
||||
<&pinctrl_gpio_2>,
|
||||
<&pinctrl_gpio_3>,
|
||||
<&pinctrl_gpio_4>;
|
||||
};
|
||||
|
||||
/* Verdin I2C_3_HDMI */
|
||||
&mcu_i2c0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CAN_2 */
|
||||
&mcu_mcan0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_4 */
|
||||
&mcu_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin QSPI_1 */
|
||||
&ospi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin SD_1 */
|
||||
&sdhci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin USB_1 */
|
||||
&usbss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin USB_2 */
|
||||
&usbss1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CTRL_WAKE1_MICO# */
|
||||
&verdin_gpio_keys {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PCIE_1_RESET# */
|
||||
&verdin_pcie_1_reset_hog {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_2 */
|
||||
&wkup_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
629
arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi
Normal file
629
arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi
Normal file
|
|
@ -0,0 +1,629 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* Common dtsi for Verdin AM62P SoM on Ivy carrier board
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/ivy-carrier-board
|
||||
*/
|
||||
|
||||
#include <dt-bindings/mux/mux.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
eeprom1 = &carrier_eeprom;
|
||||
};
|
||||
|
||||
/* AIN1 Voltage w/o AIN1_MODE gpio control */
|
||||
ain1_voltage_unmanaged: voltage-divider-ain1 {
|
||||
compatible = "voltage-divider";
|
||||
#io-channel-cells = <1>;
|
||||
io-channels = <&ivy_adc1 0>;
|
||||
full-ohms = <19>;
|
||||
output-ohms = <1>;
|
||||
};
|
||||
|
||||
/* AIN1 Current w/o AIN1_MODE gpio control */
|
||||
ain1_current_unmanaged: current-sense-shunt-ain1 {
|
||||
compatible = "current-sense-shunt";
|
||||
#io-channel-cells = <0>;
|
||||
io-channels = <&ivy_adc1 1>;
|
||||
shunt-resistor-micro-ohms = <100000000>;
|
||||
};
|
||||
|
||||
/* AIN1_MODE - SODIMM 216 */
|
||||
ain1_mode_mux_ctrl: mux-controller-0 {
|
||||
compatible = "gpio-mux";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_5>;
|
||||
#mux-control-cells = <0>;
|
||||
mux-gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
ain1-voltage {
|
||||
compatible = "io-channel-mux";
|
||||
channels = "ain1_voltage", "";
|
||||
io-channels = <&ain1_voltage_unmanaged 0>;
|
||||
io-channel-names = "parent";
|
||||
mux-controls = <&ain1_mode_mux_ctrl>;
|
||||
settle-time-us = <1000>;
|
||||
};
|
||||
|
||||
ain1-current {
|
||||
compatible = "io-channel-mux";
|
||||
channels = "", "ain1_current";
|
||||
io-channels = <&ain1_current_unmanaged>;
|
||||
io-channel-names = "parent";
|
||||
mux-controls = <&ain1_mode_mux_ctrl>;
|
||||
settle-time-us = <1000>;
|
||||
};
|
||||
|
||||
/* AIN2 Voltage w/o AIN2_MODE gpio control */
|
||||
ain2_voltage_unmanaged: voltage-divider-ain2 {
|
||||
compatible = "voltage-divider";
|
||||
#io-channel-cells = <1>;
|
||||
io-channels = <&ivy_adc2 0>;
|
||||
full-ohms = <19>;
|
||||
output-ohms = <1>;
|
||||
};
|
||||
|
||||
/* AIN2 Current w/o AIN2_MODE gpio control */
|
||||
ain2_current_unmanaged: current-sense-shunt-ain2 {
|
||||
compatible = "current-sense-shunt";
|
||||
#io-channel-cells = <0>;
|
||||
io-channels = <&ivy_adc2 1>;
|
||||
shunt-resistor-micro-ohms = <100000000>;
|
||||
};
|
||||
|
||||
/* AIN2_MODE - SODIMM 218 */
|
||||
ain2_mode_mux_ctrl: mux-controller-1 {
|
||||
compatible = "gpio-mux";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_6>;
|
||||
#mux-control-cells = <0>;
|
||||
mux-gpios = <&main_gpio0 50 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
ain2-voltage {
|
||||
compatible = "io-channel-mux";
|
||||
channels = "ain2_voltage", "";
|
||||
io-channels = <&ain2_voltage_unmanaged 0>;
|
||||
io-channel-names = "parent";
|
||||
mux-controls = <&ain2_mode_mux_ctrl>;
|
||||
settle-time-us = <1000>;
|
||||
};
|
||||
|
||||
ain2-current {
|
||||
compatible = "io-channel-mux";
|
||||
channels = "", "ain2_current";
|
||||
io-channels = <&ain2_current_unmanaged>;
|
||||
io-channel-names = "parent";
|
||||
mux-controls = <&ain2_mode_mux_ctrl>;
|
||||
settle-time-us = <1000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ivy_leds>;
|
||||
|
||||
/* D7 Blue - SODIMM 30 - LEDs.GPIO1 */
|
||||
led-0 {
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
default-state = "off";
|
||||
function = LED_FUNCTION_STATUS;
|
||||
function-enumerator = <1>;
|
||||
gpios = <&main_gpio1 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* D7 Green - SODIMM 32 - LEDs.GPIO2 */
|
||||
led-1 {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
default-state = "off";
|
||||
function = LED_FUNCTION_STATUS;
|
||||
function-enumerator = <1>;
|
||||
gpios = <&main_gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* D7 Red - SODIMM 34 - LEDs.GPIO3 */
|
||||
led-2 {
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
default-state = "off";
|
||||
function = LED_FUNCTION_STATUS;
|
||||
function-enumerator = <1>;
|
||||
gpios = <&main_gpio1 10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* D8 Blue - SODIMM 36 - LEDs.GPIO4 */
|
||||
led-3 {
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
default-state = "off";
|
||||
function = LED_FUNCTION_STATUS;
|
||||
function-enumerator = <2>;
|
||||
gpios = <&main_gpio1 9 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* D8 Green - SODIMM 54 - LEDs.GPIO5 */
|
||||
led-4 {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
default-state = "off";
|
||||
function = LED_FUNCTION_STATUS;
|
||||
function-enumerator = <2>;
|
||||
gpios = <&main_gpio0 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* D8 Red - SODIMM 44 - LEDs.GPIO6 */
|
||||
led-5 {
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
default-state = "off";
|
||||
function = LED_FUNCTION_STATUS;
|
||||
function-enumerator = <2>;
|
||||
gpios = <&main_gpio0 37 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* D9 Blue - SODIMM 46 - LEDs.GPIO7 */
|
||||
led-6 {
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
default-state = "off";
|
||||
function = LED_FUNCTION_STATUS;
|
||||
function-enumerator = <3>;
|
||||
gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* D9 Red - SODIMM 48 - LEDs.GPIO8 */
|
||||
led-7 {
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
default-state = "off";
|
||||
function = LED_FUNCTION_STATUS;
|
||||
function-enumerator = <3>;
|
||||
gpios = <&main_gpio0 33 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
reg_3v2_ain1: regulator-3v2-ain1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-max-microvolt = <3200000>;
|
||||
regulator-min-microvolt = <3200000>;
|
||||
regulator-name = "+3V2_AIN1";
|
||||
};
|
||||
|
||||
reg_3v2_ain2: regulator-3v2-ain2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-max-microvolt = <3200000>;
|
||||
regulator-min-microvolt = <3200000>;
|
||||
regulator-name = "+3V2_AIN2";
|
||||
};
|
||||
|
||||
/* Ivy Power Supply Input Voltage */
|
||||
ivy-input-voltage {
|
||||
compatible = "voltage-divider";
|
||||
/* Verdin ADC_1 */
|
||||
io-channels = <&som_adc 7>;
|
||||
full-ohms = <204700>; /* 200K + 4.7K */
|
||||
output-ohms = <4700>;
|
||||
};
|
||||
|
||||
ivy-5v-voltage {
|
||||
compatible = "voltage-divider";
|
||||
/* Verdin ADC_2 */
|
||||
io-channels = <&som_adc 6>;
|
||||
full-ohms = <39000>; /* 27K + 12K */
|
||||
output-ohms = <12000>;
|
||||
};
|
||||
|
||||
ivy-3v3-voltage {
|
||||
compatible = "voltage-divider";
|
||||
/* Verdin ADC_3 */
|
||||
io-channels = <&som_adc 5>;
|
||||
full-ohms = <54000>; /* 27K + 27K */
|
||||
output-ohms = <27000>;
|
||||
};
|
||||
|
||||
ivy-1v8-voltage {
|
||||
compatible = "voltage-divider";
|
||||
/* Verdin ADC_4 */
|
||||
io-channels = <&som_adc 4>;
|
||||
full-ohms = <39000>; /* 12K + 27K */
|
||||
output-ohms = <27000>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
pinctrl_ivy_leds: ivy-leds-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62PX_IOPAD(0x019c, PIN_INPUT, 7) /* (E24) MCASP0_AXR1.GPIO1_9 */ /* SODIMM 36 */
|
||||
AM62PX_IOPAD(0x01a0, PIN_INPUT, 7) /* (F23) MCASP0_AXR0.GPIO1_10 */ /* SODIMM 34 */
|
||||
AM62PX_IOPAD(0x01a4, PIN_INPUT, 7) /* (F24) MCASP0_ACLKX.GPIO1_11 */ /* SODIMM 30 */
|
||||
AM62PX_IOPAD(0x01a8, PIN_INPUT, 7) /* (F25) MCASP0_AFSX.GPIO1_12 */ /* SODIMM 32 */
|
||||
AM62PX_IOPAD(0x0088, PIN_INPUT, 7) /* (R24) GPMC0_OEn_REn.GPIO0_33 */ /* SODIMM 48 */
|
||||
AM62PX_IOPAD(0x0098, PIN_INPUT, 7) /* (AA24) GPMC0_WAIT0.GPIO0_37 */ /* SODIMM 44 */
|
||||
AM62PX_IOPAD(0x008c, PIN_INPUT, 7) /* (T25) GPMC0_WEn.GPIO0_34 */ /* SODIMM 46 */
|
||||
AM62PX_IOPAD(0x002c, PIN_INPUT, 7) /* (M25) OSPI0_CSn0.GPIO0_11 */ /* SODIMM 54 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin ETHs */
|
||||
&cpsw3g {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_rgmii1>, <&pinctrl_rgmii2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
|
||||
&cpsw3g_mdio {
|
||||
status = "okay";
|
||||
|
||||
carrier_eth_phy: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_eth2_rgmii_int>;
|
||||
interrupt-parent = <&main_gpio0>;
|
||||
interrupts = <42 IRQ_TYPE_EDGE_FALLING>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin ETH_1 (On-module PHY) */
|
||||
&cpsw_port1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin ETH_2_RGMII */
|
||||
&cpsw_port2 {
|
||||
phy-handle = <&carrier_eth_phy>;
|
||||
phy-mode = "rgmii-rxid";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie_1_reset>,
|
||||
<&pinctrl_qspi1_cs2_gpio>,
|
||||
<&pinctrl_qspi1_dqs_gpio>,
|
||||
<&pinctrl_qspi1_io0_gpio>,
|
||||
<&pinctrl_qspi1_io1_gpio>,
|
||||
<&pinctrl_qspi1_io2_gpio>,
|
||||
<&pinctrl_qspi1_io3_gpio>;
|
||||
gpio-line-names =
|
||||
"", /* 0 */
|
||||
"",
|
||||
"REL4", /* SODIMM 66 */
|
||||
"DIGI_1", /* SODIMM 56 */
|
||||
"DIGI_2", /* SODIMM 58 */
|
||||
"REL1", /* SODIMM 60 */
|
||||
"REL2", /* SODIMM 62 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 10 */
|
||||
"",
|
||||
"REL3", /* SODIMM 64 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 20 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 30 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 40 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 50 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 60 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 70 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 80 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 90 */
|
||||
"";
|
||||
};
|
||||
|
||||
&main_gpio1 {
|
||||
gpio-line-names =
|
||||
"", /* 0 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 10 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 20 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 30 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 40 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 50 */
|
||||
"";
|
||||
};
|
||||
|
||||
/* Verdin I2C_1 */
|
||||
&main_i2c0 {
|
||||
status = "okay";
|
||||
|
||||
temperature-sensor@4f {
|
||||
compatible = "ti,tmp1075";
|
||||
reg = <0x4f>;
|
||||
};
|
||||
|
||||
carrier_eeprom: eeprom@57 {
|
||||
compatible = "st,24c02", "atmel,24c02";
|
||||
reg = <0x57>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin I2C_4_CSI */
|
||||
&main_i2c3 {
|
||||
status = "okay";
|
||||
|
||||
ivy_adc1: adc@40 {
|
||||
compatible = "ti,ads1119";
|
||||
reg = <0x40>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_7>;
|
||||
interrupt-parent = <&main_gpio0>;
|
||||
interrupts = <51 IRQ_TYPE_EDGE_FALLING>;
|
||||
avdd-supply = <®_3v2_ain1>;
|
||||
dvdd-supply = <®_3v2_ain1>;
|
||||
vref-supply = <®_3v2_ain1>;
|
||||
#address-cells = <1>;
|
||||
#io-channel-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* AIN1 0-33V Voltage Input */
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
diff-channels = <0 1>;
|
||||
};
|
||||
|
||||
/* AIN1 0-20mA Current Input */
|
||||
channel@1 {
|
||||
reg = <1>;
|
||||
diff-channels = <2 3>;
|
||||
};
|
||||
};
|
||||
|
||||
ivy_adc2: adc@41 {
|
||||
compatible = "ti,ads1119";
|
||||
reg = <0x41>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_8>;
|
||||
interrupt-parent = <&main_gpio0>;
|
||||
interrupts = <52 IRQ_TYPE_EDGE_FALLING>;
|
||||
avdd-supply = <®_3v2_ain2>;
|
||||
dvdd-supply = <®_3v2_ain2>;
|
||||
vref-supply = <®_3v2_ain2>;
|
||||
#address-cells = <1>;
|
||||
#io-channel-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* AIN2 0-33V Voltage Input */
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
diff-channels = <0 1>;
|
||||
};
|
||||
|
||||
/* AIN2 0-20mA Current Input */
|
||||
channel@1 {
|
||||
reg = <1>;
|
||||
diff-channels = <2 3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin CAN_1 */
|
||||
&main_mcan0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin SPI_1 */
|
||||
&main_spi1 {
|
||||
pinctrl-0 = <&pinctrl_main_spi1>,
|
||||
<&pinctrl_main_spi1_cs0>,
|
||||
<&pinctrl_gpio_1>,
|
||||
<&pinctrl_gpio_4>;
|
||||
cs-gpios = <0>,
|
||||
<&mcu_gpio0 1 GPIO_ACTIVE_LOW>,
|
||||
<&mcu_gpio0 4 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
tpm@1 {
|
||||
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <18500000>;
|
||||
};
|
||||
|
||||
fram@2 {
|
||||
compatible = "fujitsu,mb85rs256", "atmel,at25";
|
||||
reg = <2>;
|
||||
address-width = <16>;
|
||||
size = <32768>;
|
||||
spi-max-frequency = <33000000>;
|
||||
pagesize = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin UART_3, used as the Linux console */
|
||||
&main_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_1 */
|
||||
&main_uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_2>,
|
||||
<&pinctrl_gpio_3>;
|
||||
gpio-line-names =
|
||||
"",
|
||||
"",
|
||||
"GPIO2", /* Verdin GPIO_2 - SODIMM 208 */
|
||||
"GPIO3", /* Verdin GPIO_3 - SODIMM 210 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 10 */
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"", /* 20 */
|
||||
"",
|
||||
"",
|
||||
"";
|
||||
};
|
||||
|
||||
/* Verdin CAN_2 */
|
||||
&mcu_mcan0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin SD_1 */
|
||||
&sdhci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin USB_1 */
|
||||
&usbss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin USB_2 */
|
||||
&usbss1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PCIE_1_RESET# */
|
||||
&verdin_pcie_1_reset_hog {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_2 */
|
||||
&wkup_uart0 {
|
||||
rs485-rts-active-low;
|
||||
rs485-rx-during-tx;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
status = "okay";
|
||||
};
|
||||
213
arch/arm64/boot/dts/ti/k3-am62p-verdin-mallow.dtsi
Normal file
213
arch/arm64/boot/dts/ti/k3-am62p-verdin-mallow.dtsi
Normal file
|
|
@ -0,0 +1,213 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* Common dtsi for Verdin AM62P SoM on Mallow carrier board
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/mallow-carrier-board
|
||||
*/
|
||||
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
eeprom1 = &carrier_eeprom;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qspi1_clk_gpio>,
|
||||
<&pinctrl_qspi1_cs_gpio>,
|
||||
<&pinctrl_qspi1_io0_gpio>,
|
||||
<&pinctrl_qspi1_io1_gpio>;
|
||||
|
||||
/* SODIMM 52 - USER_LED_1_RED */
|
||||
led-0 {
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_DEBUG;
|
||||
function-enumerator = <1>;
|
||||
gpios = <&main_gpio0 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* SODIMM 54 - USER_LED_1_GREEN */
|
||||
led-1 {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_DEBUG;
|
||||
function-enumerator = <1>;
|
||||
gpios = <&main_gpio0 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* SODIMM 56 - USER_LED_2_RED */
|
||||
led-2 {
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_DEBUG;
|
||||
function-enumerator = <2>;
|
||||
gpios = <&main_gpio0 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* SODIMM 58 - USER_LED_2_GREEN */
|
||||
led-3 {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_DEBUG;
|
||||
function-enumerator = <2>;
|
||||
gpios = <&main_gpio0 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin ETHs */
|
||||
&cpsw3g {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
|
||||
&cpsw3g_mdio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin ETH_1 (On-module PHY) */
|
||||
&cpsw_port1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PWM_3_DSI */
|
||||
&epwm0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PWM_1, PWM_2 */
|
||||
&epwm2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie_1_reset>,
|
||||
<&pinctrl_gpio_5>,
|
||||
<&pinctrl_gpio_6>,
|
||||
<&pinctrl_gpio_7>,
|
||||
<&pinctrl_gpio_8>;
|
||||
};
|
||||
|
||||
/* Verdin I2C_1 */
|
||||
&main_i2c0 {
|
||||
status = "okay";
|
||||
|
||||
temperature-sensor@4f {
|
||||
compatible = "ti,tmp1075";
|
||||
reg = <0x4f>;
|
||||
};
|
||||
|
||||
carrier_eeprom: eeprom@57 {
|
||||
compatible = "st,24c02", "atmel,24c02";
|
||||
reg = <0x57>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin I2C_2_DSI */
|
||||
&main_i2c1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin I2C_4_CSI */
|
||||
&main_i2c3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CAN_1 */
|
||||
&main_mcan0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin SPI_1 */
|
||||
&main_spi1 {
|
||||
pinctrl-0 = <&pinctrl_main_spi1>,
|
||||
<&pinctrl_main_spi1_cs0>,
|
||||
<&pinctrl_qspi1_cs2_gpio>;
|
||||
cs-gpios = <0>, <&main_gpio0 12 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
tpm@1 {
|
||||
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
|
||||
reg = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qspi1_dqs_gpio>;
|
||||
interrupt-parent = <&main_gpio0>;
|
||||
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
|
||||
spi-max-frequency = <18500000>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin UART_3, used as the Linux console */
|
||||
&main_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_1 */
|
||||
&main_uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_1>,
|
||||
<&pinctrl_gpio_2>,
|
||||
<&pinctrl_gpio_3>,
|
||||
<&pinctrl_gpio_4>;
|
||||
};
|
||||
|
||||
/* Verdin I2C_3_HDMI */
|
||||
&mcu_i2c0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CAN_2 */
|
||||
&mcu_mcan0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_4 */
|
||||
&mcu_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin SD_1 */
|
||||
&sdhci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin USB_1 */
|
||||
&usbss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin USB_2 */
|
||||
&usbss1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CTRL_WAKE1_MICO# */
|
||||
&verdin_gpio_keys {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PCIE_1_RESET# */
|
||||
&verdin_pcie_1_reset_hog {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_2 */
|
||||
&wkup_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
15
arch/arm64/boot/dts/ti/k3-am62p-verdin-nonwifi.dtsi
Normal file
15
arch/arm64/boot/dts/ti/k3-am62p-verdin-nonwifi.dtsi
Normal file
|
|
@ -0,0 +1,15 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* Common dtsi for Verdin AM62P SoM non-WB variant
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
*/
|
||||
|
||||
/* SDIO on MSP 30, 31, 32, 33, 34, 35 */
|
||||
&sdhci2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sdhci2>;
|
||||
status = "disabled";
|
||||
};
|
||||
31
arch/arm64/boot/dts/ti/k3-am62p-verdin-wifi.dtsi
Normal file
31
arch/arm64/boot/dts/ti/k3-am62p-verdin-wifi.dtsi
Normal file
|
|
@ -0,0 +1,31 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* Common dtsi for Verdin AM62P SoM WB variant
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
*/
|
||||
|
||||
/* On-module Bluetooth */
|
||||
&main_uart6 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart6>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "nxp,88w8987-bt";
|
||||
fw-init-baudrate = <3000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/* On-module Wi-Fi */
|
||||
&sdhci2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sdhci2>;
|
||||
keep-power-in-suspend;
|
||||
non-removable;
|
||||
ti,fails-without-test-cd;
|
||||
status = "okay";
|
||||
};
|
||||
219
arch/arm64/boot/dts/ti/k3-am62p-verdin-yavia.dtsi
Normal file
219
arch/arm64/boot/dts/ti/k3-am62p-verdin-yavia.dtsi
Normal file
|
|
@ -0,0 +1,219 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* Common dtsi for Verdin AM62P SoM on Yavia carrier board
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/yavia
|
||||
*/
|
||||
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
eeprom1 = &carrier_eeprom;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qspi1_clk_gpio>,
|
||||
<&pinctrl_qspi1_cs_gpio>,
|
||||
<&pinctrl_qspi1_io0_gpio>,
|
||||
<&pinctrl_qspi1_io1_gpio>,
|
||||
<&pinctrl_qspi1_io2_gpio>,
|
||||
<&pinctrl_qspi1_io3_gpio>;
|
||||
|
||||
/* SODIMM 52 - LD1_RED */
|
||||
led-0 {
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_DEBUG;
|
||||
function-enumerator = <1>;
|
||||
gpios = <&main_gpio0 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* SODIMM 54 - LD1_GREEN */
|
||||
led-1 {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_DEBUG;
|
||||
function-enumerator = <1>;
|
||||
gpios = <&main_gpio0 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* SODIMM 56 - LD1_BLUE */
|
||||
led-2 {
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_DEBUG;
|
||||
function-enumerator = <1>;
|
||||
gpios = <&main_gpio0 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* SODIMM 58 - LD2_RED */
|
||||
led-3 {
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_DEBUG;
|
||||
function-enumerator = <2>;
|
||||
gpios = <&main_gpio0 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* SODIMM 60 - LD2_GREEN */
|
||||
led-4 {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_DEBUG;
|
||||
function-enumerator = <2>;
|
||||
gpios = <&main_gpio0 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* SODIMM 62 - LD2_BLUE */
|
||||
led-5 {
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_DEBUG;
|
||||
function-enumerator = <2>;
|
||||
gpios = <&main_gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin ETHs */
|
||||
&cpsw3g {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
|
||||
&cpsw3g_mdio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin ETH_1 (On-module PHY) */
|
||||
&cpsw_port1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PWM_3_DSI */
|
||||
&epwm0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PWM_1, PWM_2 */
|
||||
&epwm2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie_1_reset>,
|
||||
<&pinctrl_qspi1_cs2_gpio>,
|
||||
<&pinctrl_qspi1_dqs_gpio>,
|
||||
<&pinctrl_gpio_5>,
|
||||
<&pinctrl_gpio_6>,
|
||||
<&pinctrl_gpio_7>,
|
||||
<&pinctrl_gpio_8>;
|
||||
};
|
||||
|
||||
/* Verdin I2C_1 */
|
||||
&main_i2c0 {
|
||||
status = "okay";
|
||||
|
||||
temperature-sensor@4f {
|
||||
compatible = "ti,tmp75c";
|
||||
reg = <0x4f>;
|
||||
};
|
||||
|
||||
carrier_eeprom: eeprom@57 {
|
||||
compatible = "st,24c02", "atmel,24c02";
|
||||
reg = <0x57>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin I2C_2_DSI */
|
||||
&main_i2c1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin I2C_4_CSI */
|
||||
&main_i2c3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CAN_1 */
|
||||
&main_mcan0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin SPI_1 */
|
||||
&main_spi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_3, used as the Linux console */
|
||||
&main_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_1 */
|
||||
&main_uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_1>,
|
||||
<&pinctrl_gpio_2>,
|
||||
<&pinctrl_gpio_3>,
|
||||
<&pinctrl_gpio_4>;
|
||||
};
|
||||
|
||||
/* Verdin I2C_3_HDMI */
|
||||
&mcu_i2c0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CAN_2 */
|
||||
&mcu_mcan0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_4 */
|
||||
&mcu_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin SD_1 */
|
||||
&sdhci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin USB_1 */
|
||||
&usbss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin USB_2 */
|
||||
&usbss1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin CTRL_WAKE1_MICO# */
|
||||
&verdin_gpio_keys {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PCIE_1_RESET# */
|
||||
&verdin_pcie_1_reset_hog {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin UART_2 */
|
||||
&wkup_uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
1404
arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
Normal file
1404
arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
|
|
@ -49,6 +49,30 @@ reserved-memory {
|
|||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9b800000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9b900000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c800000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c900000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_tfa_ddr: tfa@9e780000 {
|
||||
reg = <0x00 0x9e780000 0x00 0x80000>;
|
||||
no-map;
|
||||
|
|
@ -58,12 +82,6 @@ secure_ddr: optee@9e800000 {
|
|||
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c900000 0x00 0x01e00000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
vmain_pd: regulator-0 {
|
||||
|
|
@ -115,6 +133,28 @@ vddshv_sdio: regulator-3 {
|
|||
bootph-all;
|
||||
};
|
||||
|
||||
vcc_3v3_main: regulator-4 {
|
||||
/* output of LM5141-Q1 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3_main";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vmain_pd>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vcc_3v3_sys: regulator-5 {
|
||||
/* output of TPS222965DSGT */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3_sys";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vcc_3v3_main>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -356,6 +396,32 @@ wlan_en_pins_default: wlan-en-default-pins {
|
|||
AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_ecap1_pins_default: main-ecap1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62PX_IOPAD(0x019c, PIN_OUTPUT, 2) /* (E24) MCASP0_AXR1.ECAP1_IN_APWM_OUT */
|
||||
>;
|
||||
};
|
||||
|
||||
main_ecap2_pins_default: main-ecap2-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62PX_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (F24) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */
|
||||
>;
|
||||
};
|
||||
|
||||
main_epwm0_pins_default: main-epwm0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62PX_IOPAD(0x01b4, PIN_OUTPUT, 2) /* (D20) SPI0_CS0.EHRPWM0_A */
|
||||
AM62PX_IOPAD(0x01b8, PIN_OUTPUT, 2) /* (E20) SPI0_CS1.EHRPWM0_B */
|
||||
>;
|
||||
};
|
||||
|
||||
main_epwm1_pins_default: main-epwm1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62PX_IOPAD(0x01bc, PIN_OUTPUT, 2) /* (B21) SPI0_CLK.EHRPWM1_A */
|
||||
AM62PX_IOPAD(0x01c0, PIN_OUTPUT, 2) /* (B20) SPI0_D0.EHRPWM1_B */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
|
|
@ -454,8 +520,8 @@ &main_i2c2 {
|
|||
|
||||
&sdhci0 {
|
||||
status = "okay";
|
||||
non-removable;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
|
|
@ -640,6 +706,26 @@ mbox_mcu_r5_0: mbox-mcu-r5-0 {
|
|||
};
|
||||
};
|
||||
|
||||
&wkup_r5fss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
|
||||
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
|
||||
<&wkup_r5fss0_core0_memory_region>;
|
||||
};
|
||||
|
||||
&mcu_r5fss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
|
||||
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
|
||||
<&mcu_r5fss0_core0_memory_region>;
|
||||
};
|
||||
|
||||
&main_uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart0_pins_default>;
|
||||
|
|
@ -683,3 +769,31 @@ &mcu_gpio0 {
|
|||
&mcu_gpio_intr {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&ecap1 {
|
||||
/* P36 of J4 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_ecap1_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecap2 {
|
||||
/* P11 of J4 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_ecap2_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&epwm0 {
|
||||
/* P24/P26 of J4 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_epwm0_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&epwm1 {
|
||||
/* P23/P19 of J4 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_epwm1_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dahlia.dts
Normal file
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dahlia.dts
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k3-am62p5.dtsi"
|
||||
#include "k3-am62p-verdin.dtsi"
|
||||
#include "k3-am62p-verdin-nonwifi.dtsi"
|
||||
#include "k3-am62p-verdin-dahlia.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Toradex Verdin AM62P on Dahlia Board";
|
||||
compatible = "toradex,verdin-am62p-nonwifi-dahlia",
|
||||
"toradex,verdin-am62p-nonwifi",
|
||||
"toradex,verdin-am62p",
|
||||
"ti,am62p5";
|
||||
};
|
||||
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dev.dts
Normal file
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dev.dts
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/verdin-development-board-kit
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k3-am62p5.dtsi"
|
||||
#include "k3-am62p-verdin.dtsi"
|
||||
#include "k3-am62p-verdin-nonwifi.dtsi"
|
||||
#include "k3-am62p-verdin-dev.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Toradex Verdin AM62P on Verdin Development Board";
|
||||
compatible = "toradex,verdin-am62p-nonwifi-dev",
|
||||
"toradex,verdin-am62p-nonwifi",
|
||||
"toradex,verdin-am62p",
|
||||
"ti,am62p5";
|
||||
};
|
||||
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-ivy.dts
Normal file
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-ivy.dts
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/ivy-carrier-board
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k3-am62p5.dtsi"
|
||||
#include "k3-am62p-verdin.dtsi"
|
||||
#include "k3-am62p-verdin-nonwifi.dtsi"
|
||||
#include "k3-am62p-verdin-ivy.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Toradex Verdin AM62P on Ivy Board";
|
||||
compatible = "toradex,verdin-am62p-nonwifi-ivy",
|
||||
"toradex,verdin-am62p-nonwifi",
|
||||
"toradex,verdin-am62p",
|
||||
"ti,am62p5";
|
||||
};
|
||||
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-mallow.dts
Normal file
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-mallow.dts
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/mallow-carrier-board
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k3-am62p5.dtsi"
|
||||
#include "k3-am62p-verdin.dtsi"
|
||||
#include "k3-am62p-verdin-nonwifi.dtsi"
|
||||
#include "k3-am62p-verdin-mallow.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Toradex Verdin AM62P on Mallow Board";
|
||||
compatible = "toradex,verdin-am62p-nonwifi-mallow",
|
||||
"toradex,verdin-am62p-nonwifi",
|
||||
"toradex,verdin-am62p",
|
||||
"ti,am62p5";
|
||||
};
|
||||
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-yavia.dts
Normal file
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-yavia.dts
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/yavia
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k3-am62p5.dtsi"
|
||||
#include "k3-am62p-verdin.dtsi"
|
||||
#include "k3-am62p-verdin-nonwifi.dtsi"
|
||||
#include "k3-am62p-verdin-yavia.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Toradex Verdin AM62P on Yavia Board";
|
||||
compatible = "toradex,verdin-am62p-nonwifi-yavia",
|
||||
"toradex,verdin-am62p-nonwifi",
|
||||
"toradex,verdin-am62p",
|
||||
"ti,am62p5";
|
||||
};
|
||||
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dahlia.dts
Normal file
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dahlia.dts
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k3-am62p5.dtsi"
|
||||
#include "k3-am62p-verdin.dtsi"
|
||||
#include "k3-am62p-verdin-wifi.dtsi"
|
||||
#include "k3-am62p-verdin-dahlia.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Toradex Verdin AM62P WB on Dahlia Board";
|
||||
compatible = "toradex,verdin-am62p-wifi-dahlia",
|
||||
"toradex,verdin-am62p-wifi",
|
||||
"toradex,verdin-am62p",
|
||||
"ti,am62p5";
|
||||
};
|
||||
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dev.dts
Normal file
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dev.dts
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/verdin-development-board-kit
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k3-am62p5.dtsi"
|
||||
#include "k3-am62p-verdin.dtsi"
|
||||
#include "k3-am62p-verdin-wifi.dtsi"
|
||||
#include "k3-am62p-verdin-dev.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Toradex Verdin AM62P WB on Verdin Development Board";
|
||||
compatible = "toradex,verdin-am62p-wifi-dev",
|
||||
"toradex,verdin-am62p-wifi",
|
||||
"toradex,verdin-am62p",
|
||||
"ti,am62p5";
|
||||
};
|
||||
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-ivy.dts
Normal file
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-ivy.dts
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/ivy-carrier-board
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k3-am62p5.dtsi"
|
||||
#include "k3-am62p-verdin.dtsi"
|
||||
#include "k3-am62p-verdin-wifi.dtsi"
|
||||
#include "k3-am62p-verdin-ivy.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Toradex Verdin AM62P WB on Ivy Board";
|
||||
compatible = "toradex,verdin-am62p-wifi-ivy",
|
||||
"toradex,verdin-am62p-wifi",
|
||||
"toradex,verdin-am62p",
|
||||
"ti,am62p5";
|
||||
};
|
||||
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-mallow.dts
Normal file
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-mallow.dts
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/mallow-carrier-board
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k3-am62p5.dtsi"
|
||||
#include "k3-am62p-verdin.dtsi"
|
||||
#include "k3-am62p-verdin-wifi.dtsi"
|
||||
#include "k3-am62p-verdin-mallow.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Toradex Verdin AM62P WB on Mallow Board";
|
||||
compatible = "toradex,verdin-am62p-wifi-mallow",
|
||||
"toradex,verdin-am62p-wifi",
|
||||
"toradex,verdin-am62p",
|
||||
"ti,am62p5";
|
||||
};
|
||||
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-yavia.dts
Normal file
22
arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-yavia.dts
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright 2025 Toradex
|
||||
*
|
||||
* https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
|
||||
* https://www.toradex.com/products/carrier-board/yavia
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k3-am62p5.dtsi"
|
||||
#include "k3-am62p-verdin.dtsi"
|
||||
#include "k3-am62p-verdin-wifi.dtsi"
|
||||
#include "k3-am62p-verdin-yavia.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Toradex Verdin AM62P WB on Yavia Board";
|
||||
compatible = "toradex,verdin-am62p-wifi-yavia",
|
||||
"toradex,verdin-am62p-wifi",
|
||||
"toradex,verdin-am62p",
|
||||
"ti,am62p5";
|
||||
};
|
||||
|
|
@ -33,7 +33,7 @@ AM62X_IOPAD(0x0a4, PIN_OUTPUT, 7) /* (M22) GPMC0_DIR.GPIO0_40 */
|
|||
&thermal_zones {
|
||||
main0_thermal: main0-thermal {
|
||||
trips {
|
||||
main0_thermal_trip0: main0-thermal-trip {
|
||||
main0_fan: main0-fan {
|
||||
temperature = <65000>; /* millicelsius */
|
||||
hysteresis = <2000>; /* millicelsius */
|
||||
type = "active";
|
||||
|
|
@ -42,7 +42,17 @@ main0_thermal_trip0: main0-thermal-trip {
|
|||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&main0_thermal_trip0>;
|
||||
trip = <&main0_alert>;
|
||||
cooling-device =
|
||||
<&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
|
||||
map1 {
|
||||
trip = <&main0_fan>;
|
||||
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -70,6 +70,18 @@ mcu_m4fss_memory_region: m4f-memory@9cc00000 {
|
|||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9da00000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9db00000 0x00 0xc00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_tfa_ddr: tfa@9e780000 {
|
||||
reg = <0x00 0x9e780000 0x00 0x80000>;
|
||||
alignment = <0x1000>;
|
||||
|
|
@ -82,11 +94,6 @@ secure_ddr: optee@9e800000 {
|
|||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9db00000 0x00 0xc00000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
|
|
@ -303,6 +310,25 @@ AM62X_IOPAD(0x074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */
|
|||
AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_ecap0_pins_default: main-ecap0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01b8, PIN_OUTPUT, 3) /* (C13) SPI0_CS1.ECAP0_IN_APWM_OUT */
|
||||
>;
|
||||
};
|
||||
|
||||
main_ecap2_pins_default: main-ecap2-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (B20) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */
|
||||
>;
|
||||
};
|
||||
|
||||
main_epwm1_pins_default: main-epwm1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */
|
||||
AM62X_IOPAD(0x01a0, PIN_OUTPUT, 6) /* (E18) MCASP0_AXR0.EHRPWM1_B */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_pmx0 {
|
||||
|
|
@ -434,9 +460,9 @@ &main_i2c2 {
|
|||
&sdhci0 {
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||
disable-wp;
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
|
|
@ -476,10 +502,17 @@ cpsw3g_phy0: ethernet-phy@0 {
|
|||
};
|
||||
|
||||
&mailbox0_cluster0 {
|
||||
status = "okay";
|
||||
|
||||
mbox_m4_0: mbox-m4-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
|
||||
mbox_r5_0: mbox-r5-0 {
|
||||
ti,mbox-rx = <2 0 0>;
|
||||
ti,mbox-tx = <3 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_m4fss {
|
||||
|
|
@ -489,6 +522,16 @@ &mcu_m4fss {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_r5fss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
|
||||
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
|
||||
<&wkup_r5fss0_core0_memory_region>;
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
|
|
@ -560,3 +603,24 @@ &mcu_gpio0 {
|
|||
&mcu_gpio_intr {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&ecap0 {
|
||||
/* P26 of J3 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_ecap0_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecap2 {
|
||||
/* P11 of J3 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_ecap2_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&epwm1 {
|
||||
/* P36/P33 of J3 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_epwm1_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -15,6 +15,33 @@ clk_imx219_fixed: imx219-xclk {
|
|||
#clock-cells = <0>;
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
reg_2p8v: regulator-2p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "2P8V";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
vin-supply = <&vcc_3v3_sys>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc_3v3_sys>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p2v: regulator-1p2v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P2V";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
vin-supply = <&vcc_3v3_sys>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&main_i2c2 {
|
||||
|
|
@ -22,7 +49,7 @@ &main_i2c2 {
|
|||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
i2c-switch@71 {
|
||||
i2c-mux@71 {
|
||||
compatible = "nxp,pca9543";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -39,7 +66,10 @@ ov5640: camera@10 {
|
|||
reg = <0x10>;
|
||||
|
||||
clocks = <&clk_imx219_fixed>;
|
||||
clock-names = "xclk";
|
||||
|
||||
VANA-supply = <®_2p8v>;
|
||||
VDIG-supply = <®_1p8v>;
|
||||
VDDL-supply = <®_1p2v>;
|
||||
|
||||
reset-gpios = <&exp1 13 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
|
|
|
|||
|
|
@ -15,6 +15,33 @@ clk_ov5640_fixed: ov5640-xclk {
|
|||
#clock-cells = <0>;
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
reg_2p8v: regulator-2p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "2P8V";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
vin-supply = <&vcc_3v3_sys>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc_3v3_sys>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p5v: regulator-1p5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P5V";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
vin-supply = <&vcc_3v3_sys>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&main_i2c2 {
|
||||
|
|
@ -22,7 +49,7 @@ &main_i2c2 {
|
|||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
i2c-switch@71 {
|
||||
i2c-mux@71 {
|
||||
compatible = "nxp,pca9543";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -40,6 +67,11 @@ ov5640: camera@3c {
|
|||
|
||||
clocks = <&clk_ov5640_fixed>;
|
||||
clock-names = "xclk";
|
||||
|
||||
AVDD-supply = <®_2p8v>;
|
||||
DOVDD-supply = <®_1p8v>;
|
||||
DVDD-supply = <®_1p5v>;
|
||||
|
||||
powerdown-gpios = <&exp1 13 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
|
|
|
|||
|
|
@ -15,6 +15,33 @@ clk_ov5640_fixed: ov5640-xclk {
|
|||
#clock-cells = <0>;
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
reg_2p8v: regulator-2p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "2P8V";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
vin-supply = <&vcc_3v3_sys>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc_3v3_sys>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vcc_3v3_sys>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&main_i2c2 {
|
||||
|
|
@ -22,7 +49,7 @@ &main_i2c2 {
|
|||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
i2c-switch@71 {
|
||||
i2c-mux@71 {
|
||||
compatible = "nxp,pca9543";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -40,6 +67,11 @@ ov5640: camera@3c {
|
|||
|
||||
clocks = <&clk_ov5640_fixed>;
|
||||
clock-names = "xclk";
|
||||
|
||||
AVDD-supply = <®_2p8v>;
|
||||
DOVDD-supply = <®_1p8v>;
|
||||
DVDD-supply = <®_3p3v>;
|
||||
|
||||
powerdown-gpios = <&exp1 13 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
|
|
|
|||
|
|
@ -51,6 +51,11 @@ chipid@14 {
|
|||
reg = <0x00000014 0x4>;
|
||||
};
|
||||
|
||||
pcie0_ctrl: pcie-ctrl@4070 {
|
||||
compatible = "ti,j784s4-pcie-ctrl", "syscon";
|
||||
reg = <0x4070 0x4>;
|
||||
};
|
||||
|
||||
serdes_ln_ctrl: mux-controller@4080 {
|
||||
compatible = "reg-mux";
|
||||
reg = <0x4080 0x4>;
|
||||
|
|
@ -1031,12 +1036,12 @@ pcie0_rc: pcie@f102000 {
|
|||
reg = <0x00 0x0f102000 0x00 0x1000>,
|
||||
<0x00 0x0f100000 0x00 0x400>,
|
||||
<0x00 0x0d000000 0x00 0x00800000>,
|
||||
<0x00 0x68000000 0x00 0x00001000>;
|
||||
<0x06 0x00000000 0x00 0x00001000>; /* ECAM (4 KB) */
|
||||
reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
|
||||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
|
||||
device_type = "pci";
|
||||
ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
|
||||
ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
|
||||
max-link-speed = <2>;
|
||||
num-lanes = <1>;
|
||||
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
|
@ -1049,8 +1054,8 @@ pcie0_rc: pcie@f102000 {
|
|||
vendor-id = <0x104c>;
|
||||
device-id = <0xb010>;
|
||||
msi-map = <0x0 &gic_its 0x0 0x10000>;
|
||||
ranges = <0x01000000 0x00 0x68001000 0x00 0x68001000 0x00 0x0010000>,
|
||||
<0x02000000 0x00 0x68011000 0x00 0x68011000 0x00 0x7fef000>;
|
||||
ranges = <0x01000000 0x00 0x00001000 0x06 0x00001000 0x00 0x00100000>, /* IO (1 MB) */
|
||||
<0x02000000 0x00 0x00101000 0x06 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */
|
||||
dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -46,6 +46,6 @@ pcie0_ep: pcie-ep@f102000 {
|
|||
max-functions = /bits/ 8 <1>;
|
||||
phys = <&serdes0_pcie_link>;
|
||||
phy-names = "pcie-phy";
|
||||
ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
|
||||
ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -597,7 +597,6 @@ &sdhci0 {
|
|||
status = "okay";
|
||||
non-removable;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
|
|
@ -796,6 +795,26 @@ &mcu_m4fss {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
/* main_timer8 is used by r5f0-0 */
|
||||
&main_timer8 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
/* main_timer9 is used by r5f0-1 */
|
||||
&main_timer9 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
/* main_timer10 is used by r5f1-0 */
|
||||
&main_timer10 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
/* main_timer11 is used by r5f1-1 */
|
||||
&main_timer11 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&serdes_ln_ctrl {
|
||||
idle-states = <AM64_SERDES0_LANE0_PCIE0>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -710,6 +710,26 @@ &mcu_m4fss {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
/* main_timer8 is used by r5f0-0 */
|
||||
&main_timer8 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
/* main_timer9 is used by r5f0-1 */
|
||||
&main_timer9 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
/* main_timer10 is used by r5f1-0 */
|
||||
&main_timer10 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
/* main_timer11 is used by r5f1-1 */
|
||||
&main_timer11 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&ecap0 {
|
||||
status = "okay";
|
||||
/* PWM is available on Pin 1 of header J3 */
|
||||
|
|
|
|||
|
|
@ -449,6 +449,8 @@ sdhci0: mmc@4f80000 {
|
|||
ti,otap-del-sel-mmc-hs = <0x0>;
|
||||
ti,otap-del-sel-ddr52 = <0x5>;
|
||||
ti,otap-del-sel-hs200 = <0x5>;
|
||||
ti,itap-del-sel-legacy = <0xa>;
|
||||
ti,itap-del-sel-mmc-hs = <0x1>;
|
||||
ti,itap-del-sel-ddr52 = <0x0>;
|
||||
dma-coherent;
|
||||
status = "disabled";
|
||||
|
|
@ -479,7 +481,7 @@ sdhci1: mmc@4fa0000 {
|
|||
};
|
||||
|
||||
scm_conf: scm-conf@100000 {
|
||||
compatible = "syscon", "simple-mfd";
|
||||
compatible = "ti,am654-system-controller", "syscon", "simple-mfd";
|
||||
reg = <0 0x00100000 0 0x1c000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -15,8 +15,20 @@
|
|||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
&{/} {
|
||||
vcc_5v0: lcd-regulator {
|
||||
/* Output of LM5140 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_5v0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&evm_12v0>;
|
||||
};
|
||||
|
||||
display0 {
|
||||
compatible = "rocktech,rk101ii01d-ct";
|
||||
power-supply = <&vcc_5v0>;
|
||||
backlight = <&lcd_bl>;
|
||||
enable-gpios = <&pca9555 8 GPIO_ACTIVE_HIGH>;
|
||||
port {
|
||||
|
|
|
|||
|
|
@ -456,7 +456,6 @@ &sdhci0 {
|
|||
bus-width = <8>;
|
||||
non-removable;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -50,5 +50,4 @@ &sdhci0 {
|
|||
bus-width = <8>;
|
||||
non-removable;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -309,6 +309,7 @@ &cpsw_port1 {
|
|||
};
|
||||
|
||||
&main_gpio1 {
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
575
arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts
Normal file
575
arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts
Normal file
|
|
@ -0,0 +1,575 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/*
|
||||
* Copyright (C) 2025 PHYTEC Messtechnik GmbH
|
||||
* Author: Dominik Haller <d.haller@phytec.de>
|
||||
*
|
||||
* https://www.phytec.eu/en/produkte/development-kits/phyboard-izar/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/leds/leds-pca9532.h>
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
#include <dt-bindings/phy/phy-cadence.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
#include "k3-am68-phycore-som.dtsi"
|
||||
|
||||
#include "k3-serdes.h"
|
||||
|
||||
/ {
|
||||
compatible = "phytec,am68-phyboard-izar",
|
||||
"phytec,am68-phycore-som", "ti,j721s2";
|
||||
model = "PHYTEC phyBOARD-Izar-AM68x";
|
||||
|
||||
aliases {
|
||||
serial0 = &mcu_uart0;
|
||||
serial1 = &main_uart1;
|
||||
serial2 = &main_uart8;
|
||||
serial3 = &main_uart2;
|
||||
mmc1 = &main_sdhci1;
|
||||
ethernet0 = &cpsw_port1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &main_uart8;
|
||||
};
|
||||
|
||||
transceiver1: can-phy1 {
|
||||
compatible = "ti,tcan1043";
|
||||
#phy-cells = <0>;
|
||||
max-bitrate = <8000000>;
|
||||
};
|
||||
|
||||
transceiver2: can-phy2 {
|
||||
compatible = "ti,tcan1043";
|
||||
#phy-cells = <0>;
|
||||
max-bitrate = <8000000>;
|
||||
};
|
||||
|
||||
transceiver3: can-phy3 {
|
||||
compatible = "ti,tcan1043";
|
||||
#phy-cells = <0>;
|
||||
max-bitrate = <8000000>;
|
||||
};
|
||||
|
||||
transceiver4: can-phy4 {
|
||||
compatible = "ti,tcan1043";
|
||||
#phy-cells = <0>;
|
||||
max-bitrate = <8000000>;
|
||||
};
|
||||
|
||||
vcc_12v0: regulator-12v0 {
|
||||
/* main supply */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VCC_IN";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vcc_1v8: regulator-vcc-1v8 {
|
||||
/* Output of TLV7158P */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VCC_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vcc_3v3>;
|
||||
};
|
||||
|
||||
vcc_3v3: regulator-vcc-3v3 {
|
||||
/* Output of SiC431 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VCC_3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vcc_5v0>;
|
||||
};
|
||||
|
||||
vcc_5v0: regulator-vcc-5v0 {
|
||||
/* Output of LM5116 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VCC_5V0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vcc_12v0>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
main_i2c2_pins_default: main-i2c2-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x04c, PIN_INPUT_PULLUP, 13) /* (V27) MCASP1_AXR1.I2C2_SCL */
|
||||
J721S2_IOPAD(0x050, PIN_INPUT_PULLUP, 13) /* (W27) MCASP1_AXR2.I2C2_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c4_pins_default: main-i2c4-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AD25) MCAN14_TX.I2C4_SCL */
|
||||
J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AF28) MCAN13_RX.I2C4_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c5_pins_default: main-i2c5-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x01c, PIN_INPUT_PULLUP, 8) /* (Y24) MCAN15_TX.I2C5_SCL */
|
||||
J721S2_IOPAD(0x018, PIN_INPUT_PULLUP, 8) /* (W23) MCAN14_RX.I2C5_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_gpio0_ioexp_intr_pins_default: main-gpio0-ioexp-intr-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mcan1_pins_default: main-mcan1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x0c8, PIN_INPUT, 4) /* (AD28) EXT_REFCLK1.MCAN1_RX */
|
||||
J721S2_IOPAD(0x06c, PIN_OUTPUT, 0) /* (V26) MCAN1_TX */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mcan13_pins_default: main-mcan13-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x0ec, PIN_INPUT, 9) /* (AG25) TIMER_IO1.MCAN13_RX */
|
||||
J721S2_IOPAD(0x00c, PIN_OUTPUT, 0) /* (AE28) MCAN13_TX */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mcan16_pins_default: main-mcan16-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */
|
||||
J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main-mmc1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
|
||||
J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
|
||||
J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
|
||||
J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
|
||||
J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
|
||||
J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
|
||||
J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
|
||||
J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_spi6_pins_default: main-spi6-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x030, PIN_INPUT, 8) /* (T26) GPIO0_12.SPI6_CLK */
|
||||
J721S2_IOPAD(0x080, PIN_INPUT, 8) /* (U26) MCASP0_AXR4.SPI6_CS2 */
|
||||
J721S2_IOPAD(0x0c4, PIN_OUTPUT, 8) /* (AB26) ECAP0_IN_APWM_OUT.SPI6_D0 */
|
||||
J721S2_IOPAD(0x074, PIN_INPUT, 8) /* (R28) MCAN2_TX.SPI6_D1 */
|
||||
J721S2_IOPAD(0x0dc, PIN_OUTPUT, 7) /* (AH26) SPI0_D1.GPIO0_55 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_uart1_pins_default: main-uart1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x05c, PIN_INPUT, 11) /* (AA26) MCASP2_AXR0.UART1_CTSn */
|
||||
J721S2_IOPAD(0x060, PIN_OUTPUT, 11) /* (AC27) MCASP2_AXR1.UART1_RTSn */
|
||||
J721S2_IOPAD(0x054, PIN_INPUT, 11) /* (Y27) MCASP2_ACLKX.UART1_RXD */
|
||||
J721S2_IOPAD(0x058, PIN_OUTPUT, 11) /* (AA27) MCASP2_AFSX.UART1_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
main_uart2_pins_default: main-uart2-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x0d8, PIN_INPUT, 11) /* (AG26) SPI0_D0.UART2_RXD */
|
||||
J721S2_IOPAD(0x068, PIN_OUTPUT, 11) /* (U28) MCAN0_RX.UART2_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
main_uart8_pins_default: main-uart8-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
|
||||
J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_pmx1 {
|
||||
mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */
|
||||
J721S2_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */
|
||||
J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */
|
||||
J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */
|
||||
J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */
|
||||
J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_pmx2 {
|
||||
mcu_cpsw_pins_default: mcu-cpsw-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
|
||||
J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
|
||||
J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
|
||||
J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
|
||||
J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
|
||||
J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
|
||||
J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
|
||||
J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
|
||||
J721S2_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
|
||||
J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
|
||||
J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
|
||||
J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
|
||||
>;
|
||||
};
|
||||
|
||||
mcu_i2c1_pins_default: mcu-i2c1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x078, PIN_INPUT_PULLUP, 0) /* (F24) WKUP_GPIO0_8.MCU_I2C1_SCL */
|
||||
J721S2_WKUP_IOPAD(0x07c, PIN_INPUT_PULLUP, 0) /* (H26) WKUP_GPIO0_9.MCU_I2C1_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
mcu_mcan0_pins_default: mcu-mcan0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */
|
||||
J721S2_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */
|
||||
>;
|
||||
};
|
||||
|
||||
mcu_mdio_pins_default: mcu-mdio-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
|
||||
J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
|
||||
>;
|
||||
};
|
||||
|
||||
mcu_spi0_pins_default: mcu-spi0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x038, PIN_INPUT, 0) /* (B27) MCU_SPI0_CLK */
|
||||
J721S2_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (B26) MCU_SPI0_CS0 */
|
||||
J721S2_WKUP_IOPAD(0x068, PIN_INPUT, 2) /* (C23) WKUP_GPIO0_4.MCU_SPI0_CS3 */
|
||||
J721S2_WKUP_IOPAD(0x03c, PIN_INPUT, 0) /* (D24) MCU_SPI0_D0 */
|
||||
J721S2_WKUP_IOPAD(0x040, PIN_INPUT, 0) /* (B25) MCU_SPI0_D1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcu_uart0_pins_default: mcu-uart0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B24) WKUP_GPIO0_14.MCU_UART0_CTSn */
|
||||
J721S2_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (D25) WKUP_GPIO0_15.MCU_UART0_RTSn */
|
||||
J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */
|
||||
J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
wkup_uart0_pins_default: wkup-uart0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */
|
||||
J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&cpsw_port1 {
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&phy0>;
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_mdio_pins_default>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c_som_rtc {
|
||||
trickle-resistor-ohms = <3000>;
|
||||
};
|
||||
|
||||
&main_i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c2_pins_default>;
|
||||
status = "okay";
|
||||
|
||||
exp1: gpio@20 {
|
||||
compatible = "nxp,pca9672";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-line-names = "HALF/nFULL_EN", "RS485/nRS232_EN", "MCU_ETH_nRESET", "",
|
||||
"PCIe_nRESET", "USB2.0-Hub_nRESET", "USB3.0-Hub_nRESET", "PEB_AV_BL_EN";
|
||||
interrupt-parent = <&main_gpio0>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
exp2: gpio@22 {
|
||||
compatible = "ti,tca6424";
|
||||
reg = <0x22>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-line-names = "RPI_GPIO4", "RPI_GPIO5", "RPI_GPIO6", "RPI_GPIO19",
|
||||
"RPI_GPIO20", "RPI_GPIO21", "RPI_GPIO22", "RPI_GPIO23",
|
||||
"RPI_GPIO24", "RPI_GPIO25", "RPI_GPIO26", "RPI_GPIO20",
|
||||
"LVDS_BL_nEN", "LVDS_REG_nEN", "CSI_CAM0_nRESET", "CSI_CAM1_nRESET",
|
||||
"CSI0_CTRL1", "CSI0_CTRL2", "CSI0_CTRL3", "CSI0_CTRL4",
|
||||
"CSI1_CTRL1", "CSI1_CTRL2", "CSI1_CTRL3", "CSI1_CTRL4";
|
||||
interrupt-parent = <&main_gpio0>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_gpio0_ioexp_intr_pins_default>;
|
||||
};
|
||||
};
|
||||
|
||||
/* CSI0 + RPI */
|
||||
&main_i2c4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c4_pins_default>;
|
||||
};
|
||||
|
||||
/* CSI1 + PCIe */
|
||||
&main_i2c5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c5_pins_default>;
|
||||
};
|
||||
|
||||
&main_mcan1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mcan1_pins_default>;
|
||||
phys = <&transceiver1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_mcan13 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mcan13_pins_default>;
|
||||
phys = <&transceiver2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_mcan16 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mcan16_pins_default>;
|
||||
phys = <&transceiver3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* SD-Card */
|
||||
&main_sdhci1 {
|
||||
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||
pinctrl-names = "default";
|
||||
disable-wp;
|
||||
vmmc-supply = <&vcc_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_spi6 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_spi6_pins_default>;
|
||||
cs-gpios = <&main_gpio0 55 GPIO_ACTIVE_LOW>;
|
||||
ti,spi-num-cs = <1>;
|
||||
ti,pindir-d0-out-d1-in;
|
||||
status = "okay";
|
||||
|
||||
tpm@0 {
|
||||
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart1_pins_default>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart2_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_uart8 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart8_pins_default>;
|
||||
/* Shared with TFA on this platform */
|
||||
power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_cpsw {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_cpsw_pins_default>;
|
||||
};
|
||||
|
||||
&mcu_i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_i2c1_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_mcan0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_mcan0_pins_default>;
|
||||
phys = <&transceiver4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* RPI-Header */
|
||||
&mcu_spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_spi0_pins_default>;
|
||||
};
|
||||
|
||||
/* RPI-Header */
|
||||
&mcu_uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_uart0_pins_default>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ospi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-max-frequency = <40000000>;
|
||||
cdns,tshsl-ns = <60>;
|
||||
cdns,tsd2d-ns = <60>;
|
||||
cdns,tchsh-ns = <60>;
|
||||
cdns,tslch-ns = <60>;
|
||||
cdns,read-delay = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie1_rc {
|
||||
num-lanes = <1>;
|
||||
phys = <&serdes0_pcie_link>;
|
||||
phy-names = "pcie-phy";
|
||||
reset-gpios = <&exp1 4 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&serdes_ln_ctrl {
|
||||
idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>,
|
||||
<J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>;
|
||||
};
|
||||
|
||||
&serdes_refclk {
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
&serdes0 {
|
||||
status = "okay";
|
||||
|
||||
serdes0_pcie_link: phy@0 {
|
||||
reg = <0>;
|
||||
cdns,num-lanes = <1>;
|
||||
#phy-cells = <0>;
|
||||
resets = <&serdes_wiz0 1>;
|
||||
cdns,phy-type = <PHY_TYPE_PCIE>;
|
||||
};
|
||||
|
||||
serdes0_usb_link: phy@1 {
|
||||
reg = <1>;
|
||||
cdns,num-lanes = <1>;
|
||||
#phy-cells = <0>;
|
||||
resets = <&serdes_wiz0 2>;
|
||||
cdns,phy-type = <PHY_TYPE_USB3>;
|
||||
};
|
||||
};
|
||||
|
||||
&tscadc0 {
|
||||
status = "okay";
|
||||
|
||||
adc {
|
||||
ti,adc-channels = <0 1 2 3 4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
||||
&tscadc1 {
|
||||
status = "okay";
|
||||
|
||||
adc {
|
||||
ti,adc-channels = <3 4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
ti,vbus-divider;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "host";
|
||||
phys = <&serdes0_usb_link>;
|
||||
phy-names = "cdns3,usb3-phy";
|
||||
};
|
||||
|
||||
&usb_serdes_mux {
|
||||
idle-states = <1>; /* USB0 to SERDES lane 1 */
|
||||
};
|
||||
|
||||
&wkup_i2c0 {
|
||||
eeprom@57 {
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x57>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
|
||||
led-controller@62 {
|
||||
compatible = "nxp,pca9533";
|
||||
reg = <0x62>;
|
||||
|
||||
led-1 {
|
||||
label = "user-led1";
|
||||
type = <PCA9532_TYPE_LED>;
|
||||
};
|
||||
|
||||
led-2 {
|
||||
label = "user-led2";
|
||||
type = <PCA9532_TYPE_LED>;
|
||||
};
|
||||
|
||||
led-3 {
|
||||
label = "user-led3";
|
||||
type = <PCA9532_TYPE_LED>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Shared with TIFS */
|
||||
&wkup_uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wkup_uart0_pins_default>;
|
||||
bootph-all;
|
||||
status = "reserved";
|
||||
};
|
||||
601
arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
Normal file
601
arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
Normal file
|
|
@ -0,0 +1,601 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/*
|
||||
* Copyright (C) 2025 PHYTEC Messtechnik GmbH
|
||||
* Author: Dominik Haller <d.haller@phytec.de>
|
||||
*
|
||||
* https://www.phytec.eu/en/produkte/system-on-modules/phycore-am68x-tda4x/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
#include "k3-j721s2.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "phytec,am68-phycore-som", "ti,j721s2";
|
||||
model = "PHYTEC phyCORE-AM68x";
|
||||
|
||||
aliases {
|
||||
ethernet1 = &main_cpsw_port1;
|
||||
mmc0 = &main_sdhci0;
|
||||
rtc0 = &i2c_som_rtc;
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
/* 4GB RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
|
||||
<0x00000008 0x80000000 0x00000000 0x80000000>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
reserved_memory: reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
/* global cma region */
|
||||
linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x00 0x20000000>;
|
||||
linux,cma-default;
|
||||
};
|
||||
|
||||
secure_ddr: optee@9e800000 {
|
||||
reg = <0x00 0x9e800000 0x00 0x01800000>;
|
||||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa0000000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa0100000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa1000000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa1100000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa2000000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa2100000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa3000000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa3100000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa4000000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa4100000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa5000000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa5100000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
c71_0_dma_memory_region: c71-dma-memory@a6000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa6000000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
c71_0_memory_region: c71-memory@a6100000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa6100000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
c71_1_dma_memory_region: c71-dma-memory@a7000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa7000000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
c71_1_memory_region: c71-memory@a7100000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa7100000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
rtos_ipc_memory_region: ipc-memories@a8000000 {
|
||||
reg = <0x00 0xa8000000 0x00 0x01c00000>;
|
||||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_sd_dv: regulator-sd {
|
||||
/* Output of TLV71033 */
|
||||
compatible = "regulator-gpio";
|
||||
regulator-name = "VDD_SD_DV";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vdd_sd_dv_pins_default>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
gpios = <&main_gpio0 1 GPIO_ACTIVE_HIGH>;
|
||||
states = <3300000 0x0>,
|
||||
<1800000 0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
main_cpsw_mdio_pins_default: main-cpsw-mdio-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x0c0, PIN_OUTPUT, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */
|
||||
J721S2_IOPAD(0x0bc, PIN_INPUT, 6) /* (V28) MCASP1_AFSX.MDIO0_MDIO */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c0_pins_default: main-i2c0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
|
||||
J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
rgmii1_pins_default: rgmii1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x0b8, PIN_INPUT, 6) /* (AA24) MCASP1_ACLKX.RGMII1_RD0 */
|
||||
J721S2_IOPAD(0x0a0, PIN_INPUT, 6) /* (AB25) MCASP0_AXR12.RGMII1_RD1 */
|
||||
J721S2_IOPAD(0x0a4, PIN_INPUT, 6) /* (T23) MCASP0_AXR13.RGMII1_RD2 */
|
||||
J721S2_IOPAD(0x0a8, PIN_INPUT, 6) /* (U24) MCASP0_AXR14.RGMII1_RD3 */
|
||||
J721S2_IOPAD(0x0b0, PIN_INPUT, 6) /* (AD26) MCASP1_AXR3.RGMII1_RXC */
|
||||
J721S2_IOPAD(0x0ac, PIN_INPUT, 6) /* (AC25) MCASP0_AXR15.RGMII1_RX_CTL */
|
||||
J721S2_IOPAD(0x08c, PIN_OUTPUT, 6) /* (T25) MCASP0_AXR7.RGMII1_TD0 */
|
||||
J721S2_IOPAD(0x090, PIN_OUTPUT, 6) /* (W24) MCASP0_AXR8.RGMII1_TD1 */
|
||||
J721S2_IOPAD(0x094, PIN_OUTPUT, 6) /* (AA25) MCASP0_AXR9.RGMII1_TD2 */
|
||||
J721S2_IOPAD(0x098, PIN_OUTPUT, 6) /* (V25) MCASP0_AXR10.RGMII1_TD3 */
|
||||
J721S2_IOPAD(0x0b4, PIN_OUTPUT, 6) /* (U25) MCASP1_AXR4.RGMII1_TXC */
|
||||
J721S2_IOPAD(0x09c, PIN_OUTPUT, 6) /* (T24) MCASP0_AXR11.RGMII1_TX_CTL */
|
||||
>;
|
||||
};
|
||||
|
||||
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_IOPAD(0x004, PIN_OUTPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_pmx0 {
|
||||
mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */
|
||||
J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */
|
||||
J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */
|
||||
J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
|
||||
J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */
|
||||
J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (F18) MCU_OSPI0_D3 */
|
||||
J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (E19) MCU_OSPI0_D4 */
|
||||
J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (G19) MCU_OSPI0_D5 */
|
||||
J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (F19) MCU_OSPI0_D6 */
|
||||
J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (F20) MCU_OSPI0_D7 */
|
||||
J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_pmx1 {
|
||||
pmic_irq_pins_default: pmic-irq-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 7) /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_pmx2 {
|
||||
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x098, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SCL */
|
||||
J721S2_WKUP_IOPAD(0x09c, PIN_INPUT_PULLUP, 0) /* (H27) WKUP_I2C0_SDA */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&c71_0 {
|
||||
mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
|
||||
memory-region = <&c71_0_dma_memory_region>,
|
||||
<&c71_0_memory_region>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&c71_1 {
|
||||
mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
|
||||
memory-region = <&c71_1_dma_memory_region>,
|
||||
<&c71_1_memory_region>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mailbox0_cluster0 {
|
||||
interrupts = <436>;
|
||||
status = "okay";
|
||||
|
||||
mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
|
||||
mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
|
||||
ti,mbox-rx = <2 0 0>;
|
||||
ti,mbox-tx = <3 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox0_cluster1 {
|
||||
interrupts = <432>;
|
||||
status = "okay";
|
||||
|
||||
mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
|
||||
mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
|
||||
ti,mbox-rx = <2 0 0>;
|
||||
ti,mbox-tx = <3 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox0_cluster2 {
|
||||
interrupts = <428>;
|
||||
status = "okay";
|
||||
|
||||
mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
|
||||
mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
|
||||
ti,mbox-rx = <2 0 0>;
|
||||
ti,mbox-tx = <3 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox0_cluster4 {
|
||||
interrupts = <420>;
|
||||
status = "okay";
|
||||
|
||||
mbox_c71_0: mbox-c71-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
|
||||
mbox_c71_1: mbox-c71-1 {
|
||||
ti,mbox-rx = <2 0 0>;
|
||||
ti,mbox-tx = <3 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_cpsw {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmii1_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_cpsw_mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_cpsw_mdio_pins_default>;
|
||||
status = "okay";
|
||||
|
||||
phy1: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_cpsw_port1 {
|
||||
phy-handle = <&phy1>;
|
||||
phy-mode = "rgmii-rxid";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c0_pins_default>;
|
||||
|
||||
temperature-sensor@48 {
|
||||
compatible = "ti,tmp102";
|
||||
reg = <0x48>;
|
||||
};
|
||||
|
||||
temperature-sensor@49 {
|
||||
compatible = "ti,tmp102";
|
||||
reg = <0x49>;
|
||||
};
|
||||
|
||||
i2c_som_rtc: rtc@52 {
|
||||
compatible = "microcrystal,rv3028";
|
||||
reg = <0x52>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
|
||||
memory-region = <&main_r5fss0_core0_dma_memory_region>,
|
||||
<&main_r5fss0_core0_memory_region>;
|
||||
};
|
||||
|
||||
&main_r5fss0_core1 {
|
||||
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
|
||||
memory-region = <&main_r5fss0_core1_dma_memory_region>,
|
||||
<&main_r5fss0_core1_memory_region>;
|
||||
};
|
||||
|
||||
&main_r5fss1_core0 {
|
||||
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
|
||||
memory-region = <&main_r5fss1_core0_dma_memory_region>,
|
||||
<&main_r5fss1_core0_memory_region>;
|
||||
};
|
||||
|
||||
&main_r5fss1_core1 {
|
||||
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
|
||||
memory-region = <&main_r5fss1_core1_dma_memory_region>,
|
||||
<&main_r5fss1_core1_memory_region>;
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&main_sdhci0 {
|
||||
non-removable;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* SD card */
|
||||
&main_sdhci1 {
|
||||
vqmmc-supply = <&vdd_sd_dv>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_r5fss0 {
|
||||
ti,cluster-mode = <0>;
|
||||
};
|
||||
|
||||
&main_r5fss1 {
|
||||
ti,cluster-mode = <0>;
|
||||
};
|
||||
|
||||
/* Timers are used by Remoteproc firmware */
|
||||
&main_timer0 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_timer1 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_timer2 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_timer3 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_timer4 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_timer5 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&mcu_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
|
||||
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
|
||||
<&mcu_r5fss0_core0_memory_region>;
|
||||
};
|
||||
|
||||
&mcu_r5fss0_core1 {
|
||||
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
|
||||
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
|
||||
<&mcu_r5fss0_core1_memory_region>;
|
||||
};
|
||||
|
||||
&ospi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
|
||||
status = "okay";
|
||||
|
||||
serial_flash: flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
spi-tx-bus-width = <8>;
|
||||
spi-rx-bus-width = <8>;
|
||||
spi-max-frequency = <25000000>;
|
||||
cdns,tshsl-ns = <60>;
|
||||
cdns,tsd2d-ns = <60>;
|
||||
cdns,tchsh-ns = <60>;
|
||||
cdns,tslch-ns = <60>;
|
||||
cdns,read-delay = <2>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_gpio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wkup_i2c0_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
|
||||
vdd_cpu_avs: regulator@40 {
|
||||
compatible = "ti,tps62873";
|
||||
reg = <0x40>;
|
||||
regulator-name = "VDD_CPU_AVS";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
pmic@48 {
|
||||
compatible = "ti,tps6594-q1";
|
||||
reg = <0x48>;
|
||||
system-power-controller;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_irq_pins_default>;
|
||||
interrupt-parent = <&wkup_gpio0>;
|
||||
interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
buck12-supply = <&vcc_3v3>;
|
||||
buck3-supply = <&vcc_3v3>;
|
||||
buck4-supply = <&vcc_3v3>;
|
||||
buck5-supply = <&vcc_3v3>;
|
||||
ldo1-supply = <&vcc_3v3>;
|
||||
ldo2-supply = <&vcc_3v3>;
|
||||
ldo3-supply = <&vcc_3v3>;
|
||||
ldo4-supply = <&vcc_3v3>;
|
||||
ti,primary-pmic;
|
||||
|
||||
regulators {
|
||||
bucka12: buck12 {
|
||||
regulator-name = "VDD_DDR_1V1";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
bucka3: buck3 {
|
||||
regulator-name = "VDD_RAM_0V85";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
bucka4: buck4 {
|
||||
regulator-name = "VDD_IO_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
bucka5: buck5 {
|
||||
regulator-name = "VDD_MCU_0V85";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
ldoa1: ldo1 {
|
||||
regulator-name = "VDD_MCUIO_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
ldoa2: ldo2 {
|
||||
regulator-name = "VDD_MCUIO_3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
ldoa3: ldo3 {
|
||||
regulator-name = "VDDA_DLL_0V8";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
ldoa4: ldo4 {
|
||||
regulator-name = "VDDA_MCU_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x50>;
|
||||
pagesize = <32>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
som_eeprom_opt: eeprom@51 {
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x51>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
};
|
||||
|
|
@ -48,6 +48,6 @@ pcie1_ep: pcie-ep@2910000 {
|
|||
dma-coherent;
|
||||
phys = <&serdes0_pcie_link>;
|
||||
phy-names = "pcie-phy";
|
||||
ti,syscon-pcie-ctrl = <&scm_conf 0x074>;
|
||||
ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -44,6 +44,17 @@ vusb_main: regulator-vusb-main5v0 {
|
|||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vsys_5v0: regulator-vsys5v0 {
|
||||
/* Output of LM61460 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vsys_5v0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vusb_main>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vsys_3v3: regulator-vsys3v3 {
|
||||
/* Output of LM5141 */
|
||||
compatible = "regulator-fixed";
|
||||
|
|
@ -76,7 +87,7 @@ vdd_sd_dv: regulator-tlv71033 {
|
|||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vsys_3v3>;
|
||||
vin-supply = <&vsys_5v0>;
|
||||
gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>;
|
||||
states = <1800000 0x0>,
|
||||
<3300000 0x1>;
|
||||
|
|
|
|||
|
|
@ -940,7 +940,6 @@ &main_sdhci0 {
|
|||
status = "okay";
|
||||
non-removable;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
};
|
||||
|
||||
&main_sdhci1 {
|
||||
|
|
|
|||
|
|
@ -48,6 +48,6 @@ pcie1_ep: pcie-ep@2910000 {
|
|||
dma-coherent;
|
||||
phys = <&serdes0_pcie_link>;
|
||||
phy-names = "pcie-phy";
|
||||
ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
|
||||
ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -32,6 +32,11 @@ scm_conf: scm-conf@100000 {
|
|||
#size-cells = <1>;
|
||||
ranges = <0x00 0x00 0x00100000 0x1c000>;
|
||||
|
||||
pcie1_ctrl: pcie-ctrl@4074 {
|
||||
compatible = "ti,j784s4-pcie-ctrl", "syscon";
|
||||
reg = <0x4074 0x4>;
|
||||
};
|
||||
|
||||
serdes_ln_ctrl: mux-controller@4080 {
|
||||
compatible = "reg-mux";
|
||||
reg = <0x4080 0x20>;
|
||||
|
|
@ -759,12 +764,12 @@ pcie1_rc: pcie@2910000 {
|
|||
reg = <0x00 0x02910000 0x00 0x1000>,
|
||||
<0x00 0x02917000 0x00 0x400>,
|
||||
<0x00 0x0d800000 0x00 0x00800000>,
|
||||
<0x00 0x18000000 0x00 0x00001000>;
|
||||
<0x41 0x00000000 0x00 0x00001000>; /* ECAM (4 KB) */
|
||||
reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
|
||||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
|
||||
device_type = "pci";
|
||||
ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
|
||||
ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
|
||||
max-link-speed = <3>;
|
||||
num-lanes = <4>;
|
||||
power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
|
@ -778,8 +783,8 @@ pcie1_rc: pcie@2910000 {
|
|||
device-id = <0xb00f>;
|
||||
msi-map = <0x0 &gic_its 0x0 0x10000>;
|
||||
dma-coherent;
|
||||
ranges = <0x01000000 0x0 0x18001000 0x00 0x18001000 0x0 0x0010000>,
|
||||
<0x02000000 0x0 0x18011000 0x00 0x18011000 0x0 0x7fef000>;
|
||||
ranges = <0x01000000 0x00 0x00001000 0x41 0x00001000 0x00 0x00100000>, /* IO (1 MB) */
|
||||
<0x02000000 0x00 0x00101000 0x41 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */
|
||||
dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -15,12 +15,11 @@
|
|||
#include "k3-pinctrl.h"
|
||||
|
||||
&{/} {
|
||||
hdmi-connector {
|
||||
connector-hdmi {
|
||||
compatible = "hdmi-connector";
|
||||
label = "hdmi";
|
||||
type = "a";
|
||||
ddc-i2c-bus = <&main_i2c1>;
|
||||
digital;
|
||||
/* P12 - HDMI_HPD */
|
||||
hpd-gpios = <&exp6 10 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
|
|
@ -31,28 +30,32 @@ hdmi_connector_in: endpoint {
|
|||
};
|
||||
};
|
||||
|
||||
dvi-bridge {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
bridge-dvi {
|
||||
compatible = "ti,tfp410";
|
||||
/* P10 - HDMI_PDn */
|
||||
powerdown-gpios = <&exp6 8 GPIO_ACTIVE_LOW>;
|
||||
ti,deskew = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tfp410_in: endpoint {
|
||||
remote-endpoint = <&dpi_out0>;
|
||||
pclk-sample = <1>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
tfp410_in: endpoint {
|
||||
remote-endpoint = <&dpi_out0>;
|
||||
pclk-sample = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
tfp410_out: endpoint {
|
||||
remote-endpoint =
|
||||
<&hdmi_connector_in>;
|
||||
tfp410_out: endpoint {
|
||||
remote-endpoint =
|
||||
<&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -148,17 +151,23 @@ p11-hog {
|
|||
&dss {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dss_vout0_pins_default>;
|
||||
};
|
||||
|
||||
&dss_ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
dpi0_out: endpoint {
|
||||
remote-endpoint = <&dp0_in>;
|
||||
};
|
||||
};
|
||||
|
||||
dpi_out0: endpoint {
|
||||
remote-endpoint = <&tfp410_in>;
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
dpi_out0: endpoint {
|
||||
remote-endpoint = <&tfp410_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -573,6 +573,7 @@ &usb1 {
|
|||
&ospi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
|
|
@ -804,7 +805,11 @@ &dss {
|
|||
};
|
||||
|
||||
&dss_ports {
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
dpi0_out: endpoint {
|
||||
remote-endpoint = <&dp0_in>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@ pcie0_ep: pcie-ep@2900000 {
|
|||
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
|
||||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
|
||||
ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
|
||||
ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
|
||||
max-link-speed = <3>;
|
||||
num-lanes = <1>;
|
||||
power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
|
|
|||
|
|
@ -48,6 +48,6 @@ pcie1_ep: pcie-ep@2910000 {
|
|||
dma-coherent;
|
||||
phys = <&serdes1_pcie_link>;
|
||||
phy-names = "pcie-phy";
|
||||
ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
|
||||
ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -44,6 +44,26 @@ scm_conf: scm-conf@100000 {
|
|||
#size-cells = <1>;
|
||||
ranges = <0x0 0x0 0x00100000 0x1c000>;
|
||||
|
||||
pcie0_ctrl: pcie-ctrl@4070 {
|
||||
compatible = "ti,j784s4-pcie-ctrl", "syscon";
|
||||
reg = <0x4070 0x4>;
|
||||
};
|
||||
|
||||
pcie1_ctrl: pcie-ctrl@4074 {
|
||||
compatible = "ti,j784s4-pcie-ctrl", "syscon";
|
||||
reg = <0x4074 0x4>;
|
||||
};
|
||||
|
||||
pcie2_ctrl: pcie-ctrl@4078 {
|
||||
compatible = "ti,j784s4-pcie-ctrl", "syscon";
|
||||
reg = <0x4078 0x4>;
|
||||
};
|
||||
|
||||
pcie3_ctrl: pcie-ctrl@407c {
|
||||
compatible = "ti,j784s4-pcie-ctrl", "syscon";
|
||||
reg = <0x407c 0x4>;
|
||||
};
|
||||
|
||||
serdes_ln_ctrl: mux-controller@4080 {
|
||||
compatible = "reg-mux";
|
||||
reg = <0x4080 0x50>;
|
||||
|
|
@ -941,12 +961,12 @@ pcie0_rc: pcie@2900000 {
|
|||
reg = <0x00 0x02900000 0x00 0x1000>,
|
||||
<0x00 0x02907000 0x00 0x400>,
|
||||
<0x00 0x0d000000 0x00 0x00800000>,
|
||||
<0x00 0x10000000 0x00 0x00001000>;
|
||||
<0x40 0x00000000 0x00 0x00001000>; /* ECAM (4 KB) */
|
||||
reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
|
||||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
|
||||
device_type = "pci";
|
||||
ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
|
||||
ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
|
||||
max-link-speed = <3>;
|
||||
num-lanes = <2>;
|
||||
power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
|
@ -959,8 +979,8 @@ pcie0_rc: pcie@2900000 {
|
|||
device-id = <0xb00d>;
|
||||
msi-map = <0x0 &gic_its 0x0 0x10000>;
|
||||
dma-coherent;
|
||||
ranges = <0x01000000 0x0 0x10001000 0x0 0x10001000 0x0 0x0010000>,
|
||||
<0x02000000 0x0 0x10011000 0x0 0x10011000 0x0 0x7fef000>;
|
||||
ranges = <0x01000000 0x00 0x00001000 0x40 0x00001000 0x00 0x00100000>, /* IO (1 MB) */
|
||||
<0x02000000 0x00 0x00101000 0x40 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */
|
||||
dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -970,12 +990,12 @@ pcie1_rc: pcie@2910000 {
|
|||
reg = <0x00 0x02910000 0x00 0x1000>,
|
||||
<0x00 0x02917000 0x00 0x400>,
|
||||
<0x00 0x0d800000 0x00 0x00800000>,
|
||||
<0x00 0x18000000 0x00 0x00001000>;
|
||||
<0x41 0x00000000 0x00 0x00001000>; /* ECAM (4 KB) */
|
||||
reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
|
||||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
|
||||
device_type = "pci";
|
||||
ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
|
||||
ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
|
||||
max-link-speed = <3>;
|
||||
num-lanes = <2>;
|
||||
power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
|
@ -988,8 +1008,8 @@ pcie1_rc: pcie@2910000 {
|
|||
device-id = <0xb00d>;
|
||||
msi-map = <0x0 &gic_its 0x10000 0x10000>;
|
||||
dma-coherent;
|
||||
ranges = <0x01000000 0x0 0x18001000 0x0 0x18001000 0x0 0x0010000>,
|
||||
<0x02000000 0x0 0x18011000 0x0 0x18011000 0x0 0x7fef000>;
|
||||
ranges = <0x01000000 0x00 0x00001000 0x41 0x00001000 0x00 0x00100000>, /* IO (1 MB) */
|
||||
<0x02000000 0x00 0x00101000 0x41 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */
|
||||
dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -1004,7 +1024,7 @@ pcie2_rc: pcie@2920000 {
|
|||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>;
|
||||
device_type = "pci";
|
||||
ti,syscon-pcie-ctrl = <&scm_conf 0x4078>;
|
||||
ti,syscon-pcie-ctrl = <&pcie2_ctrl 0x0>;
|
||||
max-link-speed = <3>;
|
||||
num-lanes = <2>;
|
||||
power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
|
@ -1033,7 +1053,7 @@ pcie3_rc: pcie@2930000 {
|
|||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>;
|
||||
device_type = "pci";
|
||||
ti,syscon-pcie-ctrl = <&scm_conf 0x407c>;
|
||||
ti,syscon-pcie-ctrl = <&pcie3_ctrl 0x0>;
|
||||
max-link-speed = <3>;
|
||||
num-lanes = <2>;
|
||||
power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
|
|
|||
|
|
@ -19,6 +19,33 @@ clk_imx219_fixed: imx219-xclk {
|
|||
#clock-cells = <0>;
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
reg_2p8v: regulator-2p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "2P8V";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
vin-supply = <&vdd_sd_dv>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vdd_sd_dv>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p2v: regulator-1p2v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P2V";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
vin-supply = <&vdd_sd_dv>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&csi_mux {
|
||||
|
|
@ -34,7 +61,9 @@ imx219_0: imx219-0@10 {
|
|||
reg = <0x10>;
|
||||
|
||||
clocks = <&clk_imx219_fixed>;
|
||||
clock-names = "xclk";
|
||||
VANA-supply = <®_2p8v>;
|
||||
VDIG-supply = <®_1p8v>;
|
||||
VDDL-supply = <®_1p2v>;
|
||||
|
||||
port {
|
||||
csi2_cam0: endpoint {
|
||||
|
|
@ -56,7 +85,9 @@ imx219_1: imx219-1@10 {
|
|||
reg = <0x10>;
|
||||
|
||||
clocks = <&clk_imx219_fixed>;
|
||||
clock-names = "xclk";
|
||||
VANA-supply = <®_2p8v>;
|
||||
VDIG-supply = <®_1p8v>;
|
||||
VDDL-supply = <®_1p2v>;
|
||||
|
||||
port {
|
||||
csi2_cam1: endpoint {
|
||||
|
|
|
|||
|
|
@ -184,6 +184,17 @@ vsys_3v3: fixedregulator-vsys3v3 {
|
|||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vsys_5v0: fixedregulator-vsys5v0 {
|
||||
/* Output of LM61460 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vsys_5v0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vusb_main>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_mmc1: fixedregulator-sd {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -211,6 +222,20 @@ vdd_sd_dv_alt: gpio-regulator-tps659411 {
|
|||
<3300000 0x1>;
|
||||
};
|
||||
|
||||
vdd_sd_dv: gpio-regulator-TLV71033 {
|
||||
compatible = "regulator-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vdd_sd_dv_pins_default>;
|
||||
regulator-name = "tlv71033";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vsys_5v0>;
|
||||
gpios = <&main_gpio0 118 GPIO_ACTIVE_HIGH>;
|
||||
states = <1800000 0x0>,
|
||||
<3300000 0x1>;
|
||||
};
|
||||
|
||||
transceiver1: can-phy1 {
|
||||
compatible = "ti,tcan1042";
|
||||
#phy-cells = <0>;
|
||||
|
|
@ -613,6 +638,12 @@ J721E_WKUP_IOPAD(0xd4, PIN_OUTPUT, 7) /* (G26) WKUP_GPIO0_9 */
|
|||
>;
|
||||
};
|
||||
|
||||
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721E_IOPAD(0x1dc, PIN_OUTPUT, 7) /* (Y1) SPI1_CLK.GPIO0_118 */
|
||||
>;
|
||||
};
|
||||
|
||||
wkup_uart0_pins_default: wkup-uart0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
|
||||
|
|
|
|||
|
|
@ -126,6 +126,8 @@ cbass_main: bus@100000 {
|
|||
<0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
|
||||
<0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71 */
|
||||
<0x00 0x6f000000 0x00 0x6f000000 0x00 0x00310000>, /* A72 PERIPHBASE */
|
||||
<0x40 0x00000000 0x40 0x00000000 0x01 0x00000000>, /* PCIe0 DAT1 */
|
||||
<0x41 0x00000000 0x41 0x00000000 0x01 0x00000000>, /* PCIe1 DAT1 */
|
||||
<0x44 0x00000000 0x44 0x00000000 0x00 0x08000000>, /* PCIe2 DAT */
|
||||
<0x44 0x10000000 0x44 0x10000000 0x00 0x08000000>, /* PCIe3 DAT */
|
||||
<0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@ pcie1_ep: pcie-ep@2910000 {
|
|||
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
|
||||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
|
||||
ti,syscon-pcie-ctrl = <&scm_conf 0x074>;
|
||||
ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
|
||||
max-link-speed = <3>;
|
||||
num-lanes = <1>;
|
||||
power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
|
|
|||
|
|
@ -57,6 +57,11 @@ phy_gmii_sel_cpsw: phy@34 {
|
|||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
pcie1_ctrl: pcie-ctrl@74 {
|
||||
compatible = "ti,j784s4-pcie-ctrl", "syscon";
|
||||
reg = <0x74 0x4>;
|
||||
};
|
||||
|
||||
serdes_ln_ctrl: mux-controller@80 {
|
||||
compatible = "reg-mux";
|
||||
reg = <0x80 0x10>;
|
||||
|
|
@ -1394,12 +1399,12 @@ pcie1_rc: pcie@2910000 {
|
|||
reg = <0x00 0x02910000 0x00 0x1000>,
|
||||
<0x00 0x02917000 0x00 0x400>,
|
||||
<0x00 0x0d800000 0x00 0x800000>,
|
||||
<0x00 0x18000000 0x00 0x1000>;
|
||||
<0x41 0x00000000 0x00 0x1000>; /* ECAM (4 KB) */
|
||||
reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
|
||||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
|
||||
device_type = "pci";
|
||||
ti,syscon-pcie-ctrl = <&scm_conf 0x074>;
|
||||
ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
|
||||
max-link-speed = <3>;
|
||||
num-lanes = <4>;
|
||||
power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
|
@ -1412,8 +1417,8 @@ pcie1_rc: pcie@2910000 {
|
|||
device-id = <0xb013>;
|
||||
msi-map = <0x0 &gic_its 0x0 0x10000>;
|
||||
dma-coherent;
|
||||
ranges = <0x01000000 0x0 0x18001000 0x00 0x18001000 0x0 0x0010000>,
|
||||
<0x02000000 0x0 0x18011000 0x00 0x18011000 0x0 0x7fef000>;
|
||||
ranges = <0x01000000 0x00 0x00001000 0x41 0x00001000 0x00 0x00100000>, /* IO (1 MB) */
|
||||
<0x02000000 0x00 0x00101000 0x41 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */
|
||||
dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
|
|
@ -2048,4 +2053,18 @@ watchdog8: watchdog@23f0000 {
|
|||
/* reserved for MAIN_R5F1_1 */
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
gpu: gpu@4e20000000 {
|
||||
compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
|
||||
reg = <0x4e 0x20000000 0x00 0x80000>;
|
||||
clocks = <&k3_clks 130 1>;
|
||||
clock-names = "core";
|
||||
assigned-clocks = <&k3_clks 130 1>;
|
||||
assigned-clock-rates = <800000000>;
|
||||
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>,
|
||||
<&k3_pds 373 TI_SCI_PD_EXCLUSIVE>;
|
||||
power-domain-names = "a", "b";
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,329 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/*
|
||||
* DT Overlay for 4 x RPi Camera V2.1 on J722S-EVM board.
|
||||
*
|
||||
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*
|
||||
* Schematics: https://datasheets.raspberrypi.com/camera/camera-v2-schematics.pdf
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
&main_pmx0 {
|
||||
cam0_reset_pins_default: cam0-default-reset-pins {
|
||||
pinctrl-single,pins = <
|
||||
J722S_IOPAD(0x03c, PIN_OUTPUT, 7) /* (R22) GPIO0_15 */
|
||||
>;
|
||||
};
|
||||
|
||||
cam1_reset_pins_default: cam1-default-reset-pins {
|
||||
pinctrl-single,pins = <
|
||||
J722S_IOPAD(0x044, PIN_OUTPUT, 7) /* (R26) GPIO0_17 */
|
||||
>;
|
||||
};
|
||||
|
||||
cam2_reset_pins_default: cam2-default-reset-pins {
|
||||
pinctrl-single,pins = <
|
||||
J722S_IOPAD(0x04c, PIN_OUTPUT, 7) /* (T25) GPIO0_19 */
|
||||
>;
|
||||
};
|
||||
|
||||
cam3_reset_pins_default: cam3-default-reset-pins {
|
||||
pinctrl-single,pins = <
|
||||
J722S_IOPAD(0x054, PIN_OUTPUT, 7) /* (T21) GPIO0_21 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&{/} {
|
||||
clk_imx219_fixed: clock-24000000 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
reg_2p8v: regulator-2p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "2P8V";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
vin-supply = <&vsys_3v3_exp>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vsys_3v3_exp>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p2v: regulator-1p2v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P2V";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
vin-supply = <&vsys_3v3_exp>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&csi01_mux {
|
||||
idle-state = <1>;
|
||||
};
|
||||
|
||||
&csi23_mux {
|
||||
idle-state = <1>;
|
||||
};
|
||||
|
||||
&pca9543_0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* CAM0 I2C */
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
imx219_0: sensor@10 {
|
||||
compatible = "sony,imx219";
|
||||
reg = <0x10>;
|
||||
|
||||
clocks = <&clk_imx219_fixed>;
|
||||
|
||||
VANA-supply = <®_2p8v>;
|
||||
VDIG-supply = <®_1p8v>;
|
||||
VDDL-supply = <®_1p2v>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cam0_reset_pins_default>;
|
||||
|
||||
reset-gpios = <&main_gpio0 15 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
csi2_cam0: endpoint {
|
||||
remote-endpoint = <&csi2rx0_in_sensor>;
|
||||
link-frequencies = /bits/ 64 <456000000>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* CAM1 I2C */
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
imx219_1: sensor@10 {
|
||||
compatible = "sony,imx219";
|
||||
reg = <0x10>;
|
||||
|
||||
clocks = <&clk_imx219_fixed>;
|
||||
|
||||
VANA-supply = <®_2p8v>;
|
||||
VDIG-supply = <®_1p8v>;
|
||||
VDDL-supply = <®_1p2v>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cam1_reset_pins_default>;
|
||||
|
||||
reset-gpios = <&main_gpio0 17 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
csi2_cam1: endpoint {
|
||||
remote-endpoint = <&csi2rx1_in_sensor>;
|
||||
link-frequencies = /bits/ 64 <456000000>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pca9543_1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* CAM0 I2C */
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
imx219_2: sensor@10 {
|
||||
compatible = "sony,imx219";
|
||||
reg = <0x10>;
|
||||
|
||||
clocks = <&clk_imx219_fixed>;
|
||||
|
||||
VANA-supply = <®_2p8v>;
|
||||
VDIG-supply = <®_1p8v>;
|
||||
VDDL-supply = <®_1p2v>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cam2_reset_pins_default>;
|
||||
|
||||
reset-gpios = <&main_gpio0 19 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
csi2_cam2: endpoint {
|
||||
remote-endpoint = <&csi2rx2_in_sensor>;
|
||||
link-frequencies = /bits/ 64 <456000000>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* CAM1 I2C */
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
imx219_3: sensor@10 {
|
||||
compatible = "sony,imx219";
|
||||
reg = <0x10>;
|
||||
|
||||
clocks = <&clk_imx219_fixed>;
|
||||
|
||||
VANA-supply = <®_2p8v>;
|
||||
VDIG-supply = <®_1p8v>;
|
||||
VDDL-supply = <®_1p2v>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cam3_reset_pins_default>;
|
||||
|
||||
reset-gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
csi2_cam3: endpoint {
|
||||
remote-endpoint = <&csi2rx3_in_sensor>;
|
||||
link-frequencies = /bits/ 64 <456000000>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cdns_csi2rx0 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi0_port0: port@0 {
|
||||
reg = <0>;
|
||||
status = "okay";
|
||||
|
||||
csi2rx0_in_sensor: endpoint {
|
||||
remote-endpoint = <&csi2_cam0>;
|
||||
bus-type = <4>; /* CSI2 DPHY */
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cdns_csi2rx1 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi1_port0: port@0 {
|
||||
reg = <0>;
|
||||
status = "okay";
|
||||
|
||||
csi2rx1_in_sensor: endpoint {
|
||||
remote-endpoint = <&csi2_cam1>;
|
||||
bus-type = <4>; /* CSI2 DPHY */
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cdns_csi2rx2 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi2_port0: port@0 {
|
||||
reg = <0>;
|
||||
status = "okay";
|
||||
|
||||
csi2rx2_in_sensor: endpoint {
|
||||
remote-endpoint = <&csi2_cam2>;
|
||||
bus-type = <4>; /* CSI2 DPHY */
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cdns_csi2rx3 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi3_port0: port@0 {
|
||||
reg = <0>;
|
||||
status = "okay";
|
||||
|
||||
csi2rx3_in_sensor: endpoint {
|
||||
remote-endpoint = <&csi2_cam3>;
|
||||
bus-type = <4>; /* CSI2 DPHY */
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ti_csi2rx0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dphy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ti_csi2rx1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dphy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ti_csi2rx2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dphy2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ti_csi2rx3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dphy3 {
|
||||
status = "okay";
|
||||
};
|
||||
323
arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso
Normal file
323
arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso
Normal file
|
|
@ -0,0 +1,323 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/*
|
||||
* DT Overlay for 4 x TEVI OV5640 MIPI Camera module on J722S-EVM board.
|
||||
*
|
||||
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
&main_pmx0 {
|
||||
cam0_reset_pins_default: cam0-default-reset-pins {
|
||||
pinctrl-single,pins = <
|
||||
J722S_IOPAD(0x03c, PIN_OUTPUT, 7) /* (R22) GPIO0_15 */
|
||||
>;
|
||||
};
|
||||
|
||||
cam1_reset_pins_default: cam1-default-reset-pins {
|
||||
pinctrl-single,pins = <
|
||||
J722S_IOPAD(0x044, PIN_OUTPUT, 7) /* (R26) GPIO0_17 */
|
||||
>;
|
||||
};
|
||||
|
||||
cam2_reset_pins_default: cam2-default-reset-pins {
|
||||
pinctrl-single,pins = <
|
||||
J722S_IOPAD(0x04c, PIN_OUTPUT, 7) /* (T25) GPIO0_19 */
|
||||
>;
|
||||
};
|
||||
|
||||
cam3_reset_pins_default: cam3-default-reset-pins {
|
||||
pinctrl-single,pins = <
|
||||
J722S_IOPAD(0x054, PIN_OUTPUT, 7) /* (T21) GPIO0_21 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&{/} {
|
||||
clk_ov5640_fixed: clock-24000000 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
reg_2p8v: regulator-2p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "2P8V";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
vin-supply = <&vsys_3v3_exp>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vsys_3v3_exp>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vsys_3v3_exp>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&csi01_mux {
|
||||
idle-state = <1>;
|
||||
};
|
||||
|
||||
&csi23_mux {
|
||||
idle-state = <1>;
|
||||
};
|
||||
|
||||
&pca9543_0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* CAM0 I2C */
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
ov5640_0: camera@3c {
|
||||
compatible = "ovti,ov5640";
|
||||
reg = <0x3c>;
|
||||
clocks = <&clk_ov5640_fixed>;
|
||||
clock-names = "xclk";
|
||||
|
||||
AVDD-supply = <®_2p8v>;
|
||||
DOVDD-supply = <®_1p8v>;
|
||||
DVDD-supply = <®_3p3v>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cam0_reset_pins_default>;
|
||||
|
||||
reset-gpios = <&main_gpio0 15 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
csi2_cam0: endpoint {
|
||||
remote-endpoint = <&csi2rx0_in_sensor>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* CAM1 I2C */
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
ov5640_1: camera@3c {
|
||||
compatible = "ovti,ov5640";
|
||||
reg = <0x3c>;
|
||||
clocks = <&clk_ov5640_fixed>;
|
||||
clock-names = "xclk";
|
||||
|
||||
AVDD-supply = <®_2p8v>;
|
||||
DOVDD-supply = <®_1p8v>;
|
||||
DVDD-supply = <®_3p3v>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cam1_reset_pins_default>;
|
||||
|
||||
reset-gpios = <&main_gpio0 17 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
csi2_cam1: endpoint {
|
||||
remote-endpoint = <&csi2rx1_in_sensor>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pca9543_1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* CAM0 I2C */
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
ov5640_2: camera@3c {
|
||||
compatible = "ovti,ov5640";
|
||||
reg = <0x3c>;
|
||||
clocks = <&clk_ov5640_fixed>;
|
||||
clock-names = "xclk";
|
||||
|
||||
AVDD-supply = <®_2p8v>;
|
||||
DOVDD-supply = <®_1p8v>;
|
||||
DVDD-supply = <®_3p3v>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cam2_reset_pins_default>;
|
||||
|
||||
reset-gpios = <&main_gpio0 19 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
csi2_cam2: endpoint {
|
||||
remote-endpoint = <&csi2rx2_in_sensor>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* CAM1 I2C */
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
ov5640_3: camera@3c {
|
||||
compatible = "ovti,ov5640";
|
||||
reg = <0x3c>;
|
||||
clocks = <&clk_ov5640_fixed>;
|
||||
clock-names = "xclk";
|
||||
|
||||
AVDD-supply = <®_2p8v>;
|
||||
DOVDD-supply = <®_1p8v>;
|
||||
DVDD-supply = <®_3p3v>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cam3_reset_pins_default>;
|
||||
|
||||
reset-gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
csi2_cam3: endpoint {
|
||||
remote-endpoint = <&csi2rx3_in_sensor>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cdns_csi2rx0 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi0_port0: port@0 {
|
||||
reg = <0>;
|
||||
status = "okay";
|
||||
|
||||
csi2rx0_in_sensor: endpoint {
|
||||
remote-endpoint = <&csi2_cam0>;
|
||||
bus-type = <4>; /* CSI2 DPHY */
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cdns_csi2rx1 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi1_port0: port@0 {
|
||||
reg = <0>;
|
||||
status = "okay";
|
||||
|
||||
csi2rx1_in_sensor: endpoint {
|
||||
remote-endpoint = <&csi2_cam1>;
|
||||
bus-type = <4>; /* CSI2 DPHY */
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cdns_csi2rx2 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi2_port0: port@0 {
|
||||
reg = <0>;
|
||||
status = "okay";
|
||||
|
||||
csi2rx2_in_sensor: endpoint {
|
||||
remote-endpoint = <&csi2_cam2>;
|
||||
bus-type = <4>; /* CSI2 DPHY */
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cdns_csi2rx3 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi3_port0: port@0 {
|
||||
reg = <0>;
|
||||
status = "okay";
|
||||
|
||||
csi2rx3_in_sensor: endpoint {
|
||||
remote-endpoint = <&csi2_cam3>;
|
||||
bus-type = <4>; /* CSI2 DPHY */
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ti_csi2rx0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dphy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ti_csi2rx1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dphy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ti_csi2rx2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dphy2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ti_csi2rx3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dphy3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -141,6 +141,17 @@ vsys_5v0: regulator-vsys5v0 {
|
|||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vsys_3v3: regulator-vsys3v3 {
|
||||
/* output of LM5141-Q1 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vsys_3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vmain_pd>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_mmc1: regulator-mmc1 {
|
||||
/* TPS22918DBVR */
|
||||
compatible = "regulator-fixed";
|
||||
|
|
@ -153,6 +164,17 @@ vdd_mmc1: regulator-mmc1 {
|
|||
bootph-all;
|
||||
};
|
||||
|
||||
vsys_3v3_exp: regulator-TPS22990 {
|
||||
/* output of TPS22990 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vsys_3v3_exp";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vsys_3v3>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_sd_dv: regulator-TLV71033 {
|
||||
compatible = "regulator-gpio";
|
||||
regulator-name = "tlv71033";
|
||||
|
|
@ -244,6 +266,20 @@ transceiver2: can-phy2 {
|
|||
max-bitrate = <5000000>;
|
||||
standby-gpios = <&exp1 17 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
csi01_mux: mux-controller-0 {
|
||||
compatible = "gpio-mux";
|
||||
#mux-state-cells = <1>;
|
||||
mux-gpios = <&exp1 6 GPIO_ACTIVE_HIGH>;
|
||||
idle-state = <0>;
|
||||
};
|
||||
|
||||
csi23_mux: mux-controller-1 {
|
||||
compatible = "gpio-mux";
|
||||
#mux-state-cells = <1>;
|
||||
mux-gpios = <&exp1 7 GPIO_ACTIVE_HIGH>;
|
||||
idle-state = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
|
|
@ -843,8 +879,11 @@ &serdes_ln_ctrl {
|
|||
<J722S_SERDES1_LANE0_PCIE0_LANE0>;
|
||||
};
|
||||
|
||||
&serdes0 {
|
||||
&serdes_wiz0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&serdes0 {
|
||||
serdes0_usb_link: phy@0 {
|
||||
reg = <0>;
|
||||
cdns,num-lanes = <1>;
|
||||
|
|
@ -854,8 +893,11 @@ serdes0_usb_link: phy@0 {
|
|||
};
|
||||
};
|
||||
|
||||
&serdes1 {
|
||||
&serdes_wiz1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&serdes1 {
|
||||
serdes1_pcie_link: phy@0 {
|
||||
reg = <0>;
|
||||
cdns,num-lanes = <1>;
|
||||
|
|
|
|||
|
|
@ -32,6 +32,8 @@ serdes_wiz0: phy@f000000 {
|
|||
assigned-clocks = <&k3_clks 279 1>;
|
||||
assigned-clock-parents = <&k3_clks 279 5>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
serdes0: serdes@f000000 {
|
||||
compatible = "ti,j721e-serdes-10g";
|
||||
reg = <0x0f000000 0x00010000>;
|
||||
|
|
@ -50,8 +52,6 @@ serdes0: serdes@f000000 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#clock-cells = <1>;
|
||||
|
||||
status = "disabled"; /* Needs lane config */
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -70,6 +70,8 @@ serdes_wiz1: phy@f010000 {
|
|||
assigned-clocks = <&k3_clks 280 1>;
|
||||
assigned-clock-parents = <&k3_clks 280 5>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
serdes1: serdes@f010000 {
|
||||
compatible = "ti,j721e-serdes-10g";
|
||||
reg = <0x0f010000 0x00010000>;
|
||||
|
|
@ -88,8 +90,6 @@ serdes1: serdes@f010000 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#clock-cells = <1>;
|
||||
|
||||
status = "disabled"; /* Needs lane config */
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -98,10 +98,10 @@ pcie0_rc: pcie@f102000 {
|
|||
reg = <0x00 0x0f102000 0x00 0x1000>,
|
||||
<0x00 0x0f100000 0x00 0x400>,
|
||||
<0x00 0x0d000000 0x00 0x00800000>,
|
||||
<0x00 0x68000000 0x00 0x00001000>;
|
||||
<0x06 0x00000000 0x00 0x00001000>; /* ECAM (4 KB) */
|
||||
reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
|
||||
ranges = <0x01000000 0x00 0x68001000 0x00 0x68001000 0x00 0x0010000>,
|
||||
<0x02000000 0x00 0x68011000 0x00 0x68011000 0x00 0x7fef000>;
|
||||
ranges = <0x01000000 0x00 0x00001000 0x06 0x00001000 0x00 0x00100000>, /* IO (1 MB) */
|
||||
<0x02000000 0x00 0x00101000 0x06 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */
|
||||
dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
|
||||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 99 IRQ_TYPE_EDGE_RISING>;
|
||||
|
|
|
|||
|
|
@ -24,7 +24,6 @@ aliases {
|
|||
};
|
||||
|
||||
&main_cpsw0 {
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -5,6 +5,9 @@
|
|||
* EVM Board Schematics(j784s4): https://www.ti.com/lit/zip/sprr458
|
||||
* EVM Board Schematics(j742s2): https://www.ti.com/lit/zip/SPAC001
|
||||
*/
|
||||
|
||||
#include <dt-bindings/phy/phy-cadence.h>
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
stdout-path = "serial2:115200n8";
|
||||
|
|
@ -1407,10 +1410,13 @@ &main_mcan4 {
|
|||
|
||||
&pcie1_rc {
|
||||
status = "okay";
|
||||
clocks = <&k3_clks 333 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>;
|
||||
clock-names = "fck", "pcie_refclk";
|
||||
num-lanes = <2>;
|
||||
reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
|
||||
phys = <&serdes0_pcie1_link>;
|
||||
phy-names = "pcie-phy";
|
||||
ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x1>;
|
||||
};
|
||||
|
||||
&serdes1 {
|
||||
|
|
|
|||
29
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso
Normal file
29
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso
Normal file
|
|
@ -0,0 +1,29 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/**
|
||||
* DT Overlay for enabling USB0 instance of USB on J784S4 and J742S2 EVMs for
|
||||
* Host Mode of operation with the Type-A Connector.
|
||||
*
|
||||
* J784S4 EVM Product Link: https://www.ti.com/tool/J784S4XEVM
|
||||
* J742S2 EVM Product Link: https://www.ti.com/tool/J742S2XH01EVM
|
||||
*
|
||||
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
&exp2 {
|
||||
p12-hog {
|
||||
/* P12 - USB2.0_MUX_SEL */
|
||||
gpio-hog;
|
||||
gpios = <12 GPIO_ACTIVE_HIGH>;
|
||||
output-high;
|
||||
line-name = "USB2.0_MUX_SEL";
|
||||
};
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
|
@ -77,7 +77,7 @@ pcie1_ctrl: pcie1-ctrl@4074 {
|
|||
|
||||
serdes_ln_ctrl: mux-controller@4080 {
|
||||
compatible = "reg-mux";
|
||||
reg = <0x00004080 0x30>;
|
||||
reg = <0x00004080 0x50>;
|
||||
#mux-control-cells = <1>;
|
||||
mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */
|
||||
<0x8 0x3>, <0xc 0x3>, /* SERDES0 lane2/3 select */
|
||||
|
|
@ -126,6 +126,11 @@ audio_refclk1: clock@82e4 {
|
|||
assigned-clock-parents = <&k3_clks 157 63>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
acspcie0_proxy_ctrl: clock-controller@1a090 {
|
||||
compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon";
|
||||
reg = <0x1a090 0x4>;
|
||||
};
|
||||
};
|
||||
|
||||
main_ehrpwm0: pwm@3000000 {
|
||||
|
|
@ -1055,7 +1060,7 @@ pcie0_rc: pcie@2900000 {
|
|||
reg = <0x00 0x02900000 0x00 0x1000>,
|
||||
<0x00 0x02907000 0x00 0x400>,
|
||||
<0x00 0x0d000000 0x00 0x00800000>,
|
||||
<0x00 0x10000000 0x00 0x00001000>;
|
||||
<0x40 0x00000000 0x00 0x00001000>; /* ECAM (4 KB) */
|
||||
reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
|
||||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
|
||||
|
|
@ -1073,8 +1078,8 @@ pcie0_rc: pcie@2900000 {
|
|||
device-id = <0xb012>;
|
||||
msi-map = <0x0 &gic_its 0x0 0x10000>;
|
||||
dma-coherent;
|
||||
ranges = <0x01000000 0x0 0x10001000 0x0 0x10001000 0x0 0x0010000>,
|
||||
<0x02000000 0x0 0x10011000 0x0 0x10011000 0x0 0x7fef000>;
|
||||
ranges = <0x01000000 0x00 0x00001000 0x40 0x00001000 0x00 0x00100000>, /* IO (1 MB) */
|
||||
<0x02000000 0x00 0x00101000 0x40 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */
|
||||
dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -1084,7 +1089,7 @@ pcie1_rc: pcie@2910000 {
|
|||
reg = <0x00 0x02910000 0x00 0x1000>,
|
||||
<0x00 0x02917000 0x00 0x400>,
|
||||
<0x00 0x0d800000 0x00 0x00800000>,
|
||||
<0x00 0x18000000 0x00 0x00001000>;
|
||||
<0x41 0x00000000 0x00 0x00001000>; /* ECAM (4 KB) */
|
||||
reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
|
||||
interrupt-names = "link_state";
|
||||
interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
|
||||
|
|
@ -1102,8 +1107,8 @@ pcie1_rc: pcie@2910000 {
|
|||
device-id = <0xb012>;
|
||||
msi-map = <0x0 &gic_its 0x10000 0x10000>;
|
||||
dma-coherent;
|
||||
ranges = <0x01000000 0x0 0x18001000 0x00 0x18001000 0x0 0x0010000>,
|
||||
<0x02000000 0x0 0x18011000 0x00 0x18011000 0x0 0x7fef000>;
|
||||
ranges = <0x01000000 0x00 0x00001000 0x41 0x00001000 0x00 0x00100000>, /* IO (1 MB) */
|
||||
<0x02000000 0x00 0x00101000 0x41 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */
|
||||
dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user