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riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz

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Use qspi flash read-delay and spi-max-frequency settings compatible with
U-Boot bootloader.

Observations from testing on Pine64 Star64 hardware within U-Boot bootloader
and read-delay=2 are spi-max-frequency less than 49.8MHz fails to write,
corrupt data writes at 25MHz to 49.799999MHz, and valid data writes at
49.8MHz to 100MHz (not tested above 100MHz). No valid spi-max-frequency
was found for 1<read-delay<=3 and corrupt data with read-delay=3.

Looking around the Linux codebase it is common to see read-delay 2 cycles
with spi-max-frequency 100MHz and testing confirms this to work in both
U-Boot and Linux.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
E Shattow 2025-05-02 03:30:42 -07:00 committed by Conor Dooley
parent 724a6718ce
commit 59404dceb3
1 changed files with 2 additions and 2 deletions
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4
arch/riscv/boot/dts/starfive/jh7110-common.dtsi
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@ -318,8 +318,8 @@ &qspi {
nor_flash: flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
cdns,read-delay = <5>;
spi-max-frequency = <12000000>;
cdns,read-delay = <2>;
spi-max-frequency = <100000000>;
cdns,tshsl-ns = <1>;
cdns,tsd2d-ns = <1>;
cdns,tchsh-ns = <1>;