Commit Graph

4330 Commits

Author SHA1 Message Date
AngeloGioacchino Del Regno
52777caee7 dt-bindings: power: mediatek: Add support for MT8196 direct HFRP
Add support for the HFRPSYS direct control power domains in the
MT8196 SoC, controlling power for the DisplayPort and for the
Embedded DisplayPort Transmitter IPs.

Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-07-13 12:39:28 +02:00
Denzeel Oliva
d508352790 dt-bindings: clock: exynos990: Add CLK_GOUT_PERIS_TMU_SUB_PCLK
Add the missing TMU_SUB_PCLK clock ID for the Exynos990 PERIS CMU.

Signed-off-by: Denzeel Oliva <wachiturroxd150@gmail.com>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://patch.msgid.link/20260613-exynos990-peris-fix-v3-v3-1-2b230db78ae4@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-07-13 09:09:40 +02:00
Bjorn Andersson
b14992f796 Merge branch '20260707-b4-ipq9650_refgen_clocks-v1-1-e070624d03d2@oss.qualcomm.com' into clk-for-7.3
Merge the IPQ9650 refgen clock ids through a topic branch, in case they
need to be referenced from DeviceTree branches as well before next
release.
2026-07-11 12:57:01 -05:00
Kathiravan Thirumoorthy
dd7ddd057f dt-bindings: clock: qcom: Add IPQ9650 REFGEN clock IDs
Add the REFGEN clock IDs for the IPQ9650 SoC. These clocks are used
to enable the REFGEN block, which provides the reference current to
the PHYs in the SoC.

Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260707-b4-ipq9650_refgen_clocks-v1-1-e070624d03d2@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-11 12:56:53 -05:00
Bjorn Andersson
c5fcfce1ea Merge branch '20260624-glymur_camcc-v5-1-a321df74b1a1@oss.qualcomm.com' into clk-for-7.3
Merge Glymur camera clock controller binding through topic branch, to
allow sharing constants with DeviceTree branches.
2026-07-11 10:19:17 -05:00
Jagadeesh Kona
618949bb99 dt-bindings: clock: qcom: Add Glymur camera clock controller
Add device tree bindings for the camera clock controller on
Qualcomm Glymur SoC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260624-glymur_camcc-v5-1-a321df74b1a1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-11 10:19:09 -05:00
Yixun Lan
4fc567e1ba dt-bindings: soc: spacemit: k3: Add clock ID for UFS refclk
Add clock ID for the UFS refclk clock in SpacemiT K3 SoC.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260630-06-clk-ufs-support-v1-2-cf7521d1d0fe@kernel.org
Signed-off-by: Yixun Lan <dlan@kernel.org>
2026-07-10 23:46:15 +00:00
Guoniu Zhou
6aa38ef0ea dt-bindings: power: imx93: Add MIPI PHY power domain
Add MIPI PHY power domain for shared PHY resources used by both
MIPI DSI and CSI blocks.

Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Fixes: e9aa77d413 ("soc: imx: add i.MX93 media blk ctrl driver")
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-07-08 17:08:37 +02:00
Bjorn Andersson
d328c411f1 Merge branch '20260608-shikra-gcc-rpmcc-clks-v5-2-94cefe092ee3@oss.qualcomm.com' into clk-for-7.3
Merge Shikra RPM and global clock controller bindings through topic
branch, to allow constants to be made available to DeviceTree branches
as well.
2026-07-07 22:01:31 -05:00
Imran Shaik
f390a1fac1 dt-bindings: clock: qcom: Add Qualcomm Shikra SoC Global Clock Controller
Add device tree bindings for the global clock controller on Qualcomm
Shikra SoC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260608-shikra-gcc-rpmcc-clks-v5-2-94cefe092ee3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-07 22:01:23 -05:00
Raviteja Laggyshetty
565de44266 dt-bindings: interconnect: qcom: document the RPMh Network-On-Chip interconnect in Maili SoC
Document the RPMh Network-On-Chip interconnect for the Qualcomm Maili
SoC.

Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260622-maili_icc-v2-1-18b5ac08c04f@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-07 17:17:44 +03:00
Lin Li
d9ef4ed458 dt-bindings: clock: qcom: Add Hawi video clock controller
Add device tree bindings for the video clock controller on Qualcomm
Hawi SoC.

Signed-off-by: Lin Li <zhuolin.li@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260702-hawi-videocc-v1-1-6c1e640b0954@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-06 22:05:53 -05:00
Bjorn Andersson
0fc66307d1 Merge branch '20260617-evacc_glymur-v2-2-905108dacaaa@oss.qualcomm.com' into arm64-for-7.3
Merge the Glymur EVA clock controller binding from topic branch, to gain
access to the clock defines.
2026-07-06 21:59:09 -05:00
Taniya Das
7803dfda92 dt-bindings: clock: qcom: Add EVA clock and reset controller for Glymur SoC
Add the device tree bindings for the enhanced video analytics(EVA) clock
controller which is required on Qualcomm Glymur SoC. The controller
provides clocks, resets and power domains for the EVA subsystem.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260617-evacc_glymur-v2-2-905108dacaaa@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-06 21:57:13 -05:00
Jerome Brunet
38d6b194a2 dt-bindings: rtc: sun6i: add sun60i-a733 support
Add a new rtc compatible for the sun60i-a733 SoC and new IDs for the
peripheral oscillator clock gates of this SoC.

Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://patch.msgid.link/20260706-a733-rtc-v4-2-f330728db3d3@baylibre.com
Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-07-06 22:40:24 +08:00
David Heidelberg
d529495c99 dt-bindings: arm: qcom,ids: Add SoC ID for Snapdragon SDM 850
Add SoC ID for Qualcomm Snapdragon SDM850.

Signed-off-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260627-sda850-v2-1-44bf46ade42e@ixit.cz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-05 14:37:01 -05:00
Roman Vivchar
348ff65577 dt-bindings: iio: adc: mediatek,mt6359-auxadc: add mt6323 PMIC AUXADC
The MediaTek mt6323 PMIC includes an AUXADC used for battery voltage,
temperature, and other internal measurements. The IP block is not
register-compatible with mt6359.

Add the devicetree binding documentation and the associated header file
defining the ADC channel constants.

Also change the description to 'MT6350 series and similar' because
the binding already includes more than mt635x series PMICs.

Finally, add the MAINTAINERS entry for the header with ADC constants.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Roman Vivchar <rva333@protonmail.com>
Reviewed-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-07-02 16:43:45 +01:00
Tanmay Kathpalia
ab45ecfab5 dt-bindings: reset: altr: add COMBOPHY_RESET for Agilex5
Add COMBOPHY_RESET definition at index 38 for the combo PHY reset
control on Altera Agilex5 SoCs. This reset is used by peripherals
such as the SD/eMMC controller that share the combo PHY.

Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2026-07-01 15:08:06 +02:00
Geert Uytterhoeven
3c7d800a26 Renesas RZ/T2H and RZ/N2H LCDC and RTC Clock DT Binding Definitions
LCD Controller and Real-Time Clock DT binding definitions for the
 Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs, shared by driver
 and DT source files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCajj4pwAKCRCKwlD9ZEnx
 cFcjAP4xZ7FUY9hbx8wIrY/E+8CoT2/sPr6XDKHk28+wk77T+QD/fqIfXj6iRRE/
 YNf9kz11W1fAwPMH7ETxeSj7iH4A9wc=
 =gqG9
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r9a09g077-dt-binding-defs-tag7' into renesas-clk-for-v7.3

Renesas RZ/T2H and RZ/N2H LCDC and RTC Clock DT Binding Definitions

LCD Controller and Real-Time Clock DT binding definitions for the
Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs, shared by driver
and DT source files.
2026-06-30 11:55:31 +02:00
Xuyang Dong
fc8c21a2b5 dt-bindings: clock: Add ESWIN eic7700 HSP clock and reset generator
Add bindings for the high-speed peripherals clock and reset generator
on the ESWIN EIC7700 HSP.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>
Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-06-29 13:18:20 -04:00
Peng Fan
ae794aa6e8 dt-bindings: clock: Add spread spectrum definition
Per dt-schema, the modulation methods are: down-spread(3), up-spread(2),
center-spread(1), no-spread(0). So define them in dt-bindings to avoid
write the magic number in device tree.

Reviewed-by: Brian Masney <bmasney@redhat.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Sebin Francis <sebin.francis@ti.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-06-29 13:16:17 -04:00
Jian Hu
d425596035 dt-bindings: clock: Add Amlogic A9 AO clock controller
Add the Always-On clock controller dt-bindings for the Amlogic A9
SoC family.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Link: https://patch.msgid.link/20260623-a9_aoclk-v5-1-c7cb1ff9ebf1@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2026-06-29 11:15:18 +02:00
Linus Torvalds
8c04c1292d This is all clk driver updates. Mostly new SoC support for
various Qualcomm chips and Canaan K230. Otherwise there's
 non-critical fixes and updates to clk data such as adding missing
 clks to existing drivers or marking clks critical. Nothing looks
 especially exciting.
 -----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmo9Q6oUHHN3Ym95ZEBj
 aHJvbWl1bS5vcmcACgkQrQKIl8bklSXXFA/9GpTMt3p0Mi/sT/AszYTU+RsVXGpW
 q7XQ3MnO6rzd/NvzVGTptmQdbOj54jl1yXosEmTs+Won9OtSuOPjxVamtDRTJMpl
 YOT5ixy4JNVBxwdxgyrSIoEQ6+MhTj91uBXA74MiO6Kk2CFTEHafTQC2P0HQyPv9
 aaHx53ViKM6UwI6IgWajfmRS8CMzWlEjPFF6v9zG8vWAls22J1SkrW5h7ovFJM2F
 osl6OkNc6prRc0gOrhzmtekX2e1e3Eg9HKlXwNV58LRtysXMpmqTm2zYvxv0iltb
 GV2V5fX9fcJI45dWOGStxJ2mO6NswDWjNYF9kFefvpqVrRRluhX+Af9/bbqTwVXt
 +PEHsdJYRTzlaIbMuGfASTqmo6Sp5MkHG1PV5tAQglX16yVNMqk11gjoPHVA4zEF
 CRkC494s4nX2XMM85MBeqTyh8bue0LQqz9QAsUBaU0XRvJJhDMw81P34QOFTfq9n
 UEBmnv+dRqsHvXQsJzB+8q+F+kx12M3GIkGqX/O1eZT+9sGjTVY3XFIbvH01vN4W
 OGUB9q6ZixD25d8MA6mussel2O6An4S7NU+zRsSz1xZd2W7IGNtk908dr7mJOh13
 8rG9DW73XRpKNYhX/IszDFjyPHUuZPYU8RyYTwf63ADGJHVVFcHZ78V4ORuPh2AY
 TnZt1wOsq1a/xd8=
 =hEhO
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This is all clk driver updates. Mostly new SoC support for various
  Qualcomm chips and Canaan K230. Otherwise there's non-critical fixes
  and updates to clk data such as adding missing clks to existing
  drivers or marking clks critical. Nothing looks especially exciting"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (106 commits)
  clk: qcom: regmap-phy-mux: Rework the implementation
  clk: qcom: a53: Corrected frequency multiplier for 1152MHz
  clk: qcom: camcc-milos: Declare icc path dependency for CAMSS_TOP_GDSC
  clk: qcom: gdsc: Support enabling interconnect path for power domain
  dt-bindings: clock: qcom,milos-camcc: Document interconnect path
  interconnect: Add devm_of_icc_get_by_index() as exported API for users
  clk: qcom: camcc-x1p42100: Add support for camera clock controller
  clk: qcom: camcc-x1e80100: Add support for camera QDSS debug clocks
  clk: qcom: videocc-x1p42100: Add support for video clock controller
  dt-bindings: clock: qcom: Add X1P42100 camera clock controller
  dt-bindings: clock: qcom: Add X1P42100 video clock controller
  clk: keystone: sci-clk: fix application of sizeof to pointer
  clk: keystone: don't cache clock rate
  clk: spacemit: k3: Add PCIe DBI clock
  dt-bindings: soc: spacemit: k3: Add PCIe DBI clock IDs
  clk: spacemit: k3: Fix PCIe clock register offset
  clk: spacemit: k3: Switch to pll2_d6 as parent for PCIe clock
  clk: at91: keep securam node alive while mapping it
  clk: samsung: exynos990: Fix PERIC0/1 USI clock types
  clk: renesas: r9a08g045: Drop unused pm_domain header file
  ...
2026-06-25 12:48:57 -07:00
Stephen Boyd
92010229c4
Merge branches 'clk-microchip' and 'clk-qcom' into clk-next
* clk-microchip:
  clk: at91: keep securam node alive while mapping it
  clk: at91: sama7d65: add peripheral clock for I3C
  clk: microchip: mpfs-ccc: fix peripheral driver registration failures after oob fix
  clk: at91: sam9x7: Fix gmac_gclk clock definition
  clk: at91: sam9x7: Rename macb0_clk to gmac_clk
  clk: at91: sam9x7: Remove gmac peripheral clock with ID 67
  clk: microchip: rename clk-core to clk-pic32

* clk-qcom: (32 commits)
  clk: qcom: regmap-phy-mux: Rework the implementation
  clk: qcom: a53: Corrected frequency multiplier for 1152MHz
  clk: qcom: camcc-milos: Declare icc path dependency for CAMSS_TOP_GDSC
  clk: qcom: gdsc: Support enabling interconnect path for power domain
  dt-bindings: clock: qcom,milos-camcc: Document interconnect path
  interconnect: Add devm_of_icc_get_by_index() as exported API for users
  clk: qcom: camcc-x1p42100: Add support for camera clock controller
  clk: qcom: camcc-x1e80100: Add support for camera QDSS debug clocks
  clk: qcom: videocc-x1p42100: Add support for video clock controller
  dt-bindings: clock: qcom: Add X1P42100 camera clock controller
  dt-bindings: clock: qcom: Add X1P42100 video clock controller
  clk: qcom: nord: negcc: add support for the USB2 PHY reset
  dt-bindings: clock: qcom: add the definition for the USB2 PHY reset
  clk: qcom: clk-rpmh: Make all VRMs optional
  clk: qcom: Add support for global clock controller on Hawi
  clk: qcom: clk-alpha-pll: Add support for Taycan EHA_T PLL
  clk: qcom: Add Hawi TCSR clock controller driver
  clk: qcom: rpmh: Add support for Hawi RPMH clocks
  dt-bindings: clock: qcom: Add Hawi global clock controller
  dt-bindings: clock: qcom: Add Hawi TCSR clock controller
  ...
2026-06-25 07:55:47 -07:00
Stephen Boyd
db810874e5
Merge branches 'clk-ti', 'clk-samsung', 'clk-rockchip' and 'clk-spacemit' into clk-next
* clk-ti:
  clk: keystone: sci-clk: fix application of sizeof to pointer
  clk: keystone: don't cache clock rate

* clk-samsung:
  clk: samsung: exynos990: Fix PERIC0/1 USI clock types
  clk: samsung: exynos850: mark APM I3C clocks as critical

* clk-rockchip:
  clk: rockchip: allow COMPILE_TEST builds
  clk: rockchip: rk3588: add GATE_GRF clocks for I2S MCLK output to IO
  soc: rockchip: rk3588: add SYS_GRF SOC_CON6 register offset
  clk: rockchip: add helper to register auxiliary GRFs
  clk: rockchip: allow grf_type_sys lookup in aux_grf_table
  dt-bindings: clock: rockchip,rk3588-cru: add I2S MCLK output to IO clock IDs

* clk-spacemit:
  clk: spacemit: k3: Add PCIe DBI clock
  dt-bindings: soc: spacemit: k3: Add PCIe DBI clock IDs
  clk: spacemit: k3: Fix PCIe clock register offset
  clk: spacemit: k3: Switch to pll2_d6 as parent for PCIe clock
2026-06-25 07:55:38 -07:00
Stephen Boyd
e08f2083dd
Merge branches 'clk-renesas', 'clk-socfpga', 'clk-amlogic' and 'clk-canaan' into clk-next
* clk-renesas: (36 commits)
  clk: renesas: r9a08g045: Drop unused pm_domain header file
  clk: renesas: r8a779g0: Add DSC clock
  clk: renesas: rzg2l: Rename iterator in for_each_mod_clock() to avoid shadowing
  clk: renesas: r9a08g045: Drop unused DEF_G3S_MUX macro
  clk: renesas: rzg2l: Rename RZG3L-prefixed PLL macros to CPG-prefixed ones
  clk: renesas: rzg3s/rzg3l: Simplify PLL configuration macro
  clk: renesas: rzg2l: Simplify SAM PLL configuration macro
  clk: renesas: r8a73a4: Add ZT/ZTR trace clocks
  dt-bindings: clock: renesas,cpg-clocks: Document ZT/ZTR trace clock on R-Mobile APE6
  clk: renesas: r9a08g046: Add RSPI clocks and resets
  clk: renesas: r9a08g046: Add SSIF-2 clocks and resets
  clk: renesas: r9a08g046: Add RSCI clocks and resets
  clk: renesas: cpg-mssr: Add number of clock cells check
  clk: renesas: rzg2l: Refactor rzg3l_cpg_pll_clk_endisable()
  clk: renesas: rzg2l: Consolidate DEF_MUX() and DEF_MUX_FLAGS()
  clk: renesas: r9a08g046: Add IA55_PCLK to critical module clocks
  clk: renesas: r9a09g047: Add support for LCDC{0,1} clocks and resets
  clk: renesas: r9a09g047: Add support for DSI clocks and resets
  clk: renesas: r9a09g047: Add support for SMUX2_DSI{0,1}_CLK
  clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1}_CSDIV clocks
  ...

* clk-socfpga:
  clk: socfpga: agilex: implement l3_main_free_clk

* clk-amlogic:
  dt-bindings: clock: amlogic: t7: Add missing mpll3 parent clock
  dt-bindings: clock: amlogic: Fix redundant hyphen in "amlogic,t7-gp1--pll" string.

* clk-canaan:
  clk: canaan: Add clock driver for Canaan K230
  dt-bindings: clock: Add Canaan K230 clock controller
2026-06-25 07:55:26 -07:00
Linus Torvalds
0000d9ccbc Char/Misc/IIO/FPGA/GPIB/etc driver updates for 7.2-rc1
Here is the big set of char, misc, iio, fpga, and other small driver
 subsystems changes for 7.2-rc1.
 
 Lots of little stuff in here, the majority being of course the IIO
 driver updates, as a list they are:
   - IIO driver updates and additions
   - GPIB driver bugfixes and cleanups
   - Android binder driver updates (rust and C version)
   - counter driver updates
   - MHI driver updates
   - mei driver updates
   - w1 driver updates
   - interconnect driver updates
   - Comedi driver fixes and updates
   - some obsolete char drivers removed (applicom and dtlk)
   - hwtracing driver updates
   - other tiny driver updates
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCajk4Gg8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+yl89wCdG1WBLsvKHZ3zaFWd4POE8G/gS1YAnRf0GcRB
 0F1/iBXSZLaRF/p9dsGq
 =fg13
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull misc driver updates from Greg KH:
 "Here is the big set of char, misc, iio, fpga, and other small driver
  subsystems changes for 7.2-rc1.

  Lots of little stuff in here, the majority being of course the IIO
  driver updates, as a list they are:

   - IIO driver updates and additions

   - GPIB driver bugfixes and cleanups

   - Android binder driver updates (rust and C version)

   - counter driver updates

   - MHI driver updates

   - mei driver updates

   - w1 driver updates

   - interconnect driver updates

   - Comedi driver fixes and updates

   - some obsolete char drivers removed (applicom and dtlk)

   - hwtracing driver updates

   - other tiny driver updates

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (406 commits)
  w1: ds2482: Use named initializers for arrays of i2c_device_data
  firmware: stratix10-svc: Add support to query Arm Trusted Firmware (ATF) version
  firmware: stratix10-rsu: avoid blocking reboot_image sysfs when busy
  coresight: ultrasoc-smb: Fix OOB write in smb_sync_perf_buffer()
  iio: adc: nxp-sar-adc: harden buffer ISR against per-channel read failure
  iio: chemical: scd30: Replace manual locking with RAII locking
  iio: light: tsl2591: remove unneeded tsl2591_compatible_als_persist_cycle()
  iio: dac: ad5686: create bus ops struct
  iio: dac: ad5686: cleanup doc header of local structs
  iio: dac: ad5686: add control_sync() for single-channel devices
  iio: dac: ad5686: add helpers to handle powerdown masks
  iio: dac: ad5686: add of_match table to the spi driver
  iio: dac: ad5686: drop enum id
  iio: dac: ad5686: remove redundant register definition
  iio: dac: ad5686: refactor include headers
  iio: adc: ad4080: fix AD4880 chip ID
  iio: light: veml3328: add support for new device
  dt-bindings: iio: light: veml6030: add veml3328
  fpga: microchip-spi: fix zero header_size OOB read in mpf_ops_parse_header()
  fpga: dfl-afu: validate DMA mapping length in afu_dma_map_region()
  ...
2026-06-22 12:20:21 -07:00
Lad Prabhakar
2b005b458f dt-bindings: clock: renesas,r9a09g077/87: Add PCLKRTC clock ID
Add the peripheral clock ID definition for the Real-Time Clock (PCLKRTC)
on the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs.

Note that the PCLKRTC clock is utilized as the operating clock source
for the RTC IP.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260615143943.1610095-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-06-22 10:53:16 +02:00
Lad Prabhakar
c4a16f9079 dt-bindings: clock: renesas,r9a09g077/87: Add LCDC_CLKD clock ID
Add the LCDC clockd (LCDC_CLKD) definition for the Renesas RZ/T2H
(R9A09G077) and RZ/N2H (R9A09G087) SoCs. LCDC_CLKD is used as the
operating clock for LCDC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260615104845.4122868-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-06-22 10:53:16 +02:00
Linus Torvalds
7849ce3871 pmdomain core:
- Add OF helpers for parsing the power-domains-child-ids property
  - Extend the power domain DT binding with power-domains-child-ids
  - Switch to use the dynamic root device
 
 pmdomain providers:
  - arm: Add support for domain hierarchies to SCMI power domains
  - qcom: Add power domains for the Shikra and Nord SoCs
  - sunxi: Fix GPU support on Radxa Cubie A7Z by keeping power domain on
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmoyYiQQHHVsZmhAa2Vy
 bmVsLm9yZwAKCRD+JoQlc1iMKXSFEACMGPergitZamXsgMoIQGrT+jG/sZnLIaWV
 GBrCRhe837amMKQyq1oVu4cTjieQNLx67bJIsuMXZVuAdihyRnLLe/sKwsyOPaXu
 bSa8BR0GhvEXiD784EXFwEK56Zc7b8+qnw6vs67q2IGI/95rylI4gbWBgfa1JTmU
 /H9ayoeIoS/bgis6JPsEYXARWwZIJRJof8dxdEk/anTP6FJZIc9jYv2TPrelsyZk
 lu92ikdu2V4zsOu7pXd64SPSoNaFNg5T0qduOMm4vHB3ePaBr9z2wBF9moN154zB
 NgiIJGJiKZ+BnJnPnH0fX7YIBdr93I3pgaJebJVj9s8202oLd9gHDZ5qVjZED/uP
 OyhNXca5DjA1sCAL4CmxN6aVBQpT0ksnJ76BVqe+nIwNSbWvd/vlJxAswgZ1IhxR
 Hw9wrkYo8Ylq2UxUQ8Zs0EcDA7ANWL97DZJWIdi7ouWvlKH1OyKn75ntcTBYL1ns
 hCzApNg8nYgQliO2kp2siVxK0Ljunr4RRo6wdWwvRyIsRW1iZfHeqv5hzq/g7DaK
 QklZGZ3LT7/GVUKUWDE4XihIu+PF1+5JJk6hKYUp0T3/rjWeVuf8q1QZnVv6qnSS
 jDSmXzlNEcrKgYgWtgv5Je6NL3m2gQlVTgv6Lbw35/ag2L9NjhsCgocj5J5E4K0+
 EYTpY3GfxA==
 =2hQV
 -----END PGP SIGNATURE-----

Merge tag 'pmdomain-v7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

Pull pmdomain updates from Ulf Hansson:
 "pmdomain core:
   - Add OF helpers for parsing the power-domains-child-ids property
   - Extend the power domain DT binding with power-domains-child-ids
   - Switch to use the dynamic root device

  pmdomain providers:
   - arm: Add support for domain hierarchies to SCMI power domains
   - qcom: Add power domains for the Shikra and Nord SoCs
   - sunxi: Fix GPU support on Radxa Cubie A7Z by keeping power domain on"

* tag 'pmdomain-v7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm:
  pmdomain: core: fix unused variable warning with !PM_GENERIC_DOMAINS_OF
  pmdomain: core: fix early domain registration
  pmdomain: mediatek: mfg: move __packed after struct name to fix kernel-doc
  pmdomain: qcom: rpmpd: Add Shikra RPM Power Domains
  pmdomain: qcom: rpmhpd: Add power domains for Nord SoC
  dt-bindings: power: qcom,rpmpd: document the Shikra RPM Power Domains
  pmdomain: sunxi: support power domain flags for pck600
  pmdomain: core: switch to dynamic root device
  pmdomain: qcom: Unify user-visible "Qualcomm" name
  dt-bindings: power: qcom,rpmhpd: Add RPMh power domain for Nord SoC
  dt-bindings: power: qcom,rpmhpd: Fix whitespace in RPMHPD defines
  pmdomain: arm_scmi: add support for domain hierarchies
  pmdomain: core: add support for power-domains-child-ids
  dt-bindings: power: Add power-domains-child-ids property
2026-06-18 16:18:33 -07:00
Linus Torvalds
53c7db5c19 Pin control changes for the v7.2 kernel cycle:
Core changes:
 
 - Add new generic callbacks to populate per-pin pin controllers creating
   groups and functions from the device tree building out
   pinctrl_generic_to_map() and move the Spacemit driver over to use this.
 
 - Generic board-level pin control driver using the mux framework.
 
 New drivers:
 
 - Amlogic (meson) A9 SoC pin controller.
 
 - Aspeed AST2700 SoC0 and SoC1 pin controllers.
 
 - nVidia Tegra264 pin controller.
 
 - nVidia Tegra238 pin controller.
 
 - Qualcomm Nord TLMM pin controller.
 
 - Qualcomm Shikra TLMM pin controller.
 
 - Qualcomm SM6350 LPASS LPI pin controller.
 
 - Qualcomm IPQ9650 TLMM pin controller.
 
 - Renesas RZ/G3L SoC pin controller.
 
 - UltraRISC DP1000 pin controller.
 
 Improvements:
 
 - Handle pull up/pull down properly in the Renesas RZG2L driver.
 
 - Fix up nVidia Tegra 234 DT bindings.
 
 - Fix up pin definitions in the Qualcomm Eliza driver.
 
 - Qualcomm PM8010 GPIO support in the PM8010 pin controller.
 
 - Qualcomm SM6115 EGPIO support in the SM6115 pin controller.
 
 - Switch Qualcomm LPASS LPI drivers to use runtime PM for power management.
 
 - Clean up the Qualcomm Kconfig business a bit to include the necessary
   drivers for each subarch.
 
 - Fix output glitch in the Amlogic (meson) A4 pin controller.
 
 - Move the Airoha driver from the Mediatek directory to its own directory.
   It is too different from other Mediatek hardware.
 
 - A slew of fixes to the Airoha AN7581 and AN7583 drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmoz6V8ACgkQQRCzN7AZ
 XXNvUg/9ExEBVgJFo0yFKqQfwyr0sVHHjFwbAuWZnoBz7qPS0tRTfQ1GeJclqa9a
 7hWkYM0wFWxZ0UpMI+DZI7rvhvg0mLDuU6Fjd8GOgPUISVgvejenqxCGsYTGLNHF
 DsAzGMD42aj+Jt4eL3wBumrKrBS7J36sBfn5wUMcQgFtTjp+2SwDJxntPIfKRH8Q
 l3arrJ+C3cStOwMKGa//S5c/qy2mijaTPKU+NzFrrmD/wZEYzzSLHcS1v4kBSVab
 vVa32q6A5UZtKyPupFxVSICZEtz0/Lze381ppFef+h/txDaHlLwAKZvMLNcoJXt6
 8AJu+q0DNP71mNNpr/51c8ZsAcV8kyc//CCjpV6vGwg2Pk2HnjBRWdOhzeY4H1z1
 eESKEw9GJGdEeO3Ua6CV6FgXVxLGRnLigU9RC4zP0M8qwZuh/z3F3WxKKTWKZIpK
 w0UF+Sl+KrW8qjQRyISsDXphT1fyglQGMrNntL4ihHq/T5JJGF9qjlJMKooZSkiH
 oswB14JGVkNU4XGpG76I6IgbJJcaVe8CDGSdfRoVmTQ1sI3gHrO42eQdlWxbJ9x/
 DgzL7bnO4os+vq5YJo6YdMsQYI0wpIqTWU7WRGfmCQYkyAVYPRVq+AE7KGlRZjbN
 qoqQ9ychYaqKcO94F4vc5ZvhRJkcqIsxNRJel3dky0h8Brq2PZ8=
 =5CSf
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v7.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Core changes:

   - Add new generic callbacks to populate per-pin pin controllers
     creating groups and functions from the device tree building out
     pinctrl_generic_to_map() and move the Spacemit driver over to use
     this

   - Generic board-level pin control driver using the mux framework

  New pin controller drivers:

   - Amlogic (meson) A9 SoC

   - Aspeed AST2700 SoC0 and SoC1

   - nVidia Tegra264 and Tegra238

   - Qualcomm Nord TLMM, Shikra TLMM, SM6350 LPASS LPI, and IPQ9650 TLMM

   - Renesas RZ/G3L SoC

   - UltraRISC DP1000

  Improvements:

   - Handle pull up/pull down properly in the Renesas RZG2L driver

   - Fix up nVidia Tegra 234 DT bindings

   - Fix up pin definitions in the Qualcomm Eliza driver

   - Qualcomm PM8010 GPIO support in the PM8010

   - Qualcomm SM6115 EGPIO support in the SM6115

   - Switch Qualcomm LPASS LPI drivers to use runtime PM for power
     management

   - Clean up the Qualcomm Kconfig business a bit to include the
     necessary drivers for each subarch

   - Fix output glitch in the Amlogic (meson) A4 pin controller

   - Move the Airoha driver from the Mediatek directory to its own
     directory. It is too different from other Mediatek hardware

   - A slew of fixes to the Airoha AN7581 and AN7583 drivers"

* tag 'pinctrl-v7.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (151 commits)
  pinctrl: Export pinctrl_get_group_selector()
  pinctrl: Match DT helper types
  pinctrl: qcom: Register functions before enabling pinctrl
  pinctrl: meson: amlogic-a4: use nolock get range
  pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver
  dt-bindings: pinctrl: Add UltraRISC DP1000 pinctrl controller
  pinctrl: qcom: Remove unused macro definitions
  pinctrl: tegra: PINCTRL_TEGRA264 should depend on ARCH_TEGRA
  pinctrl: tegra: PINCTRL_TEGRA238 should depend on ARCH_TEGRA
  pinctrl: tegra238: add missing AON pin groups
  dt-bindings: pinctrl: tegra238: add missing AON pin groups
  pinctrl: airoha: an7583: remove undefined groups from pcm_spi pin function
  pinctrl: airoha: an7583: fix phy1_led1 pin function
  pinctrl: airoha: an7583: add missed gpio22 pin group
  pinctrl: airoha: an7583: fix gpio21 pin group
  pinctrl: airoha: fix pwm pin function for an7581 and an7583
  pinctrl: airoha: an7583: fix incorrect led mapping in phy4_led1 pin function
  pinctrl: airoha: an7581: fix incorrect led mapping in phy4_led1 pin function
  pinctrl: airoha: an7583: fix misprint in gpio19 pinconf
  pinctrl: airoha: an7581: fix misprint in gpio19 pinconf
  ...
2026-06-18 15:03:21 -07:00
Linus Torvalds
6e717507bf LEDs for v7.2
- New Support & Features
   - Samsung S2MU005: Add support for the Samsung S2MU005 PMIC which includes flash and
     RGB LED controllers
   - Texas Instruments LP5812: Add support for the TI LP5812 LED driver
   - Texas Instruments LP5860: Add support for the Texas Instruments LP5860 LED matrix
     driver via SPI
 
 - Improvements & Fixes
   - Core: Adjust the brightness sysfs node documentation to clarify that only decimal
     values are accepted
   - Core: Fix a race condition in the software blink logic when stopping blinking and
     setting brightness simultaneously
   - Core: Introduce the `multi_max_intensity` sysfs attribute for multicolor LEDs to
     support hardware-based global brightness control
   - Core: Replace OF-based device lookup with firmware node equivalents to support ACPI
     and software nodes
   - Core: Return `ENODATA` when reading brightness from hardware-controlled LEDs
   - Core: Set the coherent DMA mask to zero for the Samsung PMIC device to suppress
     unnecessary "DMA mask not set" messages
   - ams OSRAM AS3668: Fix a Kconfig symbol name mismatch in the Makefile that prevented
     the driver from being built
   - BlinkM: Fix spelling and comment style issues in the driver
   - DAC124S085: Declare the SPI command word as `__le16` to ensure correct endianness
     and pass sparse checks
   - GPIO Trigger: Use `GPIOD_FLAGS_BIT_NONEXCLUSIVE` to allow sharing GPIOs between the
     LED trigger and other drivers
   - NXP PCA9532: Fix an issue where the LED would stop blinking when changing brightness
     to a non-zero value
   - Qualcomm: Unify the user-visible company name to "Qualcomm" across flash LED config
     options
   - Qualcomm LPG: Optimize memory allocation by combining main structure and channels
     into a single allocation using flexible array members
   - Texas Instruments LP5860: Add missing `CONFIG_OF` dependency to prevent build
     warnings
   - TI TPS6131x: Increase the overvoltage protection threshold to 6V to avoid false
     triggers with 5V input supplies
   - Userspace LEDs (uLEDs): Fix a potential buffer overread by using `strnchr()` for
     name string validation
   - Userspace LEDs (uLEDs): Return `-EFAULT` on `copy_to_user()` failure to properly
     handle read errors
 
 - Cleanups & Refactoring
   - Core: Convert various `i2c_device_id` arrays to use named initializers for improved
     robustness and readability
   - Multi-color Core: Fix incorrect `KernelVersion` and `Date` tags for the
     `multi_max_intensity` ABI
   - Broadcom BCM63138 / ChromeOS EC: Move `MODULE_DEVICE_TABLE` declarations next to the
     ID tables for consistency
   - LP5812: Fix a sysfs ABI reference in the documentation
   - ST1202: Remove an unused legacy GPIO header include
 
 - Device Tree Binding Updates
   - Class: Document the keyboard backlight LED class naming conventions, including a new
     scheme for zoned backlights
   - Core: Dual-license the common LED bindings header under GPLv2 and BSD-2-Clause
   - IR SPI LED: Add a new 30% duty-cycle value for the IR transmitter used in Xiaomi
     Redmi Note 8
   - Samsung S2M series: Document the flash LED device bindings for Samsung S2M series
     PMICs
   - Samsung S2M series: Document the pattern behavior for Samsung S2M series PMIC RGB
     LEDs
   - Samsung S2MU005: Add device tree bindings for the S2MU005 PMIC, including its flash
     and RGB LED sub-devices
   - TI LM3560: Document the TI LM3559 and LM3560 synchronous boost flash drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmoylZ0ACgkQUa+KL4f8
 d2GgaQ//QrL6Ap+Sp4JrG4m0FDvMB72QkqtTBtfMtUUpvliFrggGr5tAbPVOnITn
 N5vFNJy++ffGA25xvi7XvMUDAi5dXY71razR7Rw+QAp7KytNnNNu5GxcYw4rGXGR
 yndd9YQBhowlLF+jGjk866txj59vBKf/MpHXt+VrdJGK/se3nzeg4rOsCx/ZP1p5
 nhBcyunGKereeVUHj041N22PVxicR8TsleDf9ho69UdiKTh3ZGiRmzdvn0sgA+wi
 b8wZCQXNmnpnmWm2xtwoH7dCdTFMshbs1rmFl1GxctkRqwx5yRU5sREqJKxeW6g9
 Q/24gwMI6UD350Yx5ir748aKgIeQxmGXAzKvqostqVNxt4uqKIcBat4Q3BHjzSgX
 HzmpF1OZHZOcyPrN1mNgc5fpiv+5FyzQirddg+Au9P2FKe+leOH08u70b0eaZHX0
 RgzSHayGq8DR2evAsUl1pIaJfSuh7W+YopSFaB2VnU83ShTEqLqE3DvdjwwQsjZ8
 Fb1XkPfFqFShQr1gZ8SG3F60yDAbs77ZBzxH6vEC5kjMM7ewsg5rg06o4siR81S1
 6rWyWTQyDXsywapra/vFyBUxum3aE/tj50YieSoovb7pKnwsoeiGU9Tzn2PRdlTX
 u6LxZnnebsIvlKE2UWRWs82raKzDjTRa9u3HwQ42E8xiI0WYVDs=
 =zlOu
 -----END PGP SIGNATURE-----

Merge tag 'leds-next-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds

Pull LED updates from Lee Jones:
 "New Support & Features:
   - Samsung S2MU005: Add support for the Samsung S2MU005 PMIC which
     includes flash and RGB LED controllers
   - Texas Instruments:
       - LP5812: Add support for the TI LP5812 LED driver
       - LP5860: Add support for the Texas Instruments LP5860 LED matrix
         driver via SPI

  Improvements & Fixes:
   - Core:
       - Adjust the brightness sysfs node documentation to clarify that
         only decimal values are accepted
       - Fix a race condition in the software blink logic when stopping
         blinking and setting brightness simultaneously
       - Introduce the `multi_max_intensity` sysfs attribute for
         multicolor LEDs to support hardware-based global brightness
         control
       - Replace OF-based device lookup with firmware node equivalents
         to support ACPI and software nodes
       - Return `ENODATA` when reading brightness from
         hardware-controlled LEDs
       - Set the coherent DMA mask to zero for the Samsung PMIC device
         to suppress unnecessary "DMA mask not set" messages
   - ams OSRAM AS3668: Fix a Kconfig symbol name mismatch in the
     Makefile that prevented the driver from being built
   - BlinkM: Fix spelling and comment style issues in the driver
   - DAC124S085: Declare the SPI command word as `__le16` to ensure
     correct endianness and pass sparse checks
   - GPIO Trigger: Use `GPIOD_FLAGS_BIT_NONEXCLUSIVE` to allow sharing
     GPIOs between the LED trigger and other drivers
   - NXP PCA9532: Fix an issue where the LED would stop blinking when
     changing brightness to a non-zero value
   - Qualcomm: Unify the user-visible company name to "Qualcomm" across
     flash LED config options
   - Qualcomm LPG: Optimize memory allocation by combining main
     structure and channels into a single allocation using flexible
     array members
   - Texas Instruments
       - LP5860: Add missing `CONFIG_OF` dependency to prevent build
         warnings
       - TPS6131x: Increase the overvoltage protection threshold to 6V
         to avoid false triggers with 5V input supplies
   - Userspace LEDs (uLEDs):
       - Fix a potential buffer overread by using `strnchr()` for name
         string validation
       - Return `-EFAULT` on `copy_to_user()` failure to properly handle
         read errors

  Cleanups & Refactoring:
   - Core:
       - Convert various `i2c_device_id` arrays to use named
         initializers for improved robustness and readability
       - Multi-color: Fix incorrect `KernelVersion` and `Date` tags for
         the `multi_max_intensity` ABI
   - Broadcom BCM63138 / ChromeOS EC: Move `MODULE_DEVICE_TABLE`
     declarations next to the ID tables for consistency
   - LP5812: Fix a sysfs ABI reference in the documentation
   - ST1202: Remove an unused legacy GPIO header include

  Device Tree Binding Updates:
   - Class: Document the keyboard backlight LED class naming
     conventions, including a new scheme for zoned backlights
   - Core: Dual-license the common LED bindings header under GPLv2
     and BSD-2-Clause
   - IR SPI LED: Add a new 30% duty-cycle value for the IR transmitter
     used in Xiaomi Redmi Note 8
   - Samsung S2M series:
       - Document the flash LED device bindings for Samsung S2M series
         PMICs
       - Document the pattern behavior for Samsung S2M series PMIC RGB
       - S2MU005: Add device tree bindings for the S2MU005 PMIC,
         including its flash and RGB LED sub-devices
   - TI LM3560: Document the TI LM3559 and LM3560 synchronous boost
     flash drivers"

* tag 'leds-next-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds: (30 commits)
  leds: tps6131x: Increase overvoltage protection threshold to 6V
  leds: Fix sysfs ABI date
  leds: Fix CONFIG_OF dependency for LEDS_LP5860_CORE
  leds: uleds: Fix potential buffer overread
  leds: Use named initializers for arrays of i2c_device_data
  leds: uleds: Return -EFAULT on copy_to_user() failure
  leds: core: Report ENODATA for brightness of hardware controlled LED
  leds: class: Use firmware nodes for device lookup
  Documentation: leds: Document pattern behavior of Samsung S2M series PMIC RGB LEDs
  leds: rgb: Add support for Samsung S2M series PMIC RGB LED device
  leds: flash: Add support for Samsung S2M series PMIC flash LED device
  dt-bindings: leds: Document Samsung S2M series PMIC flash LED device
  leds: core: Fix race condition for software blink
  leds: Adjust documentation of brightness sysfs node
  leds: dac124s085: Declare SPI command word as __le16
  leds: Introduce the multi_max_intensity sysfs attribute
  dt-bindings: leds: Document TI LM3560 Synchronous Boost Flash Driver
  leds: bcm63138/cros_ec: Move MODULE_DEVICE_TABLE next to the table itself
  leds: Add support for TI LP5860 LED driver chip
  Documentation: leds: leds-class: Document keyboard backlight LED class naming
  ...
2026-06-18 14:45:08 -07:00
Linus Torvalds
70cb95c736 soc: drivers for 7.2
There are a few added drivers, but mostly the normal maintenance to drivers
 for firmware, memory controller and other soc specific hadware:
 
  - The NXP QuickEngine gets modern MSI support, which allows some cleanups to
    the GICv3 irqchip chip driver
 
  - A new SoC specific driver for the Renesas R-Car MFIS unit is added,
    encapsulating support for the on-chip mailbox and hwspinlock
    implementations that are not easily separated into individual
    drivers
 
  - The Qualcomm SoC drivers add support for additional SoC implementations,
    and flexiblity around power managedment for the serial-engine driver
    as well as probing the LLCC driver using custom hardware descriptions
    inside of the device itself.
 
  - Added support for the Samsung thermal management unit
 
  - A cleanup to the Tegra 'PMC' driver interfaces to remove legacy
    APIs and allow multiple PMC instances everywhere.
 
  - Updates to the TI SCI and KNAS drivers to improve suspend/resume
    support.
 
  - Minor driver changes for mediatek, xilinx, allwinner, aspeed, tegra,
    broadcom, amd, microchip and starfive specific drivers
 
  - Memory controller updates for Tegra and Renesas for additional SoC
    types and other improvements.
 
  - Firmware driver updates for Arm FF-A, SMCCC and SCMI interfaces,
    to update driver probing, object lifetimes and address minor bugs.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmow8HMACgkQmmx57+YA
 GNmV4A//WYorQo+qes020w70BAc67/CCVsYpDLDz0mWD5G/uQoQkmyqJTA/b2VnM
 iBzrxJ5lGRP7xkhfDVCfb3wsMNsJV9X4QRLGB13XkXA/vRMZxBd3xKV0K/CWUJYo
 0YJV/BeFDonhbIjTyeZ0ddUvkdOtqn7tua+YiVpRLL4lqV0JzwzQ1mrqKuJ1EFk0
 LWw/oLf+xhcY9X6lae0kranLcR6wauGVu9FLXu2nMtGnn1ErkUfywmd8C1mZ8yLk
 QCEjSNdvjXQKSAFhNhAcNPxEDFqvNqKQEXfa62i3m8rM8mX1/ZJUd49NCEQaOnXm
 ZbeZVHLATf8ut6WKvAwOdtcmvY2HAvBy9xyU7mdiYw3+3hDHQWU068bqYcEbfY6O
 04vhYjnvYnYCZNifH3MvsdMteILN5Eja+dNq7Li2LbnMqbSUHr4gJm0nQcbvsbs0
 x42GsuqtmPy1PL4/9hlwN/eDj+Bce4O2x1ZXl8VoChGRUD1JJXzr4NGDumBv03hA
 eqja4VdMWb9Z/w7y6nlXkx48DibpBJJCgotbYl6DSfJjfGX+jnYrHHcZg5BCIvUc
 X1Fy6236sWBQsj1crNcm2QZ2JWJE28HRYcDq3JGDDGvWkcrkB4c1H0N/rIkO4H5F
 nTW5LgJDTd/KEzq3WOKN+gcHoLjXWl0wKJpb4WQ7sdvcYUTdHx8=
 =27+M
 -----END PGP SIGNATURE-----

Merge tag 'soc-drivers-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
 "There are a few added drivers, but mostly the normal maintenance to
  drivers for firmware, memory controller and other soc specific
  hardware:

   - The NXP QuickEngine gets modern MSI support, which allows some
     cleanups to the GICv3 irqchip chip driver

   - A new SoC specific driver for the Renesas R-Car MFIS unit is added,
     encapsulating support for the on-chip mailbox and hwspinlock
     implementations that are not easily separated into individual
     drivers

   - The Qualcomm SoC drivers add support for additional SoC
     implementations, and flexibility around power management for the
     serial-engine driver as well as probing the LLCC driver using
     custom hardware descriptions inside of the device itself.

   - Added support for the Samsung thermal management unit

   - A cleanup to the Tegra 'PMC' driver interfaces to remove legacy
     APIs and allow multiple PMC instances everywhere.

   - Updates to the TI SCI and KNAS drivers to improve suspend/resume
     support.

   - Minor driver changes for mediatek, xilinx, allwinner, aspeed,
     tegra, broadcom, amd, microchip and starfive specific drivers

   - Memory controller updates for Tegra and Renesas for additional SoC
     types and other improvements.

   - Firmware driver updates for Arm FF-A, SMCCC and SCMI interfaces, to
     update driver probing, object lifetimes and address minor bugs"

* tag 'soc-drivers-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (189 commits)
  Revert "firmware: zynqmp: Add dynamic CSU register discovery and sysfs interface"
  Revert "Documentation: ABI: add sysfs interface for ZynqMP CSU registers"
  memory: tegra234: drop dead NULL check in tegra234_mc_icc_aggregate()
  memory: tegra264: drop redundant tegra264_mc_icc_aggregate()
  memory: tegra186-emc: stop borrowing MC aggregate hook for EMC
  soc: aspeed: cleanup dead default for ASPEED_SOCINFO
  firmware: tegra: bpmp: Add support for multi-socket platforms
  firmware: tegra: bpmp: Propagate debugfs errors
  soc/tegra: pmc: Add Tegra238 support
  soc/tegra: pmc: Restrict power-off handler to Nexus 7
  soc/tegra: pmc: Populate powergate debugfs only when needed
  soc/tegra: pmc: Move legacy code behind CONFIG_ARM guard
  soc/tegra: pmc: Remove unused legacy functions
  soc/tegra: pmc: Create PMC context dynamically
  firmware: samsung: acpm: remove compile-testing stubs
  firmware: samsung: acpm: Add devm_acpm_get_by_phandle helper
  firmware: samsung: acpm: Add TMU protocol support
  firmware: samsung: acpm: Make acpm_ops const and access via pointer
  firmware: samsung: acpm: Drop redundant _ops suffix in acpm_ops members
  firmware: samsung: acpm: Annotate rx_data->cmd with __counted_by_ptr
  ...
2026-06-17 11:21:40 -07:00
Linus Torvalds
aab799b1bd soc: devicetree updates for 7.2
There are fewer devicetree updates this time that the last few ones, with
 five SoC types getting added:
 
  - Qualcomm Dragonwing IPQ9650 is a new wireless networking SoC using
    four Cortex-A55 and one Cortex-A78 core, which is a significant
    upgrade from older generations
 
  - ZTE zx297520v3 is an older low-end wireless SoC using a single
    Cortex-A53 core, which so far can only run 32-bit kernels.  This brings
    back the ZX family of chips that was removed in 2021 after support
    for the original zx296702 and zx296718 chips was never completed.
 
  - Renesas R-Car M3Le (R8A779MD) is a variant of the R-Car M3-N (R8A77965)
    automotive SoC.
 
  - Apple t8122 (M3) is the 2023 generation of their laptop SoCs,
    which has now been reverse-engineered to the point of having initial
    kernel support for five laptop models.
 
  - ASPEED AST27xx is their first baseboard managment controller using
    a 64-bit core, the Cortex-A35, following earlier generations using
    ARMv5/v6/v7 CPUs.
 
 These all come with one or more initial boards, and in total there
 are 39 new boards getting added across SoC families, including:
 
  - Two NAS boxes using the old Cortina Systems Gemini SoC based on
    an ARMv4 FA526 CPU core
 
  - 18 industrial embedded boards using NXP i.MX6/8/9 and LX2160A
    SoCs from Variscite, Toradex and SolidRun, plus a number of
    overlays for combinations with additional boards
 
  - One new carrier board and SoM using TI K3 AM62x, in addition to
    new overlays for older SoMs
 
  - Two new boards using Spacemit K3 (no relation with TI) RISC-V
    SoCs.
 
  - Three phones from Google, Nothing and Motorola, all using Qualcomm
    Snapdragon SoCs
 
  - AST26xx BMC support for two server boards
 
 While there is still a significant number of patches improving hardware
 support for the existing boards across vendors (NXP, Qualcomm, Renesas,
 Rockchips, Mediatek, ...), a much smaller number of cleanups and warning
 fixes have made it in this time.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmovyQ0ACgkQmmx57+YA
 GNmE2hAAk4UguDtXr6fCYcIiBGqEtKhPmuvD98edmRyemg1x3ZbHIZn52rUqKFoz
 HDi1BL7NkKdDuIWJ5DvqyHGLMg6kCEbiYSsjdkjN2Hcsx+I8NtokCR0hRtteNPQ9
 f6kgDj9+VsWvXTsYKFU87qkK1bC5nVrLS7xxIuuCIYxULvSEX5GGJbHQ93qxNUam
 6GrFcDHnozh9OfETSBw9bME16FiMxapgghPxMaAmVzuB+iGr4xyrEHmyu9gThsuJ
 O2P04LIhu9j9CZOjaJ54+v41AtMIVE7xG1+MUC5JcWBc7OMVLE30uGgsW9jBKaii
 Wsxa3D08+m1JYeFbhJR6tWAf4HbIEpudEoJmlSdwRhvYte15kU90f917aTNFYBow
 sBf6G09t4ZLsDr9NzCx+cWUnoVLdlYv4auRGNxoWsxe4ed9G6c+yiZN2pBaFNXuT
 wNJqrFstS9mszBaPItgt4e5Tck+IB0uKNqhbSWa3rFyKrXQ9SpZOKVN6cPlwFjhT
 wWYZcAzUL8n2Sz71l/U/QqjN6hqnZWFghe9B3wr81/XQ4sPjWHWoTeRfnees+vFM
 LtE77TGPW2KdZpRI38qfyKWWH3PwKaTtZ07ne8NOvh60zmhK+uUFGzzWAhKlO/Z2
 a3tX8evXRTOb5NrvWzGlwpPwtE0R71oRIwxG1MlmFdlJzddI4Xc=
 =EhYX
 -----END PGP SIGNATURE-----

Merge tag 'soc-dt-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
 "There are fewer devicetree updates this time that the last few ones,
  with five SoC types getting added:

   - Qualcomm Dragonwing IPQ9650 is a new wireless networking SoC using
     four Cortex-A55 and one Cortex-A78 core, which is a significant
     upgrade from older generations

   - ZTE zx297520v3 is an older low-end wireless SoC using a single
     Cortex-A53 core, which so far can only run 32-bit kernels. This
     brings back the ZX family of chips that was removed in 2021 after
     support for the original zx296702 and zx296718 chips was never
     completed.

   - Renesas R-Car M3Le (R8A779MD) is a variant of the R-Car M3-N
     (R8A77965) automotive SoC.

   - Apple t8122 (M3) is the 2023 generation of their laptop SoCs, which
     has now been reverse-engineered to the point of having initial
     kernel support for five laptop models.

   - ASPEED AST27xx is their first baseboard managment controller using
     a 64-bit core, the Cortex-A35, following earlier generations using
     ARMv5/v6/v7 CPUs.

  These all come with one or more initial boards, and in total there are
  39 new boards getting added across SoC families, including:

   - Two NAS boxes using the old Cortina Systems Gemini SoC based on an
     ARMv4 FA526 CPU core

   - 18 industrial embedded boards using NXP i.MX6/8/9 and LX2160A SoCs
     from Variscite, Toradex and SolidRun, plus a number of overlays for
     combinations with additional boards

   - One new carrier board and SoM using TI K3 AM62x, in addition to new
     overlays for older SoMs

   - Two new boards using Spacemit K3 (no relation with TI) RISC-V SoCs.

   - Three phones from Google, Nothing and Motorola, all using Qualcomm
     Snapdragon SoCs

   - AST26xx BMC support for two server boards

  While there is still a significant number of patches improving
  hardware support for the existing boards across vendors (NXP,
  Qualcomm, Renesas, Rockchips, Mediatek, ...), a much smaller number
  of cleanups and warning fixes have made it in this time"

* tag 'soc-dt-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (665 commits)
  arm64: dts: aspeed: Fix duplicate pinctrl labels and address scheme
  arm64: dts: bst: enable eMMC controller in C1200
  dt-bindings: display/lvds-codec: add ti,sn65lvds93
  arm64: dts: allwinner: a523: Add missing GPIO interrupt
  arm64: dts: lx2160a-rev2: avoid 32-bit pcie window system ram overlap
  arm64: dts: aspeed: Add initial AST27xx SoC device tree
  arm64: Kconfig: Add ASPEED SoC family Kconfig support
  dt-bindings: arm: aspeed: Add AST2700 board compatible
  arm64: dts: allwinner: a523: add gpadc node
  arm64: dts: allwinner: Add EL2 virtual timer interrupt
  ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node
  dt-bindings: media: sun6i-a31-isp: Add optional interconnect properties
  dt-bindings: media: sun6i-a31-csi: Add optional interconnect properties
  arm64: dts: imx{91,93}-phyboard-segin: Add peb-av-18 overlays
  arm64: dts: imx93-var-som-symphony: enable ADC
  arm64: dts: imx93-var-som-symphony: enable TPM3 PWM
  arm64: dts: imx93-var-som-symphony: keep RGB_SEL low
  arm64: dts: imx93-var-som-symphony: enable UART7
  arm64: dts: imx93-var-som-symphony: add TPM support
  arm64: dts: imx91-var-som-symphony: fix RGB_SEL handling
  ...
2026-06-17 11:16:56 -07:00
Corvin Köhne
7c150c17c0 dt-binding: leds: Publish common bindings under dual license
Changes leds/common.h DT binding header file to be published under GPLv2
or BSD-2-Clause license terms. This change allows this common LED
bindings header file to be used in software components as bootloaders
and OSes that are not published under GPLv2 terms.

All contributors to leds/common.h file in copy.

Signed-off-by: Corvin Köhne <c.koehne@beckhoff.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Gergo Koteles <soyer@irl.hu>
Acked-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://patch.msgid.link/20260408062942.7128-1-corvin.koehne@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
2026-06-17 11:28:06 +01:00
Arnd Bergmann
8c3fb979f1 Memory controller drivers for v7.2
1. Tegra MC/EMC:
    - Handle system sleep, necessary to re-program registers after system
      resume.  A few more improvements.
    - Add Tegra114 and Tegra238 Memory Controller, and Tegra114 External
      MC support.
    - Grow Tegra264 support.
 
 2. Renesas XSPI: Document RZ/T2H and RZ/N2H variants, compatible with
    existing devices.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmocJvAQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD12oqD/9ZHp16XZjtzRt/vCz30Ch0u+ITMutvfM5I
 M7+fi0gXHEH5Hz+4qCf4RFduWqZKdP+35LJUKnk991hHY8GEcixO/UjB4br0B8Xt
 Jat2DlIaXUB+wO3oSsX03+IhxnXnoFOI8m30XKnBJcmjPvun28k5Wuf9yHY212JG
 /lt/oBWlugykXYm9McffQoN+kw30U+yTQKyur5DcpNb6ffAaLok03sNL+5uuCw3x
 iNzTWvFvTeI3K6N/lxl+nK/hLX6mWVdq2bKeXBD/XJaLJOAOiBnvxhu/lL6Tu7Ac
 viX1Rf64GR0FoxqtvMlgCUbcLcsRFLy6PkmioLaDD44fUFSdRvUEJ5sFk2UOTDKY
 vjS+sVQENV/4n7yIlmO85Q9qnj1X7Rri3oD678lyBh50QzmpUffOJdyC3B9VDywy
 uCl0P0PlY9/PrG5+G+5F712qI5ZtYh4KFy0I+ngsHnlgx0ao+mRydHl/2/5cINx/
 BOZUR7wazMRGnaKulUq1KG/nkIXozNFgFm9u+uk4/MWmh5hTFjKTM8N1jhvR4ood
 b9r6Iaxz/JJ61UC18NKI5xI9+xh49ps5LhLljsIgmYDvIwtVIpn4xd7QqIrlcIro
 89e7vQ5divObNuzeK+af5AkRKZxRE+UNvOfZRzx3jcblK3nYCnl48CzPEXwMHKMu
 NMJy92u5YA==
 =L+o1
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmooKOIACgkQmmx57+YA
 GNnI3RAAoxsXFxnO4Nwx3JmYaN0rB4sIV/USD1/YbiUj0Y4EJHoFqH02ZCR8Oh4M
 SJooxuBLjjA3R7aLHy+aPwtzC2wCqqVs3PLGgDoWDCka9Dlpk1mVH/2KK2uvawNu
 AP5YfwqbH5/D0NbQTatWbKtPspTVwmyt9AsA489aHpcqfFjCaVFU3czFE7d03Heb
 E0670r3TSqt6cMHK3suNi0tJcenP0hGaUhZEY20kdM4+o3q2N57mOMp3qkbn5kEG
 tNx9yMOIpmCSM95TcGe5yOJagTXJMd1LyivB4rxLaE3Xt3FrreVQJZAkoRb0KFYW
 Rf7usPK9/Dr4098/1vOrvTMj7l0insveI2kM/HTrruzlO5EADaLSsp2+h4RD6OwS
 Ee51iMMfynYHLdpVKu45/zRsjtdrQ4f2yvnbyF14laZyiWUF5c+BqxdZnCJ1H9cq
 MWup+HyBnATa0L9QREc00/KcBJhesR6iLfTH3L7afj5bcwOzXSkQ69l13+LKEgrf
 j2nR7/nDTg2dnxITqhr02ItpzRSqKnXPH9FozVs5ozjCg/mAzbISuQahddZLqyu8
 RVrfhXSsXLP05DGqaAbqHDytqkFZrDOpyUsyXwkkHKdZdJGvGMfK99ImpXWPWZqO
 o9mkPDDtPRNuKQRI1xLedyZqeVdMnmup6y5TQri+qV84OfkJVqk=
 =QdFA
 -----END PGP SIGNATURE-----

Merge tag 'memory-controller-drv-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers

Memory controller drivers for v7.2

1. Tegra MC/EMC:
   - Handle system sleep, necessary to re-program registers after system
     resume.  A few more improvements.
   - Add Tegra114 and Tegra238 Memory Controller, and Tegra114 External
     MC support.
   - Grow Tegra264 support.

2. Renesas XSPI: Document RZ/T2H and RZ/N2H variants, compatible with
   existing devices.

* tag 'memory-controller-drv-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: tegra264: Add full set of MC clients
  dt-bindings: memory: tegra264: Add full set of MC client IDs
  memory: tegra264: Skip clients without bpmp_id or type
  memory: renesas-rpc-if: Fix duplicate device name on multi-instance platforms
  dt-bindings: memory: renesas,rzg3e-xspi: Add RZ/T2H and RZ/N2H support
  memory: omap-gpmc: Silence W=1 kerneldoc warnings
  memory: tegra114-emc: Simplify tegra114_emc_interconnect_init() error message
  memory: tegra114-emc: Do not print error on icc_node_create() failure
  memory: tegra: Fix possible null pointer dereference
  memory: tegra: Add Tegra114 EMC driver
  memory: tegra: Implement EMEM regs and ICC ops for Tegra114
  dt-bindings: memory: Document Tegra114 External Memory Controller
  dt-bindings: memory: Document Tegra114 Memory Controller
  memory: tegra: Add Tegra238 MC support
  dt-bindings: memory: tegra: Add nvidia,tegra238-mc compatible
  memory: tegra: Restore MC interrupt masks on resume
  memory: tegra: Wire up system sleep PM ops
  memory: tegra: Make ->resume() callback return void
  memory: tegra: Deduplicate rate request management code
  memory: atmel-ebi: Allow deferred probing

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-06-09 16:53:10 +02:00
Krzysztof Kozlowski
91ee0f80cf Renesas DTS updates for v7.2 (take two)
- Add timer (MTU3) and xSPI FLASH support for the RZ/T2H and RZ/N2H
     SoCs and their EVK boards,
   - Add PCIe support for the RZ/V2N SoC and the RZ/V2N EVK board,
   - Add support for the R-Car M3Le SoC and the Geist development board,
   - Specify ethernet PHY reset timings on various R-Car boards,
   - Add (more) serial, I2C, DMA, and sound support for the RZ/G3L SoC,
   - Add PSCI, Multifunctional Interface (MFIS), and SCMI support for the
     R-Car X5H SoC and Ironhide development board,
   - Add serial DMA support for the RZ/G2L SoC,
   - Add keyboard, I2C, Versa clock, and audio support for the RZ/G3L
     SMARC SoM and EVK boards,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCah1IuAAKCRCKwlD9ZEnx
 cBZlAQC5g/OyC8m5v5ukI2/nNkQVE2AhvxJ19g11ZNGnnulTXwEAk6aw4+Pu793+
 6Sq3KyVKlbtIK24sap/tVFCaqaxK0wI=
 =BK85
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dts-for-v7.2-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v7.2 (take two)

  - Add timer (MTU3) and xSPI FLASH support for the RZ/T2H and RZ/N2H
    SoCs and their EVK boards,
  - Add PCIe support for the RZ/V2N SoC and the RZ/V2N EVK board,
  - Add support for the R-Car M3Le SoC and the Geist development board,
  - Specify ethernet PHY reset timings on various R-Car boards,
  - Add (more) serial, I2C, DMA, and sound support for the RZ/G3L SoC,
  - Add PSCI, Multifunctional Interface (MFIS), and SCMI support for the
    R-Car X5H SoC and Ironhide development board,
  - Add serial DMA support for the RZ/G2L SoC,
  - Add keyboard, I2C, Versa clock, and audio support for the RZ/G3L
    SMARC SoM and EVK boards,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v7.2-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (56 commits)
  arm64: dts: renesas: r9a08g046l48-smarc: Enable audio
  arm64: dts: renesas: rzg3l-smarc-som: Enable Versa clock generator
  arm64: dts: renesas: r9a08g046l48-smarc: Enable I2C{2,3} devices
  arm64: dts: renesas: r9a08g046l48-smarc: Add gpio keys
  arm64: dts: renesas: rzt2h-n2h-evk: Enable xSPI nodes
  arm64: dts: renesas: r9a09g087: Add xSPI nodes
  arm64: dts: renesas: r9a09g077: Add xSPI nodes
  arm64: dts: renesas: rzg3e-smarc-som: Sort GMAC pinmux entries
  arm64: dts: renesas: r8a779md: Add support for R-Car M3Le R8A779MD Geist
  arm64: dts: renesas: r9a07g044: Add DMA properties to serial nodes
  arm64: dts: renesas: r9a07g054: Add max-frequency to SDHI nodes
  arm64: dts: renesas: r9a07g044: Add max-frequency to SDHI nodes
  arm64: dts: renesas: r9a07g043: Add max-frequency to SDHI nodes
  arm64: dts: renesas: r9a08g046: Add rsci{0..3} device nodes
  arm64: dts: renesas: ironhide: Enable to use SCMI
  arm64: dts: renesas: r8a78000: Add MFIS, MFIS-SCP, and transport nodes
  arm64: dts: renesas: ironhide: Describe all reserved memory
  arm64: dts: renesas: rzt2h-n2h-evk: Configure eMMC/SDHI pins
  arm64: dts: renesas: r8a78000: Fix GIC-720AE View 1 Redistributor description
  arm64: dts: renesas: r8a78000: Add PSCI node
  ...

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-06-09 12:55:38 +02:00
Jagadeesh Kona
97a5e120be dt-bindings: clock: qcom: Add X1P42100 camera clock controller
Add X1P42100 camera clock controller support and clock bindings
for camera QDSS debug clocks which are applicable for both X1E80100
and X1P42100 platforms.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260507-purwa-videocc-camcc-v5-2-fc3af4130282@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-06-06 19:50:15 -05:00
Jagadeesh Kona
9ae38c6919 dt-bindings: clock: qcom: Add X1P42100 video clock controller
Add device tree bindings for the video clock controller on Qualcomm
X1P42100 (Purwa) SoC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260507-purwa-videocc-camcc-v5-1-fc3af4130282@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-06-06 19:50:15 -05:00
Linus Walleij
57ffabf5a1 ARM: tegra: Device tree changes for v7.2-rc1
The bulk of this is various improvements for some of the older ASUS and
 LG devices, but there's also support for interconnects on Tegra114 to
 help improve memory frequency scaling.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmobyh8ACgkQ3SOs138+
 s6GyKg//SkttJ6lDJYWZoc7rSDGMsshA4Dpys+BAb1WEdKraAyVZe9pe7YGxJ3GY
 gIuKYHItT3rOuDWJXcEpaHc+0IAePVvH5719KmVwE2yRuUSij9YQpDjDGTmfJXmz
 GknYUIT5mxIa96ldLL5lIUtRkUc6hWlHzdpOdWfY+5f2Pysny51HNS/rQHIMgZdI
 CwN69JZQ5WKZbXLeueeNK5MxJOqFYQ/dS032cnuftz+aEjwUBuTvMy58O5WU/a98
 YtgPpXi0WLFPTav4Do8JONHyn8hbBOkREt4t53GKoyIfoLmiZOU6tSlFb1WAIgWT
 26TdolyaOefWlGnOV4FAlY4QCM72dpW2nydMWiUDgWLKri9sxRWLEKzqrWm833D6
 0BDIySgmUmvnwmOkzVcZVkhLEFg1mJMhH4J4MSwpqMpTEpnNUNLjP8nyyQRpOuWW
 f/cfwPex9qDb77WNG3ExJPjREzvXxsNBKJkrJnojMzsyK3kraXsApPgYR2N07/cE
 XZavX2HMmKRnoNAIEGn+C3b8qX/4F+iHKeWoAt8J8qGx4EfhUcby3r024pWHHbgp
 Q7Tu0A/Lp+iYDEHRb+VjN9w2niF5Qq0oTSK0X5Altp3F83a/sIsi/V1wWV1RmHg2
 4A1deqXUryxZw8vqkovl0R5FuGv45IsfIaj81viLURAabdIdtiM=
 =yQew
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-7.2-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

ARM: tegra: Device tree changes for v7.2-rc1

The bulk of this is various improvements for some of the older ASUS and
LG devices, but there's also support for interconnects on Tegra114 to
help improve memory frequency scaling.

* tag 'tegra-for-7.2-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: tf600t: Invert accelerometer calibration matrix
  ARM: tegra: tf600t: Drop backlight regulator
  ARM: tegra: tf600t: Configure panel
  ARM: tegra: transformers: Add connector node for common trees
  ARM: tegra: transformer: Add support for front camera
  ARM: tegra: grouper: Add support for front camera
  ARM: tegra: p880: Lower CPU thermal limit
  ARM: tegra: lg-x3: Set PMIC's RTC address
  ARM: tegra: lg-x3: Complete video device graph
  ARM: tegra: Configure Tegra114 power domains
  ARM: tegra: Add DC interconnections for Tegra114
  ARM: tegra: Add EMC OPP and ICC properties to Tegra114 EMC and ACTMON device-tree nodes
  ARM: tegra: Add #{address,size}-cells to Chromium-based /firmware
  dt-bindings: memory: Document Tegra114 External Memory Controller
  dt-bindings: memory: Document Tegra114 Memory Controller

Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-06-03 14:13:41 +02:00
Kamal Wadhwa
5f0e408272 dt-bindings: power: qcom,rpmhpd: Add RPMh power domain for Nord SoC
Document the RPMh power domain for Nord SoC, and add definitions for
the new power domains present on Nord SoC.

 - RPMHPD_NSP3: power domain for the 4th NSP subsystem
 - RPMHPD_GFX1: power domain for the 2nd GFX subsystem

Signed-off-by: Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-06-03 10:56:40 +02:00
Shawn Guo
43a4b19c17 dt-bindings: power: qcom,rpmhpd: Fix whitespace in RPMHPD defines
Some RPMHPD_* defines in the Generic RPMH Power Domain Indexes section
were using spaces instead of tabs for alignment. Fix them to be
consistent with the rest of the file.

Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-06-03 10:56:40 +02:00
Linus Walleij
6a469016b8 Qualcomm Arm64 DeviceTree updates for v7.2
Introduce the Qualcomm IPQ9650 router/gateway platform and the RDP488
 board. Add support for the Motorola Edge 30 and the Nothing Phone.
 
 Describe the IPA block on the Agatti platform and missing OPP-levels for
 the video encoder/decoder.
 
 For Eliza, describe the QUP Serial Engines, GPI DMA, SDHCI, LLCC, IMEM,
 QCE crypto, ADSP remoteproc and USB nodes. Enable DSI panel,
 DisplayPort, USB, and ADSP support on the Eliza MTP.
 
 On Glymur enable ADSP and CDSP remoteprocs, FastRPC, crypto hardware,
 CPUfreq cooling devices, and coresight nodes. Enable the remoteprocs and
 the LID sensor on the Glymur CRD.
 
 Describe the CAN-FD controller found on the Hamoa EVK. Correct the
 DisplayPort controller OPP tables.
 
 Describe the watchdog on IPQ5210 and IPQ9650.
 
 Describe USB controller and PHYs for the Kaanapali platform and enable
 basic USB support on the MTP and QRD devices.
 
 Enable the second display subsystem on Lemans and use this to enable
 additional DisplayPort outputs on the Lemans Ride board, and IFP
 mezzanine for the EVK. Also enable the GPIO expander on the Lemans EVK
 to get the CAN signals out.
 
 Add crypto hardware and qfprom nodes on Milos. Reduce the remotefs
 shared memory size to avoid sanity checks in the modem firmware
 rejecting the region.
 Enable the vibrator on FairPhone FP6.
 
 Add GPSDP FastRPC support on Monaco, and describe the Bluetooth
 controller on the Arduino VENTUNO Q board.
 
 Introduce an EL2 overlay for the Purwa IoT EVK.
 
 Enable CAN bus controller on QCS6490 RB3gen2 and add a remotefs node.
 
 Enable FastRPC on the SC8280XP ADSP.
 
 Correct SDM630 and SDM660 ADSP FastRPC channel ids. Also add the ADSP
 memory region on SDM630.
 
 On SDM845 devices, enable NFC on Google Pixel 3, OnePlus 6, OnePlus 6T,
 and SHIFT SHIFT6mq. Enable camera flash on LG devices. Rework the
 framebuffer description on Samsung, SHIFT and Xiaomi devices. Enable
 camera flash on LG devices. Fix Bluetooth and WiFi on LG and Xiaomi
 devices.
 
 Enable MDSS and the display panel on Xiaomi Mi A3.
 
 Scale L3 and DDR clock votes based on CPUfreq selection.
 
 Enable camera clock controller, cpufreq cooling devices, and correct the
 DSI1 reference clock on SM8750.
 
 On the Talos platform, describe the QSPI support, GPR and audio
 services, and enable sound on the EVK target. Enable QSPI and describe
 the SPINOR on this bus, on the QCS615 Ride.
 
 Describe power-domain and iface clock for the Inline Crypto Engine (ICE)
 across various platforms.
 
 Fix the Bluetooth RFA supply name across a variety of devices.
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmoV0HcOHGJqb3JuQGty
 eW8uc2UACgkQCx85Pw2ZrcXDFxAAuy0V54AzLH2CRpsvTC2YshlV0zPj10fF0s4w
 PNPJ1RL+ZulmO7oVGzpQBLQBF8q6f4rl3sonF0syVtkY8X7V0nNR9+n7fRYLQvi3
 Wh7/kOJXLzjtSDmv2xhuv5PjanXk8AZlHfq9vczyZAB/PXRH7rKHVidjEVSO4n7L
 KErKQ+F8HoPFbXH5MuQUJYp12BCklTHWfrurmfMTNV41sPGVJ1neNEcgdRFHCO8P
 5jgyWJGU380BjnY09rswX7S94+7NOa7E6JWuVWyP1b4Jzg4bQt/B897evTRt87zg
 5AH6RcSAqhPiYXyeMbB+qqgwmPxIPrprDXkdFrqOarE/sk4DZVLqf492No7n38QN
 hgy+gfeBjIRQkNi/8AJf1lpul+Sd/fvbNrMP2193iGBfBeQYjCHaP2fXvaXA92KC
 xvNJKKQBh5CYBbkYrhtypH4oAzZUZkdPWT13x4isVMlYUiJ+kHr2fL4H/CPPpoPo
 pJuPzZprs1FMXHZNl9x8jAdACoyb9myMNFT6zKEBotdXdFQtMlZCfJyorJsgpabe
 94Pa30qEAwnn39Y6DcHWruFUDAWC/2XmoPQ4GFDJPNx+6z+3rFiYCgLRCrxkQylg
 ZC0XkRWrt0fjy9f3wpmGbEZuEaX373r408gEzT8u8MUPOCSO6/+6bBMUynGC4Vl3
 dTlvPi0=
 =+ctB
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm Arm64 DeviceTree updates for v7.2

Introduce the Qualcomm IPQ9650 router/gateway platform and the RDP488
board. Add support for the Motorola Edge 30 and the Nothing Phone.

Describe the IPA block on the Agatti platform and missing OPP-levels for
the video encoder/decoder.

For Eliza, describe the QUP Serial Engines, GPI DMA, SDHCI, LLCC, IMEM,
QCE crypto, ADSP remoteproc and USB nodes. Enable DSI panel,
DisplayPort, USB, and ADSP support on the Eliza MTP.

On Glymur enable ADSP and CDSP remoteprocs, FastRPC, crypto hardware,
CPUfreq cooling devices, and coresight nodes. Enable the remoteprocs and
the LID sensor on the Glymur CRD.

Describe the CAN-FD controller found on the Hamoa EVK. Correct the
DisplayPort controller OPP tables.

Describe the watchdog on IPQ5210 and IPQ9650.

Describe USB controller and PHYs for the Kaanapali platform and enable
basic USB support on the MTP and QRD devices.

Enable the second display subsystem on Lemans and use this to enable
additional DisplayPort outputs on the Lemans Ride board, and IFP
mezzanine for the EVK. Also enable the GPIO expander on the Lemans EVK
to get the CAN signals out.

Add crypto hardware and qfprom nodes on Milos. Reduce the remotefs
shared memory size to avoid sanity checks in the modem firmware
rejecting the region.
Enable the vibrator on FairPhone FP6.

Add GPSDP FastRPC support on Monaco, and describe the Bluetooth
controller on the Arduino VENTUNO Q board.

Introduce an EL2 overlay for the Purwa IoT EVK.

Enable CAN bus controller on QCS6490 RB3gen2 and add a remotefs node.

Enable FastRPC on the SC8280XP ADSP.

Correct SDM630 and SDM660 ADSP FastRPC channel ids. Also add the ADSP
memory region on SDM630.

On SDM845 devices, enable NFC on Google Pixel 3, OnePlus 6, OnePlus 6T,
and SHIFT SHIFT6mq. Enable camera flash on LG devices. Rework the
framebuffer description on Samsung, SHIFT and Xiaomi devices. Enable
camera flash on LG devices. Fix Bluetooth and WiFi on LG and Xiaomi
devices.

Enable MDSS and the display panel on Xiaomi Mi A3.

Scale L3 and DDR clock votes based on CPUfreq selection.

Enable camera clock controller, cpufreq cooling devices, and correct the
DSI1 reference clock on SM8750.

On the Talos platform, describe the QSPI support, GPR and audio
services, and enable sound on the EVK target. Enable QSPI and describe
the SPINOR on this bus, on the QCS615 Ride.

Describe power-domain and iface clock for the Inline Crypto Engine (ICE)
across various platforms.

Fix the Bluetooth RFA supply name across a variety of devices.

* tag 'qcom-arm64-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (131 commits)
  arm64: dts: qcom: add support for pixel 3a xl with the tianma panel
  arm64: dts: qcom: sdm670-google: add common device tree include
  arm64: dts: qcom: hamoa-iot-evk: add MCP2518FD CAN on spi18
  arm64: dts: qcom: sm8750: allow mode-switch events to reach the QMP Combo PHY
  arm64: dts: qcom: sc8280xp: drop unused polling-delay-passive properties
  arm64: dts: qcom: ipq5210: add watchdog node
  arm64: dts: qcom: sdm845-xiaomi-beryllium: Correct IPA FW path
  arm64: dts: qcom: monaco-arduino-monza: Add Bluetooth UART node
  arm64: dts: qcom: glymur: Add qfprom efuse node
  arm64: dts: qcom: milos: Add qfprom efuse node
  arm64: dts: qcom: glymur: add coresight nodes
  arm64: dts: qcom: qcs6490-rb3gen2: add rmtfs node
  arm64: dts: qcom: lemans-evk: Enable CAN RX via I2C GPIO expander
  arm64: dts: qcom: glymur: Fix wrong interrupt number for i2c19
  arm64: dts: qcom: Drop unused remoteproc_adsp_glink label
  arm64: dts: qcom: lemans: Add eDP ref clock for eDP PHYs
  arm64: dts: qcom: sm8750: Add power-domain and iface clk for ice node
  arm64: dts: qcom: sm8650: Add power-domain and iface clk for ice node
  arm64: dts: qcom: sm8550: Add power-domain and iface clk for ice node
  arm64: dts: qcom: sm8450: Add power-domain and iface clk for ice node
  ...

Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-06-02 10:53:32 +02:00
Yixun Lan
7a2db70a31 dt-bindings: soc: spacemit: k3: Add PCIe DBI clock IDs
Add clock IDs of PCIe DBI (Data Bus Interface) clock.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260511-06-pci-clk-fix-v2-3-c9a5e563bab3@kernel.org
Signed-off-by: Yixun Lan <dlan@kernel.org>
2026-06-02 07:16:59 +00:00
Geert Uytterhoeven
556304bddb Renesas R-Car X5H MFIS DT Binding Definitions
DT bindings and binding definitions for the Renesas R-Car X5H (R8A78000)
 Multifunctional Interface (MFIS), shared by driver and DT source files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCafhrNgAKCRCKwlD9ZEnx
 cEYxAQD75qANLTBGvyEIvcSjM099aebREw0CoFgrbhSZ8S/cMwD9H3DjKC1nEcdt
 Ai6vhFqT6Ps8BILUCPB84VDHj++zOw0=
 =iPDZ
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r8a78000-dt-binding-defs-tag1' into renesas-dts-for-v7.2

Renesas R-Car X5H MFIS DT Binding Definitions

DT bindings and binding definitions for the Renesas R-Car X5H (R8A78000)
Multifunctional Interface (MFIS), shared by driver and DT source files.
2026-05-31 10:52:05 +02:00
Arnd Bergmann
b6a6fae6c5 Qualcomm driver updates for v7.2
Enable QSEECOM and with that access to UEFI variables on the Surface Pro
 12in laptop.
 
 Refactor the Geni Serial-Engine helper code to allow the serial engine
 drivers (such as I2C) to operate on targets where power and performance
 is controlled through an SCMI server instead of individual resources in
 Linux.
 
 Extend the LLCC driver to support reading its data from a System Cache
 Table (SCT) in memory instead of being hard coded per platform in the
 driver. Also add support for the Eliza platform.
 
 Add support for the Hawi platform to pd-mapper.
 
 Switch the SMEM driver to track partitions using xarray to handle the
 ever growing number of hosts better.
 
 Extend the socinfo driver with knowledge about the Nord, SM7750,
 IPQ9650, and Shikra SoCs, as well as PMAU0102, PMC1020H, PMIV0102, and
 PMIV0104 PMICs.
 
 Define UBWC 3.1 and add a couple of convenient helpers in the UBWC
 library for MDSS and Adreno.
 
 Fix a memory leak in the WCNSS firmware download mechanism.
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmoVuSUOHGJqb3JuQGty
 eW8uc2UACgkQCx85Pw2ZrcUJoBAAxf+8fFvYZif2gk1wzA01IINQgB5/2gYu9oSW
 Ex4YrHF2wV3BlzRjDnoQ9yC9mYyQeAwqy0pHPIEhJrh5pTc7sJLH5P+iXwe0JU2e
 GD6WtxRlSswIhDcmoJokSWNkyQxGu540Mh140/Bd0Pb0tMelh76wmzcpY31tzDOa
 APmtPCXWOdMGYAJSA5DMUMlKEENBNuD7yg0sYtoNz4+XVv4nsjMviEspyNN/fWHg
 UvL7IJPFwiKynsYrohTgFS5spXOR79aR1xPVsujoUVhzV/W0NFXiDgGLZa41QBAJ
 lfqmxQiNCZ6I3n2R4X1OULXy9vLZalLiXQzMOJhvPbjXjW1R6jy40f5+W9SZnNSH
 Q33nbkpJWG81gN5GeqwdPi1+gDDIMyw4A3+RaqRPJBYkYzG1NU2YD5ZNFpMrfRta
 BT0Nzs8wdmMQgHDGXhjuzMC1hrm9b8QOT12GUnm2hcL7DIJsJC2mtLmlrvnQSm8y
 3iPDrEhok2GzSXOKs1EkRfennjLG2MM54Bv7WosNJjrQi2FWkwU2OeNavDxkHo4G
 JTWwOPFoRysHqmqLr9aIvQGV9lQ2W+57CqnjrbVeMNclJNUm0usZX/i3zX9jCG7R
 SGwdslqlE/PqJWjUN8S/+LECI54axJXlp3KE6+m+nkEsOQcYIxwU/PfZiG1vyJu1
 0Y22gro=
 =mOpO
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmoaDQQACgkQmmx57+YA
 GNm/KxAAumqFwdnLIK37ui8u3FG1he/Pal9RwXR0dJkLTAYmCK5vd/e/GEjTL0BG
 W2Zv+Gt1kvm0BZ10b7AaQNKx5jnE7AsglOTHXXW8pVmZW7w1Fz8CP96SiZz2iKb0
 Fqpuq8utUg7fxYzYZuPGMWNQVSf0dliZrygp8iTHop/2iaJzL/dOQHBtXSXvuJVW
 FhCYtaDIBXpLzbFpe8z+QMM5bYmgiIF8zqdmOSe92LYVVWv1WNzflu8+fGDCxv9z
 EhsLdkM62xCR2a5YE0Tx0/44hw6sGh7ffnfkkIrEJvIBtkjxoERc0TRGXcvTeUnp
 bX4H1d/kanzvUu+0KrP+fxiCQL1DmiUi8SOEFx0YUSrBSp0HtIdgVyLxM6Q0UYdc
 JP95xqb/SfvVGRf3FFrP8NlIwM7n8NGpV8PqUnQ0K+NVUnsQWPJPZ+lkyCjX6G3b
 pXR/eSe4OBu3xjUAB2x7r0YQbEjlB1FeVQEA5lRdlW5QSzty/kLgUm/z+4rLQSq1
 Zmw9rL28SnlOsoESF0/EAgNUTFfG+cA1wERwa9BdQbb3CzWxKU6QsAInL6ZEp1xI
 eTtGI+ia9yUv4pzMOiuv00seQQ2A45Qww6xkgsM2n0wbP1Bza9Rrkc1w9exK36ho
 JZkQ773gwyEYyRfHoobYyFRYtMve4JOWCjGjL5F3Gtw3YddABXU=
 =ryJr
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v7.2

Enable QSEECOM and with that access to UEFI variables on the Surface Pro
12in laptop.

Refactor the Geni Serial-Engine helper code to allow the serial engine
drivers (such as I2C) to operate on targets where power and performance
is controlled through an SCMI server instead of individual resources in
Linux.

Extend the LLCC driver to support reading its data from a System Cache
Table (SCT) in memory instead of being hard coded per platform in the
driver. Also add support for the Eliza platform.

Add support for the Hawi platform to pd-mapper.

Switch the SMEM driver to track partitions using xarray to handle the
ever growing number of hosts better.

Extend the socinfo driver with knowledge about the Nord, SM7750,
IPQ9650, and Shikra SoCs, as well as PMAU0102, PMC1020H, PMIV0102, and
PMIV0104 PMICs.

Define UBWC 3.1 and add a couple of convenient helpers in the UBWC
library for MDSS and Adreno.

Fix a memory leak in the WCNSS firmware download mechanism.

* tag 'qcom-drivers-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (40 commits)
  soc: qcom: geni-se: Introduce helper APIs for performance control
  soc: qcom: geni-se: Introduce helper API for attaching power domains
  soc: qcom: geni-se: Add resources activation/deactivation helpers
  soc: qcom: geni-se: Handle core clk in geni_se_clks_off() and geni_se_clks_on()
  soc: qcom: geni-se: Introduce helper API for resource initialization
  soc: qcom: geni-se: Add geni_icc_set_bw_ab() function
  soc: qcom: geni-se: Refactor geni_icc_get() and make qup-memory ICC path optional
  soc: qcom: llcc-qcom: Fix NULL vs IS_ERR() bug in qcom_llcc_get_fw_config()
  soc: qcom: llcc-qcom: Add support for Eliza
  dt-bindings: cache: qcom,llcc: Document Eliza LLCC block
  soc: qcom: ubwc: add helper controlling AMSBC enablement
  soc: qcom: ubwc: define helper for MDSS and Adreno drivers
  soc: qcom: ubwc: define UBWC 3.1
  soc: qcom: socinfo: Add SoC ID for Nord SA8797P
  dt-bindings: arm: qcom,ids: Add SoC ID for Nord SA8797P
  soc: qcom: socinfo: Add SoC ID for SM7750
  dt-bindings: arm: qcom,ids: Add SoC ID for SM7750
  soc: qcom: socinfo: Add PMIC PMAU0102
  soc: qcom: socinfo: Add PMIV0102 & PMIV0104 PMICs
  firmware: qcom: scm: Allow QSEECOM on Surface Pro 12in
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-05-30 00:02:42 +02:00
Sumit Gupta
16868fd4b7 dt-bindings: memory: tegra264: Add full set of MC client IDs
Add the complete set of TEGRA264_MEMORY_CLIENT_* IDs exposed by the
Tegra264 MC.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Link: https://patch.msgid.link/20260518124306.2071481-3-sumitg@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-05-27 14:50:18 +02:00
Jun Yan
820017813b dt-bindings: gpio: meson-axg: Fix whitespace issue
Clean up whitespace misalignment in meson-axg-gpio.h

Signed-off-by: Jun Yan <jerrysteve1101@gmail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260524154954.385778-1-jerrysteve1101@gmail.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-05-26 10:02:53 +02:00
Linus Walleij
5b1c4d88e1 pinctrl: renesas: Updates for v7.2
- Save/restore more registers during suspend/resume on the RZ/G2L and
     RZ/V2H SoC families,
   - Add support for the RZ/G3L (R9A08G046) SoC,
   - Add support for pinconf-groups in debugfs on EMMA Mobile,
     SH/R-Mobile, R-Car, RZ/G1, and RZ/G2 SoCs,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCagw1GQAKCRCKwlD9ZEnx
 cPOTAP9kh/jlCmzpkS4/htuQZdR8/v842rI2/yZ0Lu3SulIG/wEAwAHS58q2j7sq
 Dtl4w8qttYqaxVdeet6QdLDECGsGJA0=
 =86Ux
 -----END PGP SIGNATURE-----

Merge tag 'renesas-pinctrl-for-v7.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v7.2

  - Save/restore more registers during suspend/resume on the RZ/G2L and
    RZ/V2H SoC families,
  - Add support for the RZ/G3L (R9A08G046) SoC,
  - Add support for pinconf-groups in debugfs on EMMA Mobile,
    SH/R-Mobile, R-Car, RZ/G1, and RZ/G2 SoCs,
  - Miscellaneous fixes and improvements.

Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-05-23 10:46:52 +02:00
Bartosz Golaszewski
d62b0e3104 dt-bindings: clock: qcom: add the definition for the USB2 PHY reset
Provide the USB2 PHY reset definition in dt-bindings for the Nord negcc
module in order to enable adding the USB nodes in DTS.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260518-nord-clk-usb2-phy-v2-1-17a86cb307c3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 21:54:09 -05:00
Georgi Djakov
0d0a40e3f8 Merge branch 'icc-hawi' into icc-next
Add interconnect bindings and RPMh-based interconnect
driver support for the upcoming Qualcomm Hawi SoC.

* icc-hawi
  dt-bindings: interconnect: qcom-bwmon: Add Hawi cpu-bwmon compatible
  dt-bindings: interconnect: qcom-bwmon: Add Hawi llcc-bwmon compatible
  dt-bindings: interconnect: qcom: document the RPMh NoC for Hawi SoC
  interconnect: qcom: add Hawi interconnect provider driver

Link: https://patch.msgid.link/20260506-icc-hawi-v4-0-35447fdc482b@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-21 22:52:10 +03:00
Vivek Aknurwar
07548b04dc dt-bindings: interconnect: qcom: document the RPMh NoC for Hawi SoC
Document the RPMh Network-On-Chip interconnect for the Qualcomm Hawi SoC.

Reviewed-by: Mike Tipton <mike.tipton@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
Link: https://patch.msgid.link/20260506-icc-hawi-v4-1-35447fdc482b@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-21 22:51:30 +03:00
Georgi Djakov
67a4412db0 Merge branch 'icc-eliza' into icc-next
Add the missing Eliza SDCC1 interconnect slave ID and provider node.

The Eliza interconnect binding and provider already describe SDCC2, but
the matching SDCC1 CNOC CFG slave was left out. Add the binding constant
and the provider node so consumers can describe SDCC1 bandwidth paths.

The provider change also adds qhs_sdc1 to qsm_cfg and bcm_cn0, and updates
the qsm_cfg link count and bcm_cn0 node count.

* icc-eliza
  dt-bindings: interconnect: qcom,eliza-rpmh: Add SDCC1 slave
  interconnect: qcom: eliza: Add SDCC1 slave node

Link: https://patch.msgid.link/20260514-eliza-interconnect-add-missing-sdcc1-slave-node-v2-0-13c03bc890cb@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-21 20:58:17 +03:00
Georgi Djakov
21f951515a Merge branch 'icc-nord' into icc-next
This adds RPMh-based interconnect support for the Qualcomm Nord SoC.

The Nord SoC features a rich Network-on-Chip topology comprising 19 NoCs
including aggregate NoCs, a high-speed configuration NoC (HSCNOC), a
multimedia NoC, four NSP data NoCs for AI/ML workloads, PCIe inbound and
outbound NoCs, a system NoC, and virtual clock/MC nodes. Bandwidth requests
are communicated to the RPMh hardware through Bus Clock Manager (BCM)
resources via the Resource State Coordinator (RSC).

* icc-nord
  dt-bindings: interconnect: Document RPMh Network-On-Chip for Qualcomm Nord SoC
  interconnect: qcom: Add interconnect provider driver for Nord SoC

Link: https://patch.msgid.link/20260510020607.1129773-1-shengchao.guo@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-21 20:57:37 +03:00
Xukai Wang
44730eac17 dt-bindings: clock: Add Canaan K230 clock controller
This patch adds the Device Tree binding for the clock controller
on Canaan k230. The binding defines the clocks and the required
properties to configure them correctly.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xukai Wang <kingxukai@zohomail.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2026-05-21 10:55:12 +01:00
Deepti Jaggi
0670a10b7c dt-bindings: arm: qcom,ids: Add SoC ID for Nord SA8797P
Nord is a SoC family from Qualcomm designed as the next generation of
Lemans series. SA8797P is the automotive variant of Nord, where platform
resources such as clocks, regulators, interconnects, etc. are managed
by firmware through SCMI.

Add SoC ID for Nord SA8797P.

Signed-off-by: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260427003531.229671-2-shengchao.guo@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18 22:39:36 -05:00
Alexander Koskovich
5073d28465 dt-bindings: arm: qcom,ids: Add SoC ID for SM7750
Document the ID for SM7750, an Eliza SoC variant that can be found on
the Nothing Phone (4a) Pro.

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260412-sm7550-id-v1-1-958a673ff791@pm.me
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18 22:39:05 -05:00
Prathamesh Shete
4002ccd266 dt-bindings: gpio: Add Tegra238 support
Extend the existing Tegra186 GPIO controller device tree bindings with
support for the GPIO controllers found on Tegra238. Tegra238 has two
GPIO controllers: the main controller and always-on (AON) controller.
The number of pins is slightly different, but the programming model
remains the same.

Add a new header, include/dt-bindings/gpio/nvidia,tegra238-gpio.h,
that defines port IDs as well as the TEGRA238_MAIN_GPIO() helper,
both of which are used in conjunction to create a unique specifier
for each pin.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260514124835.108532-1-pshete@nvidia.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-05-18 11:12:01 +02:00
Geert Uytterhoeven
0b044b2a56 Renesas R-Mobile APE6 Coresight Clock DT Binding Definitions
ZT trace bus and ZTR trace clock DT binding definitions for the Renesas
 R-Mobile APE6 (R8A73A4) SoC, shared by driver and DT source files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCagbnIwAKCRCKwlD9ZEnx
 cGvdAQD/8tsnjjliydMS0pZgkTKr4ScdoLoFTmWg9HI/Txm9MgEAy8bxK5aPDS2u
 vkPu8MO7LeFmCNAEh7xS91mvIk/9vgU=
 =Jreu
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r8a73a4-dt-binding-defs-tag1' into renesas-dts-for-v7.2

Renesas R-Mobile APE6 Coresight Clock DT Binding Definitions

ZT trace bus and ZTR trace clock DT binding definitions for the Renesas
R-Mobile APE6 (R8A73A4) SoC, shared by driver and DT source files.
2026-05-15 11:35:13 +02:00
Marek Vasut
2abdc3dcf9 dt-bindings: clock: renesas,cpg-clocks: Document ZT/ZTR trace clock on R-Mobile APE6
Document the ZT trace bus and ZTR trace clocks on R-Mobile APE6.  These
clocks supply the coresight tracing modules, PTM, TPIU, ETB and
replicator.  Without these clocks, coresight tracing can not be
operated.  While this does change the ABI, it does so by extending the
existing clock-output-names, therefore if old software is used with new
DT, the coresight tracing parts will likely fail to probe, otherwise if
new software is used with an old DT, there is no impact.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260502185557.93061-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-15 11:26:26 +02:00
Abel Vesa
8549642259 dt-bindings: interconnect: qcom,eliza-rpmh: Add SDCC1 slave
The Eliza RPMh interconnect binding is missing the SDCC1 CNOC CFG
slave ID. Add it so SDCC1 consumer can describe the corresponding
interconnect path.

Append the new ID to preserve the existing ABI values.

Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260514-eliza-interconnect-add-missing-sdcc1-slave-node-v2-1-13c03bc890cb@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-15 10:21:06 +03:00
Vivek Aknurwar
d6cd9d5692 dt-bindings: clock: qcom: Add Hawi global clock controller
Add device tree bindings for the global clock controller on the
Qualcomm Hawi SoC.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Mike Tipton <mike.tipton@oss.qualcomm.com>
Signed-off-by: Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260506-clk-hawi-v3-3-530b538679f1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-13 11:52:46 -05:00
Vivek Aknurwar
eb340b092d dt-bindings: clock: qcom: Add Hawi TCSR clock controller
Add bindings documentation for TCSR clock controller on the
Qualcomm Hawi SoC.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Mike Tipton <mike.tipton@oss.qualcomm.com>
Signed-off-by: Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260506-clk-hawi-v3-2-530b538679f1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-13 11:52:46 -05:00
Vivek Aknurwar
bc98435652 dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for Hawi
Update documentation for the RPMH clock controller on the
Qualcomm Hawi SoC.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Mike Tipton <mike.tipton@oss.qualcomm.com>
Signed-off-by: Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260506-clk-hawi-v3-1-530b538679f1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-13 11:52:46 -05:00
Bjorn Andersson
0e5f38b892 Merge branch '20260106-qcom_ipq5332_cmnpll-v2-2-f9f7e4efbd79@oss.qualcomm.com' into clk-for-7.2
Merge the introduction of qcom,ipq5332-cmn-pll DeviceTree binding
through a topic branch, to make it available to DeviceTree source tree
as well.
2026-05-12 15:31:33 -05:00
Luo Jie
35e3509b63 dt-bindings: clock: qcom: Add CMN PLL support for IPQ5332 SoC
Add device tree bindings for the CMN PLL block in IPQ5332 SoC, which shares
similarities with IPQ9574 but has different output clock frequencies.

Add a new header file to export CMN PLL output clock specifiers for IPQ5332
SoC.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Luo Jie <jie.luo@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260106-qcom_ipq5332_cmnpll-v2-2-f9f7e4efbd79@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-12 15:31:20 -05:00
Geert Uytterhoeven
fdbf2cfbac Renesas RZ/G3L DT Pin Control Binding Definitions
Pin Control DT bindings and binding definitions for the Renesas RZ/G3L
 (R9A08G046) SoC, shared by driver and DT source files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCagGbvwAKCRCKwlD9ZEnx
 cFqvAQCHXu26Wa1NofTCjZkXFWDCCDv5Mku42tZdgy4FxAipagEArInzwVlKhr5u
 q9YGJ0ayxbfRpSSEyoNNTNojkXEyJw8=
 =bHGM
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r9a08g046-dt-binding-defs-tag2' into renesas-dts-for-v7.2

Renesas RZ/G3L DT Pin Control Binding Definitions

Pin Control DT bindings and binding definitions for the Renesas RZ/G3L
(R9A08G046) SoC, shared by driver and DT source files.
2026-05-12 11:51:51 +02:00
Bjorn Andersson
da8d82b8b6 Merge branch '20260507-ipq9650_boot_to_shell-v3-1-62742b49c991@oss.qualcomm.com' into arm64-for-7.2
Merge the QCS9650 GCC DeviceTree binding from topic branch, to get
access to clock and reset constants.
2026-05-11 18:14:18 -05:00
Kathiravan Thirumoorthy
f92b778251 dt-bindings: clock: add Qualcomm IPQ9650 GCC
Add binding for the Qualcomm IPQ9650 Global Clock Controller.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260507-ipq9650_boot_to_shell-v3-1-62742b49c991@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-11 18:13:21 -05:00
Luca Leonardo Scorcia
0942cdb8f4 dt-bindings: pinctrl: mediatek,mt65xx: Add MT6392 pinctrl
Add a compatible for the pinctrl device of the MT6392 PMIC, a variant of
the already supported MT6397.

Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-05-11 22:12:10 +02:00
Biju Das
43d2cd6f61 dt-bindings: pinctrl: renesas: Document RZ/G3L SoC
Add documentation for the pin controller found on the Renesas RZ/G3L
(R9A08G046) SoC. The RZ/G3L PFC is similar to the RZ/G3S SoC but has
more pins.

Also add header file similar to RZ/G3E and RZ/V2H as it has alpha
numeric ports.

Document renesas,clonech property for controlling clone channel
control register located on SYSC IP block on RZ/G3L SoC.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260430093422.74812-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-11 11:03:50 +02:00
Odelu Kukatla
8d315860b5 dt-bindings: interconnect: Document RPMh Network-On-Chip for Qualcomm Nord SoC
Add RPMh Network-On-Chip interconnect bindings for Qualcomm Nord SoC.

Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Link: https://patch.msgid.link/20260510020607.1129773-2-shengchao.guo@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-10 12:12:04 +03:00
Raviteja Laggyshetty
0f90f883b3 dt-bindings: interconnect: document the RPM Network-On-Chip interconnect in Shikra SoC
Document the RPM Network-On-Chip Interconnect for the Qualcomm
Shikra platform.

Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Link: https://patch.msgid.link/20260505-shikra_icc-v3-1-8e03ff27c007@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-10 12:11:05 +03:00
Kathiravan Thirumoorthy
8baf66cc4c dt-bindings: arm: qcom,ids: add SOC IDs for IPQ9650 family
Add SoC IDs for Qualcomm's IPQ9650 family.

Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260408-ipq9650_soc_ids-v1-1-e76faac33f77@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-09 10:32:41 -05:00
Nickolay Goppen
db6ae6650c dt-bindings: firmware: qcom: scm: add CP_ADSP_SHARED VMID
CP_ADSP_SHARED is used in FastRPC driver for older SoC's such as sdm660
for interacting with ADSP memory region [1]

[1]: https://github.com/xiaomi-sdm660/android_kernel_xiaomi_sdm660/blob/11-EAS/drivers/char/adsprpc.c#L3602

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Nickolay Goppen <setotau@mainlining.org>
Link: https://lore.kernel.org/r/20260429-qcom-sdm660-cdsp-adsp-fastrpc-dts-fix-v5-1-16bc82e622ad@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-09 10:01:24 -05:00
Komal Bajaj
928f6a0b1d dt-bindings: arm: qcom,ids: Add SoC ID for Shikra IoT variants
Document the IDs used by Shikra SoC IoT variants:
- CQ2390M: Shikra Retail with modem
- CQ2390S: Shikra Retail without modem
- IQ2390S: Shikra Industrial without modem

Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260428-shikra-socid-v1-1-6ff16bad5ea2@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-09 10:00:12 -05:00
Krzysztof Kozlowski
b42834da6f Merge branch 'for-v7.2/tegra114-mc-bindings' into mem-ctrl-next 2026-05-04 20:46:50 +02:00
Svyatoslav Ryhel
b0822a8834 dt-bindings: memory: Document Tegra114 Memory Controller
Add Tegra114 support into existing Tegra124 MC schema with the most
notable difference in the amount of EMEM timings.

Each memory client has unique hardware ID, add these IDs.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20260427070312.81679-2-clamor95@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-05-04 20:45:46 +02:00
Ashish Mhetre
bf7cf25d42 dt-bindings: memory: tegra: Add nvidia,tegra238-mc compatible
Document the device tree binding for the Tegra238 memory controller.
Tegra238 has 8 memory controller channels plus broadcast and stream-id
registers.

Add the stream ID header (nvidia,tegra238-mc.h) defining ISO and NISO
stream IDs for SMMU configuration.

Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260427073419.567360-2-amhetre@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-05-04 19:26:49 +02:00
Wolfram Sang
0f63ba15dd dt-bindings: soc: renesas: Document MFIS IP core
Document the Renesas Multifunctional Interface (MFIS) as found on the
Renesas R-Car X5H (r8a78000) SoC. MFIS includes features like Mailbox/HW
Spinlock/Product Register/Error Injection/Error Detection and the likes.
Family-compatible values are not introduced here because MFIS is usually
very different per SoC.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260402112709.13002-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-04 11:38:02 +02:00
Daniele Briguglio
56c2ca0ae7 dt-bindings: clock: rockchip,rk3588-cru: add I2S MCLK output to IO clock IDs
Add clock identifiers for the four I2S MCLK output to IO gate clocks
on RK3588, needed by board DTS files where the codec requires MCLK
from the SoC on an external IO pin.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Daniele Briguglio <hello@superkali.me>
Tested-by: Ricardo Pardini <ricardo@pardini.net>
Link: https://patch.msgid.link/20260419-rk3588-mclk-gate-grf-v4-1-513a42dd1dcc@superkali.me
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-04-27 13:31:42 +02:00
Marek Vasut
c9c008754a dt-bindings: clock: renesas,cpg-clocks: Document ZT/ZTR trace clock on R-Mobile A1
Document the ZT trace bus and ZTR trace clocks on R-Mobile A1.  These
clocks supply the coresight tracing modules, PTM, TPIU, ETB and
replicator.  Without these clocks, coresight tracing can not be
operated.  While this does change the ABI, it does so by extending the
existing clock-output-names, therefore if old software is used with new
DT, the coresight tracing parts will likely fail to probe, otherwise if
new software is used with an old DT, there is no impact.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260422233744.149872-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-04-27 11:46:44 +02:00
Linus Torvalds
4ee64205ff We've finally gotten rid of the struct clk_ops::round_rate() code after months
of effort from Brian Masney. Now the only option is to use determine_rate(),
 which is good because that takes a struct argument instead of just a couple
 unsigned longs, allowing us to easily modify the way we determine and set rates
 in the clk tree.
 
 Beyond that core framework change we've got the typical pile of new SoC clk
 driver additions, fixes for clk data and/or adding missing clks because the
 consumer driver using those clks wasn't ready, etc. The usual suspects are all
 here: Qualcomm, Samsung, Mediatek, and Rockchip along with some newcomers
 making RISC-V SoCs like ESWIN's eic700 and Tenstorrent's Atlantis. The clk
 driver side of this looks pretty normal.
 
 Core:
  - Remove the round_rate() clk op (yay!)
 
 New Drivers:
  - ESWIN eic700 SoC clk support
  - Econet EN751221 SoC clock/reset support
  - Global TCSR, RPMh, and display clock controller support for
    the Qualcomm Eliza platform
  - TCSR, the multiple global, and the RPMh clock controller
    support for the Qualcomm Nord platform
  - GPU clock controller support for Qualcomm SM8750
  - Video and GPU clock controller support for Qualcomm Glymur
  - Global clock controller support for Qualcomm IPQ5210
  - Axis ARTPEC-9: Add new PLL clocks and new drivers for eight clock
    controllers on the SoC
  - ExynosAutov920: Add G3D (GPU) clock controller
  - Clock driver for the Rockchip RV1103B SoC
  - Initial support for the Renesas RZ/G3L (R9A08G046) SoC
  - Clock and reset controllers (e.g. PRCM) in the Tenstorrent Atlantis SoC
 -----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmnmb1QUHHN3Ym95ZEBj
 aHJvbWl1bS5vcmcACgkQrQKIl8bklSUcUg/+PCWUrRlcgboA/xCl+qdfa7Pxd3X6
 W6Z0IFwPrF6kZQnhlIIn3JlRcHixWilwNPgd02h5QK/2gA+Fa+T3h2+SE4oNW/qY
 dZm2W8qDxRIB2+/okuUaDOp0crybtRKHkph9jW1YJo+EDLRhwAVE1SKbr/uyZiAk
 1mr0lk8ZXbvhE/VoQysMjoZ8ITBEQiOwJEBNma6Oufl6dPEdSnaTKWkJZsUc3xjM
 kFx666wNDVqwVobX2q3J6mb3/CyPEIpyFeOgAFVkRcVdPf53Xz7BijYkS2wtPclM
 E58PKIjqk1TMt9nIdo5QuHZ5Og7nPFTQ9W1R0Qo/JGfjWnqqWTwCkEOXWWgTVD6x
 F/gctH+X9JkQEsXid6P4HAdFqOm2UhoUJJ+yTcwXphaQXCctG/kYRW0dbxu8N/z6
 hGpOKKeTmkioHIZoUW4Ap4L9futQWVmd45J9w6MGxF4QZL9apL2ILJ7jxhefxFH6
 YDb8srZ50Mqco18TERxvxMhK5kKiyzz7uL927O9pofmRPwzSKlwIKgILhVKNJff2
 TbCvOKi5oFpRizH/HmjVJ4SbKjWXrwbI6vTxy59FgKnAsmcwg1NQVBDu6Wo4ohtL
 HVe94hPE55q8585D5f6xhfM0MTmE73prZxmb57FtXMJbHFDwYt50v4W95ToAOz4O
 wN9cQVEL1vm6hx4=
 =RdCb
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "We've finally gotten rid of the struct clk_ops::round_rate() code
  after months of effort from Brian Masney. Now the only option is to
  use determine_rate(), which is good because that takes a struct
  argument instead of just a couple unsigned longs, allowing us to
  easily modify the way we determine and set rates in the clk tree.

  Beyond that core framework change we've got the typical pile of new
  SoC clk driver additions, fixes for clk data and/or adding missing
  clks because the consumer driver using those clks wasn't ready, etc.
  The usual suspects are all here: Qualcomm, Samsung, Mediatek, and
  Rockchip along with some newcomers making RISC-V SoCs like ESWIN's
  eic700 and Tenstorrent's Atlantis. The clk driver side of this looks
  pretty normal.

  Core:
   - Remove the round_rate() clk op (yay!)

  New Drivers:
   - ESWIN eic700 SoC clk support
   - Econet EN751221 SoC clock/reset support
   - Global TCSR, RPMh, and display clock controller support for the
     Qualcomm Eliza platform
   - TCSR, the multiple global, and the RPMh clock controller support
     for the Qualcomm Nord platform
   - GPU clock controller support for Qualcomm SM8750
   - Video and GPU clock controller support for Qualcomm Glymur
   - Global clock controller support for Qualcomm IPQ5210
   - Axis ARTPEC-9: Add new PLL clocks and new drivers for eight clock
     controllers on the SoC
   - ExynosAutov920: Add G3D (GPU) clock controller
   - Clock driver for the Rockchip RV1103B SoC
   - Initial support for the Renesas RZ/G3L (R9A08G046) SoC
   - Clock and reset controllers (e.g. PRCM) in the Tenstorrent Atlantis SoC"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (132 commits)
  clk: visconti: pll: initialize clk_init_data to zero
  clk: fsl-sai: Add MCLK generation support
  clk: fsl-sai: Extract clock setup into fsl_sai_clk_register()
  dt-bindings: clock: fsl-sai: Document clock-cells = <1> support
  clk: fsl-sai: Add i.MX8M support with 8 byte register offset
  clk: fsl-sai: Sort the headers
  dt-bindings: clock: fsl-sai: Document i.MX8M support
  clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC
  clk: qcom: rpmh: Add support for Nord rpmh clocks
  clk: qcom: Add TCSR clock driver for Nord SoC
  dt-bindings: clock: qcom: Add Nord Global Clock Controller
  dt-bindings: clock: qcom-rpmhcc: Add support for Nord SoCs
  dt-bindings: clock: qcom: Document the Nord SoC TCSR Clock Controller
  clk: qcom: gcc-x1e80100: Keep GCC USB QTB clock always ON
  clk: qcom: Constify list of critical CBCR registers
  clk: qcom: Constify qcom_cc_driver_data
  clk: qcom: videocc-glymur: Constify qcom_cc_desc
  clk: qcom: Add a driver for SM8750 GPU clocks
  dt-bindings: clock: qcom: Add SM8750 GPU clocks
  clk: qcom: ipq-cmn-pll: Add IPQ8074 SoC support
  ...
2026-04-21 08:33:26 -07:00
Linus Torvalds
99ef60d119 USB / Thunderbolt changes for 7.1-rc1
Here is the big set of USB and Thunderbolt changes for 7.1-rc1.
 
 Lots of little things in here, nothing major, just constant
 improvements, updates, and new features.  Highlights are:
   - new USB power supply driver support (will cause merge conflicts in
     drivers/power/supply/Makefile, but it's a simple fix)  These changes
     did touch outside of drivers/usb/ but got acks from the relevant
     mantainers for them.
   - dts file updates and conversions
   - string function conversions into "safer" ones
   - new device quirks
   - xhci driver updates
   - usb gadget driver minor fixes
   - typec driver additions and updates
   - small number of thunderbolt driver changes
   - dwc3 driver updates and additions of new hardware support
   - other minor driver updates
 
 All of these have been in the linux-next tree for a while with no
 reported issues
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCaeSx6g8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ynqjQCgqhbj0Pg2DiL+hZ4xEVlsKD8MJsMAn0vbdsR5
 UiYztWABA245P1hO9i+K
 =/fxh
 -----END PGP SIGNATURE-----

Merge tag 'usb-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB / Thunderbolt updates from Greg KH:
 "Here is the big set of USB and Thunderbolt changes for 7.1-rc1.

  Lots of little things in here, nothing major, just constant
  improvements, updates, and new features. Highlights are:

   - new USB power supply driver support.

     These changes did touch outside of drivers/usb/ but got acks from
     the relevant mantainers for them.

   - dts file updates and conversions

   - string function conversions into "safer" ones

   - new device quirks

   - xhci driver updates

   - usb gadget driver minor fixes

   - typec driver additions and updates

   - small number of thunderbolt driver changes

   - dwc3 driver updates and additions of new hardware support

   - other minor driver updates

  All of these have been in the linux-next tree for a while with no
  reported issues"

* tag 'usb-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (176 commits)
  usb: dwc3: starfive: Add JHB100 USB 2.0 DRD controller
  dt-bindings: usb: dwc3: add support for StarFive JHB100
  dt-bindings: usb: atmel,at91sam9rl-udc: convert to DT schema
  dt-bindings: usb: atmel,at91rm9200-udc: convert to DT schema
  dt-bindings: usb: generic-ehci: fix schema structure and add at91sam9g45 constraints
  dt-bindings: usb: generic-ohci: add AT91RM9200 OHCI binding support
  arm: dts: at91: remove unused #address-cells/#size-cells from sam9x60 udc node
  drivers/usb/host: Fix spelling error 'seperate' -> 'separate'
  usbip: tools: add hint when no exported devices are found
  USB: serial: iuu_phoenix: fix iuutool author name
  usb: gadget: f_ncm: validate minimum block_len in ncm_unwrap_ntb()
  usb: gadget: f_phonet: fix skb frags[] overflow in pn_rx_complete()
  usb: gadget: f_hid: Add missing error code
  usb: typec: cros_ec_ucsi: Load driver from OF and ACPI definitions
  dt-bindings: chrome: Add cros-ec-ucsi compatibility to typec binding
  USB: of: Simplify with scoped for each OF child loop
  usbip: validate number_of_packets in usbip_pack_ret_submit()
  usb: gadget: renesas_usb3: validate endpoint index in standard request handlers
  usb: core: config: reverse the size check of the SSP isoc endpoint descriptor
  usb: typec: ucsi: Set usb mode on partner change
  ...
2026-04-19 08:47:40 -07:00
Linus Torvalds
d730905bc3 Support for Mobileye EyeQ6Lplus
Cleanups and fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmniNBwaHHRzYm9nZW5k
 QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHB2QA//U53JZYmmOxKxwbYwLvK9
 Z8MuVgkvA/v7WktwL2PoMO0AlhQsteM5VtupddHhuhUiIr7gPy6Z7pEE9sDqM3gj
 p1d6vrg5XiWlh1fURdSqvzufKsm/etpElbvc2JjkcqD0sMGJUwlkP3ncZk/DCus6
 zhcvya7jVxyvzbCBgJSM8QHvOoj/g3EV4hsx8Ymru8XSdLVEegodZtvUHVx4Q29U
 fmHCf1u/v+rJVbe2T3nuqsqzQhmaWkC+WyeVJIDUNecjclPoGNOeg8duICNfOu9q
 dtkzOua7v6rRsUA9GDbMcR44PWzL4LqGTOffzwF7uvYakOAp6nQWsymAUIfkQbE6
 +I8heGaYPEQLjSHgCPI2WdJ4urbPdgsd5W2pC8s6WaHPdRlSMapH16I0DxmmNZlV
 CzW7o2ore5b8H4Mu5mboMjFzMY+A/0zC5S7twOpX+mvgPz+MTf1g0vD3hCSL+N7c
 LSW7rSZyd2smcgaHJBDpHceRHNZbVqloeO007DiJtrx+IWTBhvhFt2q/aqGG51xM
 2P/lRZrA8vAMaTR1hZKLmxUPZpSekezoWC8GbWNeIg5NUUTOJoTAtQvT5vU40GZA
 22o3s1a6rgz5KngV9rMWYERSV2yflvloYVo0ASVqgy1ijzzlsin/fbO976GdGD2I
 7vrch6tajmTSBYeG0SuKiFY=
 =jKsJ
 -----END PGP SIGNATURE-----

Merge tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Thomas Bogendoerfer:

 - Support for Mobileye EyeQ6Lplus

 - Cleanups and fixes

* tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits)
  MIPS/mtd: Handle READY GPIO in generic NAND platform data
  MIPS/input: Move RB532 button to GPIO descriptors
  MIPS: validate DT bootargs before appending them
  MIPS: Alchemy: Remove unused forward declaration
  MAINTAINERS: Mobileye: Add EyeQ6Lplus files
  MIPS: config: add eyeq6lplus_defconfig
  MIPS: Add Mobileye EyeQ6Lplus evaluation board dts
  MIPS: Add Mobileye EyeQ6Lplus SoC dtsi
  clk: eyeq: Add Mobileye EyeQ6Lplus OLB
  clk: eyeq: Adjust PLL accuracy computation
  clk: eyeq: Skip post-divisor when computing PLL frequency
  pinctrl: eyeq5: Add Mobileye EyeQ6Lplus OLB
  pinctrl: eyeq5: Use match data
  reset: eyeq: Add Mobileye EyeQ6Lplus OLB
  MIPS: Add Mobileye EyeQ6Lplus support
  dt-bindings: soc: mobileye: Add EyeQ6Lplus OLB
  dt-bindings: mips: Add Mobileye EyeQ6Lplus SoC
  MIPS: dts: loongson64g-package: Switch to Loongson UART driver
  mips: pci-mt7620: rework initialization procedure
  mips: pci-mt7620: add more register init values
  ...
2026-04-17 08:53:23 -07:00
Linus Torvalds
31b43c079f soc: drivers for 7.1
The driver updates again are all over the place with many minor fixes
 going into platform specific code. The most notable changes are:
 
  - Support for Microchip pic64gx system controllers
  - Work on cleaning up devicetree bindings for SoC drivers, and
    converting them into the new format
  - Lots of smaller changes for Qualcomm SoC drivers, including support
    for a number of newly supported chips
  - reset controller API cleanups and a new driver for Cix Sky1
  - Reworks of the Tegra PMC and CBB drivers, along with a change
    to how individual Tegra SoCs get selected in Kconfig and
    BPMP firmware driver updates including a refresh of the ABI
    header to match the version used by firmware
  - STM32 updates to the firewall bus driver and support for
    the debug bus through OP-TEE
  - SCMI firmware driver improvements for reliability, in particular
    for dealing with broken firmware interrupts
  - Memory driver updates for Tegra, and a patch to remove the
    unused Baikal T1 driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmnhCSYACgkQmmx57+YA
 GNl2ow/+Pti7qbBE34WNyIuWOgZEzjo1OeLe/Y4LqkQmHcM9FJV3/rCadA/FkmD9
 nH85WiRuUjIjzUiAl24SP2nkEcIU/yv8ECvROX46uAjhTByVHkaCedwl3ECW9RPA
 IAYiTJPrQBNCmWZuGO4bZ3go6hHn4q4RSd2V8vrCw/J3b+wBSAPTPzsaWnWg4MiL
 QYz7sBTwcNJaJuwJ7ZnHN/VgEOs9OgY6ejGJImiaVzBbsH7rNp7Cbs6t88X5rCXS
 mbgMvVlYKbsOWj3kNyv98YFAGgzo59uEL+m+846U32w9o0nIgkmIS60RQ5k73JV4
 QlhV1uT7PPtu7y7VbxfJ8KISxaRoex/+AZShmAWCul4YK75hEWT3mWGhM8cqeMUQ
 U0ogpbekRjKdn2Bgfl6kHf38smusjJ1fOBr8QIZcdDJpEtxYtRmNpLUNNSc5vO+T
 HvA79C8I8ydWGyqr1wRP1gDRBNc1BDYKxJO4ohvjnAPIeC01zArXCOyf0F3VtPzH
 XSycnyW7eRUVi+4C3/cF8qzhW2y7Wx03ui5mCDIEcOzyVoGNqTrPNsbCvkNkyrdc
 jqvWagZ4Ci8jaRxLAawnqHI/stvsHx9V+NPp6p07BsOxJMsuOqO4sInRhh5P6YvM
 5wZCFUK37xPEqYvr+BFS9B/4jgw3Mg2Kj+gjxShwsLS5JtVDfZw=
 =UB4F
 -----END PGP SIGNATURE-----

Merge tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
 "The driver updates again are all over the place with many minor fixes
  going into platform specific code. The most notable changes are:

   - Support for Microchip pic64gx system controllers
   - Work on cleaning up devicetree bindings for SoC drivers, and
     converting them into the new format
   - Lots of smaller changes for Qualcomm SoC drivers, including support
     for a number of newly supported chips
   - reset controller API cleanups and a new driver for Cix Sky1
   - Reworks of the Tegra PMC and CBB drivers, along with a change to
     how individual Tegra SoCs get selected in Kconfig and BPMP firmware
     driver updates including a refresh of the ABI header to match the
     version used by firmware
   - STM32 updates to the firewall bus driver and support for the debug
     bus through OP-TEE
   - SCMI firmware driver improvements for reliability, in particular
     for dealing with broken firmware interrupts
   - Memory driver updates for Tegra, and a patch to remove the unused
     Baikal T1 driver"

* tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (193 commits)
  firmware: arm_ffa: Use the correct buffer size during RXTX_MAP
  firmware: qcom: scm: Allow QSEECOM on Lenovo IdeaCentre Mini X
  clk: spear: fix resource leak in clk_register_vco_pll()
  reset: rzv2h-usb2phy: Add support for VBUS mux controller registration
  reset: rzv2h-usb2phy: Convert to regmap API
  dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/G3E USB2PHY reset
  dt-bindings: reset: renesas,rzv2h-usb2phy: Add '#mux-state-cells' property
  soc: microchip: add mpfs gpio interrupt mux driver
  dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux
  gpio: mpfs: Add interrupt support
  soc: qcom: ubwc: add helpers to get programmable values
  soc: qcom: ubwc: add helper to get min_acc length
  firmware: qcom: scm: Register gunyah watchdog device
  soc: qcom: socinfo: Add SoC ID for SA8650P
  dt-bindings: arm: qcom,ids: Add SoC ID for SA8650P
  firmware: qcom: scm: Allow QSEECOM on Mahua CRD
  soc: qcom: wcnss: simplify allocation of req
  soc: qcom: pd-mapper: Add support for Eliza
  soc: qcom: aoss: compare against normalized cooling state
  soc: qcom: llcc: fix v1 SB syndrome register offset
  ...
2026-04-16 20:34:34 -07:00
Linus Torvalds
e65f4718a5 soc: dt changes for 7.1
A number of SoC platforms are adding modernized variants of their
 already supported chips time, with a total of 12 new SoCs,
 and two older SoC getting removed:
 
  - Qualcomm Glymur is a compute SoC using 18 Oryon-2 CPU cores
  - Qualcomm Mahua is a variant of Glymur with only 12 CPU cores, but
    largely identical.
  - Qualcomm Eliza is an embeded platform for mobile phone (SM7750) and IOT
    (QC7790S/M) workloads
  - Qualcomm IPQ5210 is a wireless networking SoC using Cortex-A53 cores
  - Qualcomm apq8084 and ipq806x had only rudimentary support but no
    actual products using them, so they are now gone.
  - Axis ARTPEC-9 is a follow-up to the ARTPEC-8 embedded SoC, using
    the Samsung SoC platform but now with Cortex-A55 cores
  - ARM Zena is a virtual platform in FVP using Cortex-A720AE cores, with
    additional versions planned to be merged in the future.
  - ARM corstone-1000-a320 is a reference platform for IOT, using low-end
    Cortex-A320 cores
  - Microchip LAN9691 is an updated 64-bit variant of the arm32 lan966x
    series of networking SoCs
  - Microchip PIC64GX is an embedded RISC-V chip using SIFIVE U54 CPU cores
  - Rockchip RV1103B is the low-end 32-bit single-core vision processor
  - Renesas RZ/G3L (r9a08g046) is an industrial embedded chip using
    Cortex-A55 cores, similar to the G3E and G3S variants we already
    supported.
  - NXP S32N79 is an automotive SoC using Cortex-A78AE cores, a
    significant upgrade from the older S32V and S32G series
 
 These all come with at least one reference board or an initial product
 using these, in total there are 67 newly added boards. The ones for
 already supported SoCs are:
 
  - Two more Aspeed BMC based boards
  - Three older tablets based on 32-bit OMAP4 and Exynos5 SoCs
  - One Set-top-box based on Allwinner H6
  - 22 additional industrial/embedded boards using 64-bit NXP i.MX8M
    or i.MX9 SoCs
  - 20 Qualcomm SoC based machines across all possible markets:
    workstation, gaming, laptop, phone, networking, reference, ...
  - Three more Rockchips rk35xx based boards
  - Four variants of the Toradex Verdin using TI AM62
 
 Other notable bits are:
 
  - A cleanup for the 32-bit Tegra paz00 board moved the last
    board specific code on Tegra into equivalent dts syntax.
  - There continues to be a significant number of fixes for static
    checking of dtc syntax, but it feels like this is slowing down,
    hopefully getting into a state where most known issues are
    addressed
  - Additional hardware support for many existing boards across SoC
    families, notably Qualcomm, Broadcom, i.MX2, i.MX6, Rockchips,
    STM32, Mediatek, Tegra, TI and Microchip
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmnhBREACgkQmmx57+YA
 GNnKqQ//bvEidvJXnGbZQkHzh/6rF8lX7EhbEx4RUgp9R1h5Q9/74a70lAHFq3Lm
 OC/CbcXVRwM3ASsKhTk0Q7ypncXgy5JxEiPVROqGCNW2vP1SMzcwyWM/Zg4QCL+h
 4/ER2gjIwdrS/pcVspCJ5wyvuo9WC4VR3I0CLC84j4f+Myj9vhVV80KOrnsCJFNU
 iVRBwZmoISOJIjT2RcgDaus65e/Ys39aBP7j4GJ9D0ksQiacJR23Ktw4z5lDW/N0
 9VZxowNAKwazaPrdbKdO5Jmebl/WWaO1LGWA43v5LJo3IvDZj28af0Ewsk7FSIOo
 GcdxyWFvN8I5N7cxfPNsXawKVlEiI6lqycoPEqTk87hed3BGR0G57NCD5EShnUAG
 7YjQwN5sA04dQbGPCkBM4QZRK9aq1f44YPWCFdZokaPdmSzt01GaASEcm5tMAZf7
 eDvgPsZmB+lgbJiLh66Rxo94SrLwN6SXnsOpfiouDOSLsYOZ7Xqo2ljuA+j6JndN
 rxKa6qfMwKw0FoNFr2MKde659utUfbt50bCqwdRAwSFFUhO/x38w5DafdB0BFyry
 /lXU/ocpO6YImiS62kbdo9v/v+WUr/SlRL2f8Vq5IsLmYfn5grhHGmJwS57WrrH7
 ZVQdi6PWIUrUyb08WOQZ0XvmCIYN7VUzUQjI3tD1VM1B6ksAsTQ=
 =5Dwm
 -----END PGP SIGNATURE-----

Merge tag 'soc-dt-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
 "A number of SoC platforms are adding modernized variants of their
  already supported chips time, with a total of 12 new SoCs, and two
  older SoC getting removed:

   - Qualcomm Glymur is a compute SoC using 18 Oryon-2 CPU cores
   - Qualcomm Mahua is a variant of Glymur with only 12 CPU cores, but
     largely identical.
   - Qualcomm Eliza is an embeded platform for mobile phone (SM7750) and
     IOT (QC7790S/M) workloads
   - Qualcomm IPQ5210 is a wireless networking SoC using Cortex-A53
     cores
   - Qualcomm apq8084 and ipq806x had only rudimentary support but no
     actual products using them, so they are now gone.
   - Axis ARTPEC-9 is a follow-up to the ARTPEC-8 embedded SoC, using
     the Samsung SoC platform but now with Cortex-A55 cores
   - ARM Zena is a virtual platform in FVP using Cortex-A720AE cores,
     with additional versions planned to be merged in the future.
   - ARM corstone-1000-a320 is a reference platform for IOT, using
     low-end Cortex-A320 cores
   - Microchip LAN9691 is an updated 64-bit variant of the arm32 lan966x
     series of networking SoCs
   - Microchip PIC64GX is an embedded RISC-V chip using SIFIVE U54 CPU
     cores
   - Rockchip RV1103B is the low-end 32-bit single-core vision processor
   - Renesas RZ/G3L (r9a08g046) is an industrial embedded chip using
     Cortex-A55 cores, similar to the G3E and G3S variants we already
     supported.
   - NXP S32N79 is an automotive SoC using Cortex-A78AE cores, a
     significant upgrade from the older S32V and S32G series

  These all come with at least one reference board or an initial product
  using these, in total there are 67 newly added boards. The ones for
  already supported SoCs are:

   - Two more Aspeed BMC based boards
   - Three older tablets based on 32-bit OMAP4 and Exynos5 SoCs
   - One Set-top-box based on Allwinner H6
   - 22 additional industrial/embedded boards using 64-bit NXP i.MX8M or
     i.MX9 SoCs
   - 20 Qualcomm SoC based machines across all possible markets:
     workstation, gaming, laptop, phone, networking, reference, ...
   - Three more Rockchips rk35xx based boards
   - Four variants of the Toradex Verdin using TI AM62

  Other notable bits are:

   - A cleanup for the 32-bit Tegra paz00 board moved the last board
     specific code on Tegra into equivalent dts syntax.
   - There continues to be a significant number of fixes for static
     checking of dtc syntax, but it feels like this is slowing down,
     hopefully getting into a state where most known issues are
     addressed
   - Additional hardware support for many existing boards across SoC
     families, notably Qualcomm, Broadcom, i.MX2, i.MX6, Rockchips,
     STM32, Mediatek, Tegra, TI and Microchip"

* tag 'soc-dt-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (841 commits)
  arm64: dts: ti: k3: Use memory-region-names for r5f
  ARM: dts: imx: Add DT overlays for DH i.MX6 DHCOM SoM and boards
  ARM: dts: imx6sx: remove fallback compatible string fsl,imx28-lcdif
  ARM: dts: imx25: rename node name tcq to touchscreen
  ARM: dts: imx: b850v3: Disable unused usdhc4
  ARM: dts: imx: b850v3: Define GPIO line names
  ARM: dts: imx: b850v3: Use alphabetical sorting
  ARM: dts: imx: bx50v3: Configure phy-mode to eliminate a warning
  ARM: dts: imx: bx50v3: Configure switch PHY max-speed to 100Mbps
  ARM: dts: imx7ulp: Add CPU clock and OPP table support
  ARM: dts: imx7-mba7: Deassert BOOT_EN after boot
  ARM: dts: tqma7: add boot phase properties
  ARM: dts: imx7s: add boot phase properties
  ARM: dts: tqma6ul[l]: correct spelling of TQ-Systems
  ARM: dts: mba6ulx: add boot phase properties
  ARM: dts: imx6ul[l]-tqma6ul[l]: add boot phase properties
  ARM: dts: imx6ul/imx6ull: add boot phase properties
  ARM: dts: imx6qdl-mba6: add boot phase properties
  ARM: dts: imx6qdl-tqma6: add boot phase properties
  ARM: dts: imx6qdl: add boot phase properties
  ...
2026-04-16 20:28:48 -07:00
Stephen Boyd
6b701fde9b
Merge branches 'clk-samsung', 'clk-qcom', 'clk-round', 'clk-sai' and 'clk-cleanup' into clk-next
* clk-samsung:
  clk: samsung: exynos850: Add APM-to-AP mailbox clock
  dt-bindings: clock: exynos850: Add APM_AP MAILBOX clock
  clk: samsung: Use %pe format to simplify
  clk: samsung: pll: Fix possible truncation in a9fraco recalc rate
  clk: samsung: exynosautov920: add block G3D clock support
  dt-bindings: clock: exynosautov920: add G3D clock definitions
  clk: samsung: gs101: harmonise symbol names (clock arrays)
  clk: samsung: artpec-9: Add initial clock support for ARTPEC-9 SoC
  clk: samsung: Add clock PLL support for ARTPEC-9 SoC
  dt-bindings: clock: Add ARTPEC-9 clock controller

* clk-qcom: (67 commits)
  clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC
  clk: qcom: rpmh: Add support for Nord rpmh clocks
  clk: qcom: Add TCSR clock driver for Nord SoC
  dt-bindings: clock: qcom: Add Nord Global Clock Controller
  dt-bindings: clock: qcom-rpmhcc: Add support for Nord SoCs
  dt-bindings: clock: qcom: Document the Nord SoC TCSR Clock Controller
  clk: qcom: gcc-x1e80100: Keep GCC USB QTB clock always ON
  clk: qcom: Constify list of critical CBCR registers
  clk: qcom: Constify qcom_cc_driver_data
  clk: qcom: videocc-glymur: Constify qcom_cc_desc
  clk: qcom: Add a driver for SM8750 GPU clocks
  dt-bindings: clock: qcom: Add SM8750 GPU clocks
  clk: qcom: ipq-cmn-pll: Add IPQ8074 SoC support
  dt-bindings: clock: qcom: Add CMN PLL support for IPQ8074
  clk: qcom: ipq-cmn-pll: Add IPQ6018 SoC support
  dt-bindings: clock: qcom: Add CMN PLL support for IPQ6018
  clk: qcom: gdsc: Fix error path on registration of multiple pm subdomains
  dt-bindings: clock: qcom: Add missing power-domains property
  clk: qcom: gcc-eliza: Enable FORCE_MEM_CORE_ON for UFS AXI PHY clock
  clk: qcom: dispcc-sc7180: Add missing MDSS resets
  ...

* clk-round:
  clk: divider: remove divider_round_rate() and divider_round_rate_parent()
  clk: divider: remove divider_ro_round_rate_parent()
  clk: remove round_rate() clk ops
  clk: composite: convert from round_rate() to determine_rate()
  clk: test: remove references to clk_ops.round_rate

* clk-sai:
  clk: fsl-sai: Add MCLK generation support
  clk: fsl-sai: Extract clock setup into fsl_sai_clk_register()
  dt-bindings: clock: fsl-sai: Document clock-cells = <1> support
  clk: fsl-sai: Add i.MX8M support with 8 byte register offset
  clk: fsl-sai: Sort the headers
  dt-bindings: clock: fsl-sai: Document i.MX8M support

* clk-cleanup:
  clk: visconti: pll: initialize clk_init_data to zero
  clk: xgene: Fix mapping leak in xgene_pllclk_init()
  clk: Simplify clk_is_match()
  clk: baikal-t1: Remove not-going-to-be-supported code for Baikal SoC
  clk: mvebu: armada-37xx-periph: fix __iomem casts in structure init
  clk: qoriq: avoid format string warning
2026-04-16 10:12:43 -07:00
Stephen Boyd
522a83abc3
Merge branches 'clk-tenstorrent', 'clk-rockchip', 'clk-imx' and 'clk-allwinner' into clk-next
* clk-tenstorrent:
  clk: tenstorrent: Add Atlantis clock controller driver
  reset: tenstorrent: Add reset controller for Atlantis
  dt-bindings: clk: tenstorrent: Add tenstorrent,atlantis-prcm-rcpu

* clk-rockchip:
  clk: rockchip: rk3568: Add PCIe pipe clock gates
  clk: rockchip: Add clock controller for the RV1103B
  dt-bindings: clock: rockchip: Add RV1103B CRU support

* clk-imx:
  clk: imx8mq: Correct the CSI PHY sels
  clk: vf610: Add support for the Ethernet switch clocks
  dt-bindings: clock: vf610: Add definitions for MTIP L2 switch
  dt-bindings: clock: vf610: Drop VF610_CLK_END define
  clk: vf610: Move VF610_CLK_END define to clk-vf610 driver
  clk: imx: imx8-acm: fix flags for acm clocks
  clk: imx: imx6q: Fix device node reference leak in of_assigned_ldb_sels()
  clk: imx: imx6q: Fix device node reference leak in pll6_bypassed()
  clk: imx: fracn-gppll: Add 477.4MHz support
  clk: imx: fracn-gppll: Add 333.333333 MHz support
  clk: imx: pll14xx: Use unsigned format specifier
  dt-bindings: clock: imx6q[ul]-clock: add optional clock enet[1]_ref_pad

* clk-allwinner:
  clk: sunxi-ng: sun55i-a523-r: Add missing r-spi module clock
2026-04-16 10:12:33 -07:00
Stephen Boyd
699646e684
Merge branches 'clk-fixes', 'clk-renesas', 'clk-rpi', 'clk-eswin' and 'clk-mediatek' into clk-next
- ESWIN eic700 SoC clk support
 - Econet EN751221 SoC clock/reset support

* clk-fixes:
  clk: spacemit: ccu_mix: fix inverted condition in ccu_mix_trigger_fc()
  clk: microchip: mpfs-ccc: fix out of bounds access during output registration
  clk: qcom: dispcc-sm8450: use RCG2 ops for DPTX1 AUX clock source

* clk-renesas:
  clk: renesas: Add support for RZ/G3L SoC
  dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC
  clk: renesas: rzg2l: Re-enable critical module clocks during resume
  clk: renesas: rzg2l: Add rzg2l_mod_clock_init_mstop_helper()
  clk: renesas: rzg2l: Add helper for mod clock enable/disable
  clk: renesas: r9a0{7g04[34],8g045}: Add critical reset entries
  clk: renesas: rzg2l: Add support for critical resets
  clk: renesas: r9a09g056: Remove entries for WDT{0,2,3}
  clk: renesas: r9a06g032: Enable watchdog reset sources
  clk: renesas: cpg-mssr: Use struct_size() helper
  clk: renesas: r9a09g047: Add PCIe clocks and reset
  clk: renesas: r9a09g057: Add PCIe clocks and reset
  clk: renesas: r9a09g056: Add PCIe clocks and reset
  clk: renesas: r9a09g047: Add entries for the RSPIs
  clk: renesas: r9a09g056: Add clock and reset entries for RTC
  clk: renesas: r9a09g057: Remove entries for WDT{0,2,3}
  clk: renesas: r9a09g056: Fix ordering of module clocks array
  clk: renesas: r9a09g057: Fix ordering of module clocks array

* clk-rpi:
  clk: bcm: rpi: Manage clock rate in prepare/unprepare callbacks

* clk-eswin:
  MAINTAINERS: Add entry for ESWIN EIC7700 clock driver
  clk: eswin: Add eic7700 clock driver
  clk: divider: Add devm_clk_hw_register_divider_parent_data
  dt-bindings: clock: eswin: Documentation for eic7700 SoC

* clk-mediatek:
  clk: airoha: Add econet EN751221 clock/reset support to en7523-scu
  dt-bindings: clock, reset: Add econet EN751221
2026-04-16 10:07:47 -07:00
Linus Torvalds
e41a25c53f pmdomain core:
- Extend statistics for domain idle states with s2idle data
  - Show latency/residency for domain idle states in debugfs
 
 pmdomain providers:
  - imx: Add support for optional subnodes for imx93-blk-ctrl
  - marvell: Add audio power island for Marvell PXA1908
  - mediatek: Add legacy support for the MT7622 audio power domain
  - mediatek: Add nvmem provider functionality to the mtk-mfg-pmdomain
  - mediatek: Add support for the MT8189 power domains
  - qcom: Add support for the Eliza and Hawi power domains
  - sunxi: Add support for the Allwinner A733 power domains
  - ti: Handle wakeup constraints for out-of-band wakeups for ti_sci
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmneGAwXHHVsZi5oYW5z
 c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCmvhA/+Ij0e/heV7ceZHLT9VmV54zgz
 RsxqSDzeWfnah/VqWmtHhJIFDCC92n3RK4g0XnFWRbf4LRKtPuev4rmwMaPG8yXC
 lLct/6GhGMUvKHrR+4vIQerJhp7ioW0RnxkVSaxBX0QECW4VdSWXNy0O67bHP+E9
 Tq4kQH9MLesjCf9wtFku1R3clRb6xOWzJMxOSE1H+PDYedgfMYMrqWyhdAjcnXhr
 9meMatQvl6Z5abTGqRjg0rJo+/Ys2Ac8ca5Y/91tOnRp0La7ylG4RTDxRjZbzwjH
 0fLJDkvV3QV5dlNx/96OWJTtKTD+VnMsZEeO2SSz1bSjHDVEJW+4HbudjuxBdmdP
 mh0jMBTg/FkLSNnXsorxAwGnICnWtX/iYAfnKxqGNnKm6u2wRVGNpirt/RQ7h/E0
 OZKL3DNxszT6KWfeXtLtjcoB+i3XEXuK11xcFam9TUGWEvwcRBEsTToV9W6c92MG
 EmbpGFL1geLuaCCzjBXcJghjzD+Q5o3IcVvwgs8/L9vWnFynj/zIH2L3nj8CUMsy
 XSDCuJamhGiak9ThjDTbHL1ybVjOWMKPZea4BRLnXnlwEKBv+BJpzt9Yap0lNB7s
 J7rIIJWJrvWAqBaOXqgoKK0NnmRC+1/o4fo0zmeaBtUXtCdA2oUSq/aNgx0lScP7
 zTpBZl/F7caUSJFvoH8=
 =obaW
 -----END PGP SIGNATURE-----

Merge tag 'pmdomain-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

Pull pmdomain updates from Ulf Hansson:
 "pmdomain core:
   - Extend statistics for domain idle states with s2idle data
   - Show latency/residency for domain idle states in debugfs

  pmdomain providers:
   - imx: Add support for optional subnodes for imx93-blk-ctrl
   - marvell: Add audio power island for Marvell PXA1908
   - mediatek:
      - Add legacy support for the MT7622 audio power domain
      - Add nvmem provider functionality to the mtk-mfg-pmdomain
      - Add support for the MT8189 power domains
   - qcom: Add support for the Eliza and Hawi power domains
   - sunxi: Add support for the Allwinner A733 power domains
   - ti: Handle wakeup constraints for out-of-band wakeups for ti_sci"

* tag 'pmdomain-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (32 commits)
  pmdomain: qcom: rpmhpd: Add power domains for Hawi SoC
  dt-bindings: power: qcom,rpmhpd: Add RPMh power domain for Hawi SoC
  pmdomain: qcom: cpr: add COMPILE_TEST support
  PM: domains: De-constify fields in struct dev_pm_domain_attach_data
  pmdomain: qcom: cpr: simplify main allocation
  pmdomain: bcm: bcm2835-power: Replace open-coded polling with readl_poll_timeout_atomic()
  pmdomain: sunxi: Add support for A733 to Allwinner PCK600 driver
  pmdomain: qcom: rpmhpd: Add Eliza RPMh Power Domains
  pmdomain: arm: Add print after a successful probe for SCMI power domains
  pmdomain: rockchip: quiet regulator error on -EPROBE_DEFER
  pmdomain: mediatek: Add power domain driver for MT8189 SoC
  pmdomain: mediatek: Add bus protect control flow for MT8189
  pmdomain: core: Extend statistics for domain idle states with s2idle data
  pmdomain: core: Show latency/residency for domain idle states in debugfs
  pmdomain: core: Restructure domain idle states data for genpd in debugfs
  pmdomain: qcom: rpmpd: drop stray semicolon
  pmdomain: imx: scu-pd: Fix device_node reference leak during ->probe()
  pmdomain: ti: omap_prm: Fix a reference leak on device node
  pmdomain: mediatek: scpsys: Add MT7622 Audio power domain to legacy driver
  pmdomain: mediatek: Simplify with scoped for each OF child loop
  ...
2026-04-15 14:22:42 -07:00
Linus Torvalds
a8e7ef3cec sound updates for 7.1-rc1
Nothing too thrilling here, but we see lots of driver updates and
 bug fixes, including quirk additions and refactoring works, while
 there have been little changes in the core functionality.
 Here are some highlights:
 
 * Core:
 - Add validation for the control API put callback
 - Fixes in compress-offload API timestamp handling
 - Continued ASoC core API cleanups
 
 * ASoC:
 - Add support for bus keepers (for Apple devices in future)
 - Enhancements to the SDCA support, including retaskable jacks
 - Test improvements for Cirrus Logic drivers
 - Lots of fixes for the NXP, nVidia and Qualcomm
 - Support for AMD RPL DMIC, Cirrus Logic CS42L43 and CS47L47, nVidia
   machines with CPCAP and WM8962
 
 * USB-audio:
 - Quirks for Huawei Headset, Focusrite Novation, MV-Silicon,
   Studio 1824, Arturia AF16Rig, Hotone Audio, Feaulle Rainbow,
   PreSonus AudioBox, Moondrop Ju Jiu, Scarlett 18i20, etc
 - Extended mixer volume quirk handling
 - UAF and other fixes for us144mkii, 6fire and caiaq drivers
 
 * HD-audio:
 - Add quirks or fixes for Acer, Lenovo, HP, ASUS machines
 - Fixes & cleanups of GPIO helper code
 
 * Misc:
 - Add suspend/resume support for multiple legacy ISA and Apple
   drivers
 - Further regression fixes for ctxfi driver
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmnfgwMOHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE8dGg/9E7iWm9T/M0hajUDVeOW5QBHc3dyqglQJdxRN
 xmvluoZeAk1a4k58iVEo20Q/T9jdOYiDJNMOhh/GaxmRenMC4W9yhpUlJ88Nz1Pb
 sUV88SpPsF6GfxU9QDkN478tzCov4BKHiO+Z8Y/KwgzUBdT9RZE/xaIKiHbApoKw
 1ZotD5GUkWSgvHsJiQqlokPci3RKK5GAcJKG1oOKjo6XflTeNY9gSYUgMaXngeYq
 vHwTlgILAdwgWsbCku0EbBLS0DqPU+rf+m+R1h02OD+HMUvPsHIgpRSQ3C+qK36e
 agrMIEKBX9mMnXwNnjFZ2o8FDSOoR6mgO++DNWZrV8CMut6IjODzqofk37oSBiLg
 gJ7Qn1Em+BO/+F7GmiWIxVfTj4v+QcRCJlDVQLDlw7jQG9xrX9wLQe24WZntJGOc
 jp9vi49V6OpQNFEaYg9A1cHh/83x+gvBnfVRua1PNhxA5YwW9f0o6wXIqCK/UpDp
 JybMKEZezcG+xLpqx3YXs123VOe++zo7aGuCK3hVj9B8/CQTCENaLW2rYnG64jit
 jvbur4nvGSuArTMP1+p5Fx3XZaS/zAxrSkIDO8zEtOCDytCHQlp3DvADnMiTL5fC
 eUwC/PypJG2KIGYFy9W1GtLxdOzhjOXDSoBvRFA1KUu3HXNAnmhvQ8PGPBL4lzTi
 P6Dungg=
 =wHBs
 -----END PGP SIGNATURE-----

Merge tag 'sound-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "Nothing too thrilling here, but we see lots of driver updates and bug
  fixes, including quirk additions and refactoring works, while there
  have been little changes in the core functionality. Here are some
  highlights:

  Core:
   - Add validation for the control API put callback
   - Fixes in compress-offload API timestamp handling
   - Continued ASoC core API cleanups

  ASoC:
   - Add support for bus keepers (for Apple devices in future)
   - Enhancements to the SDCA support, including retaskable jacks
   - Test improvements for Cirrus Logic drivers
   - Lots of fixes for the NXP, nVidia and Qualcomm
   - Support for AMD RPL DMIC, Cirrus Logic CS42L43 and CS47L47, nVidia
     machines with CPCAP and WM8962

  USB-audio:
   - Quirks for Huawei Headset, Focusrite Novation, MV-Silicon, Studio
     1824, Arturia AF16Rig, Hotone Audio, Feaulle Rainbow, PreSonus
     AudioBox, Moondrop Ju Jiu, Scarlett 18i20, etc
   - Extended mixer volume quirk handling
   - UAF and other fixes for us144mkii, 6fire and caiaq drivers

  HD-audio:
   - Add quirks or fixes for Acer, Lenovo, HP, ASUS machines
   - Fixes & cleanups of GPIO helper code

  Misc:
   - Add suspend/resume support for multiple legacy ISA and Apple
     drivers
   - Further regression fixes for ctxfi driver"

* tag 'sound-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (359 commits)
  ALSA: control: Validate buf_len before strnlen() in snd_ctl_elem_init_enum_names()
  ALSA: usb-audio: Fix missing error handling for get_min_max*()
  ALSA: hda/realtek - fixed speaker no sound update
  ALSA: hda/realtek: Add quirk for Acer PT316-51S headset mic
  ALSA: usb-audio: Exclude Scarlett 18i20 1st Gen from SKIP_IFACE_SETUP
  ALSA: hda/realtek: Add quirk for Legion S7 15IMH
  ALSA: hda/realtek: Add quirk for HP Spectre x360 14-ea
  ALSA: caiaq: take a reference on the USB device in create_card()
  ASoC: dt-bindings: rockchip: convert rk3399-gru-sound to DT Schema
  ALSA: sscape: Add suspend and resume support
  ALSA: sscape: Cache per-card resources for board reinitialization
  ALSA: usb-audio: Do not expose sticky mixers
  ALSA: usb-audio: Move volume control resolution check into a function
  ALSA: usb-audio: Add error checks against get_min_max*()
  ALSA: usb-audio: Add quirk for PreSonus AudioBox USB
  ALSA: interwave: guard PM-only restore helpers with CONFIG_PM
  ALSA: usb-audio: Evaluate packsize caps at the right place
  ALSA: sc6000: Restore board setup across suspend
  ALSA: sc6000: Keep the programmed board state in card-private data
  ALSA: 6fire: fix use-after-free on disconnect
  ...
2026-04-15 09:20:49 -07:00
Benoît Monin
4434c3896f dt-bindings: soc: mobileye: Add EyeQ6Lplus OLB
The "Other Logic Block" found in the EyeQ6Lplus from Mobileye provides
various functions for the controllers present in the SoC.

The OLB produces 22 clocks derived from its input, which is connected
to the main oscillator of the SoC.

It provides reset signals via two reset domains.

It also controls 32 pins to be either a GPIO or an alternate function.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2026-04-13 15:31:40 +02:00
Krzysztof Kozlowski
4177ec9d58 Support for the RV1103B SoC and the Onion Omega4 board using it.
While the RV1103B only got a B-extension to its name, the SoC internals
 were reworked heavily. So likely it's mainly pin compatible to the
 non-B variant.
 
 The dt-binding for the RV1103B clock driver is shared with the clock-
 driver branch going into the clock-tree.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmnPiKMQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgcVGB/9TvEArrDeCimaXfLRWKcZtQkrpbmcIb2Kh
 BdGY4cX4YS8g/77pBFg9LMt21dKI3jlmyR76Wf7i9iZVCcWnzcxrhCsB9unEi44c
 jQHa5QJQ++7IXk6/2SrKHfabcmFoVBiDHVpGqbOw2jq8vcTF0IgWKDu5NzjjDUoT
 jbvAxJa+JzTeqEvdZgTdFldPpwMUClqnQqVsTs1w6XlFyMNIRr2ItcJKFU6+JbQX
 UWAlL0/v4v4e+YGsfd/VIXVHFyN81e/yI4s4OwZh2DtM+eFjTbphpJuiltvatqXS
 fuUYjq0U0geWWJMQypDYsZBVXrlbRAICSSDkf8TUqWZSMxf9fFg6
 =5y+y
 -----END PGP SIGNATURE-----

Merge tag 'v7.1-rockchip-dts32-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

Support for the RV1103B SoC and the Onion Omega4 board using it.
While the RV1103B only got a B-extension to its name, the SoC internals
were reworked heavily. So likely it's mainly pin compatible to the
non-B variant.

The dt-binding for the RV1103B clock driver is shared with the clock-
driver branch going into the clock-tree.

* tag 'v7.1-rockchip-dts32-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Add Onion Omega4 Evaluation Board
  dt-bindings: arm: rockchip: Add Omega4 Evaluation board
  ARM: dts: rockchip: Add support for RV1103B
  dt-bindings: soc: rockchip: grf: Add RV1103B compatibles
  dt-bindings: clock: rockchip: Add RV1103B CRU support

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-04-11 10:09:33 +02:00
Taniya Das
06498d59bb dt-bindings: clock: qcom: Add Nord Global Clock Controller
Add device tree bindings for the global clock controller on Qualcomm
Nord platform. The global clock controller on Nord SoC is divided into
multiple clock controllers (GCC,SE_GCC,NE_GCC and NW_GCC). Add each of
the bindings to define the clock controllers.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260403-nord-clks-v1-3-018af14979fd@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-04-08 20:57:01 -05:00
Taniya Das
31fcf6995e dt-bindings: clock: qcom: Document the Nord SoC TCSR Clock Controller
The Nord SoC TCSR block provides CLKREF clocks for DP, PCIe, UFS, SGMII
and USB.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
[Shawn: Use compatible qcom,nord-tcsrcc rather than qcom,nord-tcsr]
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260403-nord-clks-v1-1-018af14979fd@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-04-08 20:57:01 -05:00
Fenglin Wu
950ace2e53 dt-bindings: power: qcom,rpmhpd: Add RPMh power domain for Hawi SoC
Document the RPMh power domain for Hawi SoC, and add definitions for
the new power domains which present in Hawi SoC:
 - RPMHPD_DCX (Display Core X): supplies VDD_DISP for the display
   subsystem
 - RPMHPD_GBX (Graphics Box): supplies VDD_GFX_BX for the GPU/graphics
   subsystem

Also, add constants for new power domain levels that supported in Hawi
SoC, including: LOW_SVS_D3_0, LOW_SVS_D1_0, LOW_SVS_D0_0, SVS_L2_0,
TURBO_L1_0/1/2, TURBO_L1_0/1/2.

Signed-off-by: Fenglin Wu <fenglin.wu@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-04-08 11:55:01 +02:00
Arnd Bergmann
8366b60cbe Qualcomm Arm64 DeviceTree updates for v7.1
Introduce the Eliza, Glymur, Mahua, and IPQ5210 Qualcomm SoCs.
 
 Introduce the Redmi 4A, Redmi Go, Arduino Monza (VENTUNO Q), Redmi Note
 8T, Purwa EVK, ECS Liva QCS710, additional variants of the DB820c,
 Ayaneo Pocket S2, Thundercomm AI Mini PC G1, Samsung Galaxy Core Prime
 LTE Verizon Wireless, Wiko Pulp 4G, the Purwa-variant of ASUS Vivobook
 S15, the Eliza MTP, and the Glymur and Mahua CRDs.
 
 Introduce UFS support and flatten the DWC3 node on Hamoa. Enable UFS,
 SDC, DisplayPort audio playback, and an EL2 overlay for the Hamoa IoT
 EVK. Enable DisplayPort audio on the Hamoa CRD and add HDMI support on
 the ASUS Zenbook A14. Reduce the duplication of thermal sensors across
 Purwa and Hamoa.
 
 Add the QPIC SPI NAND controller on IPQ5332 and IPQ9574. Describe and
 enable the eMMC controller on IPQ9574.
 
 Add display, audio/compute remoteprocs, QUP devices, thermal sensors,
 display, and CoreSight on the Kaanapali platform. Enable audio, compute
 display, PMIC, Bluetooth, and WiFi on the MTP. Describe PMIC, audio and
 compute remoteprocs on QRD.
 
 Add role-switching support for the tertiary USB controller on Lemans.
 Enable the tertiary USB controller and the GPIO expander on the Lemans
 EVK, and add an overlay for the IFP Mezzanine.
 
 Add UFS, camera control interface, audio GPR, and FastRPC support on
 Milos. Enable UFS, camera EEPROMs, and hall effect sensor on the
 Fairphone FP6.
 
 Add camera control interface and fix a variety of things on the Monaco
 platform, add missing FastRPC compute banks. Add eMMC support, describe
 the DisplayPort bridge and GPIO expander on the Monaco EVK. Add overlay
 for EVK camera and the IFP mezzanine.
 
 Add touchscreen to the Xiaomi Redmi 4A, 5A, and Go, and fix the board-id
 on the 4A.
 
 Add the ambient light and proximity sensor on the Asus ZenFone 2
 Laser/Selfie.
 
 On Kodiak-based boards, enable the ethernet and USB Type-A ports on the
 Rb3Gen2, correct the LT9611 routing on the RubikPi3, add Bluetooth on
 the IDP, and add front camera support on the Fairphone FP5.
 Introduce an overlay for the Rb3Gen2 Industrial Mezzanine.
 
 Describe DSI on the Monaco SoC and enable Bluetooth, WiFi and DSI/DP
 bridge on the Ride board.
 
 Describe the WiFi/BT combo chip properly on the QRB2210 RB1 and QRB4210.
 The describe the DSI/DP bringde on the Arduino UnoQ.
 
 01022af2d2 arm64: dts: qcom: sc7280-chrome-common: disable Venus
 
 Introduce DSI display support on SC8280XP.
 
 Add LLCC on SDM670 and another SPI controller on SDM630.
 
 Properly describe the WiFi/BT chip on a variety of SDM845-based
 devices. Introduce the "alert slider" on the OnePlus 6 and OnePlus 6T
 devices.
 
 Introduce the PRNG, describe the debug UART, and add the MDSS core reset
 on SM6125. Enable the debug UART and fix various issues on the Xiaomi
 Redmi Note 8. Describe the touchscreen on the Xiaomi Mi A3.
 
 Properly describe the WiFi/BT combo chip in SM8150 HDK.
 
 Improve the EAS properties on SM8550, in addition to various other
 fixes. Introduce a new overlay for the HDK display card.
 
 Introduce various smaller fixes across SM8450 and SM8650.
 
 Add display support on SM8750 and enable DSI and DisplayPort on the MTP.
 Also add tsens and thermal-zones.
 
 Add ETR devices, flatten the USB controller node, and mark USB
 controllers as wakeup-capable devices, on Talos.
 
 Properly describe the IPA IMEM slice on a variety of platforms.
 
 Drop redundant non-controllable regulator definitions from a variety of
 boards.
 
 Drop redundant VSYNC pin state definition from various platforms.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmnNKcEACgkQCx85Pw2Z
 rcXz7w//XNSDtMLHkD7Xp0iW2IJ9WuWd9eilZDNfdnHPZILOW3RamYEiMzcSsxY0
 BKFRfOW5JZRUReLKvtdW7YRGtjk2zvsF0x3U3RqBFuRvZZx52uAPeT+VC2ZKrH0W
 rRXG4WkPygFaETG366vL2L4cxa/sjDemGO8XKGs9nyiJXtDIA+pmE4VLLFBaeWj4
 2NHGoXOFa0EL+zZDHlj0zFInZA2CIOaxroYsBO3ECNlozv3NkkA/6ZlzgLOC6RCS
 FSV+t6YIhJmJXD0gn82C3UBVr76H8purCNAE0DCHyUkGG2ai/J56aWEz5NnnftfQ
 gjK3ftf0DgSX5kK8hSi2aIeTyBCFcD9RhoyFGC719kKytEyTlAqZWQ0YIMcsX9PF
 PWQnDCp/J8L2wxU1NLG/JSe70/bB98u/IsmJO71D5gK6oM1JheLErmZ70VIyf06/
 vVzgDGPt3eOR3Fym/A78fBrLFueIwdK3xVByP4NjLoGDnSmKVW5CkGckO7E2K7n3
 /DG4k0APAI5W50MFDi4wL9opikjBXIwIfPZCVy+f1guOJOauoUP2/+1zJZhG12Sx
 RCHBSCICnFjsP/EwSukX4cXJl2U0Hyt+oLZhAhqFg+82pBkmzMPvwS5viDXsibDO
 yRYUIzpUitoYZxpglKBWzaPPmYLENpjPwfe2YaWFslb0IVr8N8M=
 =H8oR
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmnO6QYACgkQmmx57+YA
 GNmu4w//X8IXrDtfM/iKD+bar71PZ9Hr93x3vgiNOzFUTjg4+WjGjpeZJT5wxZ3/
 g0fS9gbKWrRPttsWRrARDGRYxbed0LRzCu13f4o9r3K8Z/5GBEwKqHcrHU2bc5F3
 Ls9j5fDKbgmOe7g7VylRb+p1FiEXjXDS2WRx6NgBm7B7gW1Utf61lqd0jJSiQSbY
 dQFwXCOxHhkf1xkKBVZoEq6aWInxpiGGw6lXLgV3bRK+dmTiYl0CVR7p6PeEM/fc
 qbIP4KGVRhFCQQxriD/dRu/Ad8SCYmpVWZy/ZoIWXmnf14fhMaE2oSNlVupCvsFF
 Dwv+ACvpFCvOk61hvAbx+yMKkZ1hvoUSECTCbkA2sI1d4CgSjUWnmD0mGq6UphZ+
 Yiv2ginPcoLUls7Fyo0D8UY9appD7SLaXqHpDGAKqGDxIIVX+R/vhCSvRJlqNYxL
 DbvnYgAbZfw4gGNi/hILF3DJxZs+EhTuUDrMIFUD7U48hXmHwanWcpvB4FxVeDEB
 ZI0tzekkrCPWmEq1VNh1OAeb7W5BQ0FuvJm8p/suepWtkwdVRSft8cn+qGx036vN
 u2DUtNj2sN6pURVQHN4G6tM8pfxgfUfRtIavy/OtG03Mkk9WPlSxU/VVJkajk6hI
 ry4D7t0FUTH3DHaIbvY2BAcVU4gM4YIE9agsdgpJz20wYvpNuv4=
 =wjbD
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm Arm64 DeviceTree updates for v7.1

Introduce the Eliza, Glymur, Mahua, and IPQ5210 Qualcomm SoCs.

Introduce the Redmi 4A, Redmi Go, Arduino Monza (VENTUNO Q), Redmi Note
8T, Purwa EVK, ECS Liva QCS710, additional variants of the DB820c,
Ayaneo Pocket S2, Thundercomm AI Mini PC G1, Samsung Galaxy Core Prime
LTE Verizon Wireless, Wiko Pulp 4G, the Purwa-variant of ASUS Vivobook
S15, the Eliza MTP, and the Glymur and Mahua CRDs.

Introduce UFS support and flatten the DWC3 node on Hamoa. Enable UFS,
SDC, DisplayPort audio playback, and an EL2 overlay for the Hamoa IoT
EVK. Enable DisplayPort audio on the Hamoa CRD and add HDMI support on
the ASUS Zenbook A14. Reduce the duplication of thermal sensors across
Purwa and Hamoa.

Add the QPIC SPI NAND controller on IPQ5332 and IPQ9574. Describe and
enable the eMMC controller on IPQ9574.

Add display, audio/compute remoteprocs, QUP devices, thermal sensors,
display, and CoreSight on the Kaanapali platform. Enable audio, compute
display, PMIC, Bluetooth, and WiFi on the MTP. Describe PMIC, audio and
compute remoteprocs on QRD.

Add role-switching support for the tertiary USB controller on Lemans.
Enable the tertiary USB controller and the GPIO expander on the Lemans
EVK, and add an overlay for the IFP Mezzanine.

Add UFS, camera control interface, audio GPR, and FastRPC support on
Milos. Enable UFS, camera EEPROMs, and hall effect sensor on the
Fairphone FP6.

Add camera control interface and fix a variety of things on the Monaco
platform, add missing FastRPC compute banks. Add eMMC support, describe
the DisplayPort bridge and GPIO expander on the Monaco EVK. Add overlay
for EVK camera and the IFP mezzanine.

Add touchscreen to the Xiaomi Redmi 4A, 5A, and Go, and fix the board-id
on the 4A.

Add the ambient light and proximity sensor on the Asus ZenFone 2
Laser/Selfie.

On Kodiak-based boards, enable the ethernet and USB Type-A ports on the
Rb3Gen2, correct the LT9611 routing on the RubikPi3, add Bluetooth on
the IDP, and add front camera support on the Fairphone FP5.
Introduce an overlay for the Rb3Gen2 Industrial Mezzanine.

Describe DSI on the Monaco SoC and enable Bluetooth, WiFi and DSI/DP
bridge on the Ride board.

Describe the WiFi/BT combo chip properly on the QRB2210 RB1 and QRB4210.
The describe the DSI/DP bringde on the Arduino UnoQ.

01022af2d2 arm64: dts: qcom: sc7280-chrome-common: disable Venus

Introduce DSI display support on SC8280XP.

Add LLCC on SDM670 and another SPI controller on SDM630.

Properly describe the WiFi/BT chip on a variety of SDM845-based
devices. Introduce the "alert slider" on the OnePlus 6 and OnePlus 6T
devices.

Introduce the PRNG, describe the debug UART, and add the MDSS core reset
on SM6125. Enable the debug UART and fix various issues on the Xiaomi
Redmi Note 8. Describe the touchscreen on the Xiaomi Mi A3.

Properly describe the WiFi/BT combo chip in SM8150 HDK.

Improve the EAS properties on SM8550, in addition to various other
fixes. Introduce a new overlay for the HDK display card.

Introduce various smaller fixes across SM8450 and SM8650.

Add display support on SM8750 and enable DSI and DisplayPort on the MTP.
Also add tsens and thermal-zones.

Add ETR devices, flatten the USB controller node, and mark USB
controllers as wakeup-capable devices, on Talos.

Properly describe the IPA IMEM slice on a variety of platforms.

Drop redundant non-controllable regulator definitions from a variety of
boards.

Drop redundant VSYNC pin state definition from various platforms.

* tag 'qcom-arm64-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (254 commits)
  arm64: dts: qcom: sm8250: Add missing CPU7 3.09GHz OPP
  arm64: dts: qcom: sm8550-hdk: add support for the Display Card overlay
  arm64: dts: qcom: msm8916-samsung-coreprimeltevzw: add device tree
  dt-bindings: qcom: Document samsung,coreprimeltevzw
  arm64: dts: qcom: msm8916-samsung-fortuna: Move SM5504 from rossa and refactor MUIC
  arm64: dts: qcom: sdm670: add llcc
  arm64: dts: qcom: qcm6490-fairphone-fp5: Add front camera support
  arm64: dts: qcom: qcm6490-fairphone-fp5: Sort pinctrl nodes by pins
  arm64: dts: qcom: milos-fairphone-fp6: Add camera EEPROMs on CCI busses
  arm64: dts: qcom: milos: Add CCI busses
  arm64: dts: qcom: purwa-iot-evk: Enable UFS
  arm64: dts: qcom: eliza: Add thermal sensors
  arm64: dts: qcom: sc8280xp: Add dsi nodes on SC8280XP
  arm64: dts: qcom: sdm845-oneplus: Describe Wi-Fi/BT properly
  arm64: dts: qcom: sdm845-google: Describe Wi-Fi/BT properly
  arm64: dts: qcom: drop redundant zap-shader memory-region
  arm64: dts: qcom: fix remaining gpu_zap_shader labels
  arm64: dts: qcom: msm8996: fix indentation in sdhc2 node
  arm64: dts: qcom: monaco-evk: enable UART6 for robot expansion board
  arm64: dts: qcom: lemans-evk: enable UART0 for robot expansion board
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-04-03 00:08:34 +02:00
Arnd Bergmann
a66cc657ef Qualcomm driver updates for v7.1
Add ECS LIVA QC710, Glymur CRD, Mahua CRD, Purwa IoT EVK, and Asus
 Vivobook to the QSEECOM allow-list, to enable UEFI variable access
 through uefisecapp.
 
 Register the Gunyah watchdog device if the SCM driver finds itself
 running under Gunyah. Clean up some locking using guards.
 
 Handle possible cases where AOSS cooling state is given a non-boolean
 state.
 
 Replace LLCC per-slice activation bitmap with reference counting. Also
 add SDM670 support.
 
 Improve probe deferral handling in the OCMEM driver.
 
 Add Milos, QCS615, Eliza, Glymur, and Mahua support to the pd-mapper.
 
 Add support for SoCCP-based pmic-glink, as found in Glymur and
 Kaanapali.
 
 Add common QMI service ids to the main qmi headerfile, to avoid
 spreading these constants in various drivers.
 
 Add support for version 2 of SMP2P and implement the irqchip state
 reading support.
 
 Add CQ7790, SA8650P, SM7450, SM7450P, and IPQ5210 SoC and the PM7550BA
 PMIC identifiers to the socinfo driver.
 
 Add Eliza and Mahua support to the UBWC driver, introduce helpers for
 drivers to read out min_acc length and other programmable values, and
 disable bank swizzling for Glymur.
 
 Simplify the logic related to allocation of NV download request in the
 WCNSS control driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmnMQNQACgkQCx85Pw2Z
 rcWpmA//QDo8m9t4GgAdqJLSyH40Hcw0Uotv4DhzquUe1hYXTQb4NwNoJ+JZVPvO
 70BDuJTOQcnQCKeagW1Zq5ycJtA11khRL9ZWwzJB3fq3UTHI+n0EfHDmshAxz37Y
 h8x71dWKcI3NnEHWBFglRyYbv/eKFxcc2CFP0HrAB3UOxPClqsOVB5iNNM/JA3Jp
 eppYK6473VAF89q+q7+F3kEhz2p4sgyI9G2Sm/vFqXV3CLY0WV98FjQAHi1nXuNV
 pCz4oPkccBAcu7FQffMIydbtoIBPZDoI7pueJ4GlgewkkunuiJew/Rq0GEKnyzsN
 SqzfnBnbfsbQPOtZTBNY6tDgnSMQV2fMtgyBqkmgnSCs6A1AU6XVPFq4wWDpr6t/
 +y9QpA/Jfb1txeHp7xY/9bOAl2/vorZDLp9O8CR828z6Ptg/CGO8Gws/X0g4QWvZ
 6+UjRHTB5BnJENjzJGoxhrO59gyASUExoM02b6pQmz4ayw9q1PHGMVdSAPCygrDH
 r9+yMcTO8kfUAYtliJrygDTDlhwxMDfd2z82BOZGpSbAbR8zfFKKJmIaSQGNHCjl
 u3G9Kb5L7QlAVBGVcRYaArp1MQWD6oP+IU1W9YMra5cySwt/nXtSsQZRdhoP5Qp6
 YO8YMdldkf37DNar/+wrN012yaYSWj/k9x/f0phAn106oq1o8+0=
 =1zur
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmnO3XkACgkQmmx57+YA
 GNlXDRAAkXYODhxU+T1AyT5OgDBzKgfVBte2vne+NOuirAX6+4U6v+0lCVx+fs4z
 kTfeveRoXtWlSSF3Vyv+rw1fZvpUOwZ9Y+u405fgveAxtDUkjzJGsnlrfMGIWD4a
 Q99WFz9L+kTcaf03uNLhrg9UAx0SpkfQQm2riY+ueHVY/0dOTsNzjv71A9sJrmvq
 oSEH3xquCOgd8diR3evE+2KhD4yQkzMmVeBuujDhWwIJmY8aSpZFIJIXYL5sRo+V
 l1bd5EwPH2Ku0bXaKh5mLDS/MvdKk7EPKru7ST0+IVfBXBnZf6KefAqljCvVuR66
 RRNDN2kcWU+aoih2vuVI+y3w1XGMX9AbFlviaGZWCY1mL2FTFvWfrQ4vLTz2bRlB
 8gFPmxMtVZQxu5hBOxAprnYrValRddYamh8cPQcpu9BGIG/ZIqx8cSOXZsQTiARk
 9DPRBQsQmaGXXl1YxbcYibQn1TL3ozmqQn0dhZ2Ojkxv0cyD3ymvdv68QKXPf7dm
 j2LU6BgNiK5IGZ2VUk5mk3hp5Kc+6qpmMqg7l/HIf1zUULCCFWu6l/IobuaX7ynj
 b5EU0feXMCJ9B17G1lgdFsZ0oI3RhkROjCi2huklNh1fA/xThwTsZsZQ9NmEKQHw
 TDCcavPXh64fSVtv4qePd9HV+KcHeBeA18m+6njdqByT36qMeC0=
 =nCjL
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v7.1

Add ECS LIVA QC710, Glymur CRD, Mahua CRD, Purwa IoT EVK, and Asus
Vivobook to the QSEECOM allow-list, to enable UEFI variable access
through uefisecapp.

Register the Gunyah watchdog device if the SCM driver finds itself
running under Gunyah. Clean up some locking using guards.

Handle possible cases where AOSS cooling state is given a non-boolean
state.

Replace LLCC per-slice activation bitmap with reference counting. Also
add SDM670 support.

Improve probe deferral handling in the OCMEM driver.

Add Milos, QCS615, Eliza, Glymur, and Mahua support to the pd-mapper.

Add support for SoCCP-based pmic-glink, as found in Glymur and
Kaanapali.

Add common QMI service ids to the main qmi headerfile, to avoid
spreading these constants in various drivers.

Add support for version 2 of SMP2P and implement the irqchip state
reading support.

Add CQ7790, SA8650P, SM7450, SM7450P, and IPQ5210 SoC and the PM7550BA
PMIC identifiers to the socinfo driver.

Add Eliza and Mahua support to the UBWC driver, introduce helpers for
drivers to read out min_acc length and other programmable values, and
disable bank swizzling for Glymur.

Simplify the logic related to allocation of NV download request in the
WCNSS control driver.

* tag 'qcom-drivers-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (51 commits)
  soc: qcom: ubwc: add helpers to get programmable values
  soc: qcom: ubwc: add helper to get min_acc length
  firmware: qcom: scm: Register gunyah watchdog device
  soc: qcom: socinfo: Add SoC ID for SA8650P
  dt-bindings: arm: qcom,ids: Add SoC ID for SA8650P
  firmware: qcom: scm: Allow QSEECOM on Mahua CRD
  soc: qcom: wcnss: simplify allocation of req
  soc: qcom: pd-mapper: Add support for Eliza
  soc: qcom: aoss: compare against normalized cooling state
  soc: qcom: llcc: fix v1 SB syndrome register offset
  dt-bindings: firmware: qcom,scm: Document ipq9650 SCM
  soc: qcom: ubwc: Add support for Mahua
  soc: qcom: pd-mapper: Add support for Glymur and Mahua
  soc: qcom: ubwc: Add configuration Eliza SoC
  soc: qcom: ubwc: Remove redundant x1e80100_data
  dt-bindings: firmware: qcom,scm: document Eliza SCM Firmware Interface
  soc: qcom: ocmem: return -EPROBE_DEFER is ocmem is not available
  soc: qcom: ocmem: register reasons for probe deferrals
  soc: qcom: ocmem: make the core clock optional
  soc: qcom: ubwc: disable bank swizzling for Glymur platform
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-04-02 23:19:52 +02:00
Philipp Zabel
d373605cd5 Reset controller fixes for v7.0, part 2
* Decouple spacemit K3 reset lines that were incorrectly coupled
   together as one, but are in fact separate resets in hardware.
 * Fix a double free in the reset_add_gpio_aux_device() error path.
   This has already been fixed on reset/next by commit a9b95ce36d
   ("reset: gpio: add a devlink between reset-gpio and its consumer").
 * Fix the MODULE_AUTHOR string in the rzg2l-usbphy-ctrl driver.
 -----BEGIN PGP SIGNATURE-----
 
 iI0EABYKADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCacJb2xcccC56YWJlbEBw
 ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwMEBAQCvMy6ymW61O7mFx3h26jX4XFXt
 FzW4T1OxSvZT4G8dwgEApKCL0clN6+eyZECPPm+785qeWLWaCKN2/YyCCg/EUQA=
 =l6oH
 -----END PGP SIGNATURE-----

Merge tag 'reset-fixes-for-v7.0-2' into reset/next

Reset controller fixes for v7.0, part 2

* Decouple spacemit K3 reset lines that were incorrectly coupled
  together as one, but are in fact separate resets in hardware.
* Fix a double free in the reset_add_gpio_aux_device() error path.
  This has already been fixed on reset/next by commit a9b95ce36d
  ("reset: gpio: add a devlink between reset-gpio and its consumer").
* Fix the MODULE_AUTHOR string in the rzg2l-usbphy-ctrl driver.

We merge this into reset/next to resolve a conflict between commits
a9b95ce36d ("reset: gpio: add a devlink between reset-gpio and its
consumer") and fbffb8c7c7 ("reset: gpio: fix double free in
reset_add_gpio_aux_device() error path").

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2026-04-02 18:32:53 +02:00