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Char/Misc/IIO/FPGA/GPIB/etc driver updates for 7.2-rc1

Browse Source 
Here is the big set of char, misc, iio, fpga, and other small driver
 subsystems changes for 7.2-rc1.
 
 Lots of little stuff in here, the majority being of course the IIO
 driver updates, as a list they are:
   - IIO driver updates and additions
   - GPIB driver bugfixes and cleanups
   - Android binder driver updates (rust and C version)
   - counter driver updates
   - MHI driver updates
   - mei driver updates
   - w1 driver updates
   - interconnect driver updates
   - Comedi driver fixes and updates
   - some obsolete char drivers removed (applicom and dtlk)
   - hwtracing driver updates
   - other tiny driver updates
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull misc driver updates from Greg KH:
 "Here is the big set of char, misc, iio, fpga, and other small driver
  subsystems changes for 7.2-rc1.

  Lots of little stuff in here, the majority being of course the IIO
  driver updates, as a list they are:

   - IIO driver updates and additions

   - GPIB driver bugfixes and cleanups

   - Android binder driver updates (rust and C version)

   - counter driver updates

   - MHI driver updates

   - mei driver updates

   - w1 driver updates

   - interconnect driver updates

   - Comedi driver fixes and updates

   - some obsolete char drivers removed (applicom and dtlk)

   - hwtracing driver updates

   - other tiny driver updates

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (406 commits)
  w1: ds2482: Use named initializers for arrays of i2c_device_data
  firmware: stratix10-svc: Add support to query Arm Trusted Firmware (ATF) version
  firmware: stratix10-rsu: avoid blocking reboot_image sysfs when busy
  coresight: ultrasoc-smb: Fix OOB write in smb_sync_perf_buffer()
  iio: adc: nxp-sar-adc: harden buffer ISR against per-channel read failure
  iio: chemical: scd30: Replace manual locking with RAII locking
  iio: light: tsl2591: remove unneeded tsl2591_compatible_als_persist_cycle()
  iio: dac: ad5686: create bus ops struct
  iio: dac: ad5686: cleanup doc header of local structs
  iio: dac: ad5686: add control_sync() for single-channel devices
  iio: dac: ad5686: add helpers to handle powerdown masks
  iio: dac: ad5686: add of_match table to the spi driver
  iio: dac: ad5686: drop enum id
  iio: dac: ad5686: remove redundant register definition
  iio: dac: ad5686: refactor include headers
  iio: adc: ad4080: fix AD4880 chip ID
  iio: light: veml3328: add support for new device
  dt-bindings: iio: light: veml6030: add veml3328
  fpga: microchip-spi: fix zero header_size OOB read in mpf_ops_parse_header()
  fpga: dfl-afu: validate DMA mapping length in afu_dma_map_region()
  ...
This commit is contained in:
Linus Torvalds 2026-06-22 12:20:21 -07:00
commit 0000d9ccbc
528 changed files with 19487 additions and 8286 deletions
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68
Documentation/ABI/testing/sysfs-bus-iio
View File

@ -764,10 +764,13 @@ Contact: linux-iio@vger.kernel.org
Description:
Specifies the output powerdown mode.
DAC output stage is disconnected from the amplifier and
500ohm_to_gnd: connected to ground via a 500Ohm resistor,
1kohm_to_gnd: connected to ground via an 1kOhm resistor,
2.5kohm_to_gnd: connected to ground via a 2.5kOhm resistor,
3.85kohm_to_gnd: connected to ground via a 3.85kOhm resistor,
6kohm_to_gnd: connected to ground via a 6kOhm resistor,
7.7kohm_to_gnd: connected to ground via a 7.7kOhm resistor,
16kohm_to_gnd: connected to ground via a 16kOhm resistor,
20kohm_to_gnd: connected to ground via a 20kOhm resistor,
32kohm_to_gnd: connected to ground via a 32kOhm resistor,
42kohm_to_gnd: connected to ground via a 42kOhm resistor,
@ -1510,21 +1513,24 @@ Contact: linux-iio@vger.kernel.org
Description:
Description of the scan element data storage within the buffer
and hence the form in which it is read from user-space.
Form is [be|le]:[s|u]bits/storagebits[>>shift].
be or le specifies big or little endian. s or u specifies if
signed (2's complement) or unsigned. bits is the number of bits
of data and storagebits is the space (after padding) that it
occupies in the buffer. shift if specified, is the shift that
needs to be applied prior to masking out unused bits. Some
devices put their data in the middle of the transferred elements
with additional information on both sides. Note that some
devices will have additional information in the unused bits
so to get a clean value, the bits value must be used to mask
the buffer output value appropriately. The storagebits value
also specifies the data alignment. So s48/64>>2 will be a
signed 48 bit integer stored in a 64 bit location aligned to
a 64 bit boundary. To obtain the clean value, shift right 2
and apply a mask to zero the top 16 bits of the result.
Form is [be|le]:[f|s|u]bits/storagebits[>>shift].
be or le specifies big or little endian. f means floating-point
(IEEE 754 binary format), s means signed (2's complement), u means
unsigned. bits is the number of bits of data and storagebits is the
space (after padding) that it occupies in the buffer; when using a
floating-point format, bits must be one of the width values defined
in the IEEE 754 standard for binary interchange formats (e.g. 16
indicates the binary16 format for half-precision numbers). shift,
if specified, is the shift that needs to be applied prior to
masking out unused bits. Some devices put their data in the middle
of the transferred elements with additional information on both
sides. Note that some devices will have additional information in
the unused bits, so to get a clean value the bits value must be
used to mask the buffer output value appropriately. The storagebits
value also specifies the data alignment. So s48/64>>2 will be a
signed 48 bit integer stored in a 64 bit location aligned to a 64
bit boundary. To obtain the clean value, shift right 2 and apply a
mask to zero the top 16 bits of the result.
For other storage combinations this attribute will be extended
appropriately.
@ -1752,6 +1758,21 @@ Description:
measurement from channel Y. Units after application of scale and
offset are milliamps.
What: /sys/bus/iio/devices/iio:deviceX/in_rot_quaternionaxis_raw
KernelVersion: 7.1
Contact: linux-iio@vger.kernel.org
Description:
Raw value of {x, y, z} components of the quaternion vector. These
components represent the axis about which a rotation occurs, and are
subject to the following constraints:
- the quaternion vector is normalized, i.e. w^2 + x^2 + y^2 + z^2 = 1
- the rotation angle is within the [-pi, pi] range, i.e. the w
component (which represents the amount of rotation) is non-negative
These constraints allow the w value to be calculated from the other
components: w = sqrt(1 - (x^2 + y^2 + z^2)).
What: /sys/.../iio:deviceX/in_energy_en
What: /sys/.../iio:deviceX/in_distance_en
What: /sys/.../iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_en
@ -1959,6 +1980,23 @@ Description:
Raw (unscaled no offset etc.) resistance reading.
Units after application of scale and offset are ohms.
What: /sys/bus/iio/devices/iio:deviceX/in_coverageY_raw
KernelVersion: 7.2
Contact: linux-iio@vger.kernel.org
Description:
Raw (unscaled no offset etc.) coverage reading. Used for sensors
that report fractional coverage as a percentage, such as leak
detectors where the value represents what portion of the sensing
element is wetted. Units after application of scale and offset are
percent.
What: /sys/bus/iio/devices/iio:deviceX/in_coverageY_scale
KernelVersion: 7.2
Contact: linux-iio@vger.kernel.org
Description:
Scale to be applied to in_coverageY_raw to obtain coverage
in percent.
What: /sys/bus/iio/devices/iio:deviceX/heater_enable
KernelVersion: 4.1.0
Contact: linux-iio@vger.kernel.org

1
Documentation/admin-guide/devices.txt
View File

@ -291,7 +291,6 @@
154 = /dev/pmu Macintosh PowerBook power manager
155 =
156 = /dev/lcd Front panel LCD display
157 = /dev/ac Applicom Intl Profibus card
158 = /dev/nwbutton Netwinder external button
159 = /dev/nwdebug Netwinder debug interface
160 = /dev/nwflash Netwinder flash memory

12
Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
View File

@ -1,12 +0,0 @@
Altera Arria10 Partial Reconfiguration IP
Required properties:
- compatible : should contain "altr,a10-pr-ip"
- reg : base address and size for memory mapped io.
Example:
fpga_mgr: fpga-mgr@ff20c000 {
compatible = "altr,a10-pr-ip";
reg = <0xff20c000 0x10>;
};

17
Documentation/devicetree/bindings/fpga/altera-socfpga-fpga-mgr.txt
View File

@ -1,17 +0,0 @@
Altera SOCFPGA FPGA Manager
Required properties:
- compatible : should contain "altr,socfpga-fpga-mgr"
- reg : base address and size for memory mapped io.
- The first index is for FPGA manager register access.
- The second index is for writing FPGA configuration data.
- interrupts : interrupt for the FPGA Manager device.
Example:
hps_0_fpgamgr: fpgamgr@ff706000 {
compatible = "altr,socfpga-fpga-mgr";
reg = <0xFF706000 0x1000
0xFFB90000 0x1000>;
interrupts = <0 175 4>;
};

34
Documentation/devicetree/bindings/fpga/altr,a10-pr-ip.yaml Normal file
View File

@ -0,0 +1,34 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/altr,a10-pr-ip.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Altera Arria10 Partial Reconfiguration IP
maintainers:
- Matthew Gerlach <matthew.gerlach@linux.intel.com>
description:
The Altera Arria 10 Partial Reconfiguration IP core allows the host
processor to perform partial reconfiguration of the FPGA fabric.
properties:
compatible:
const: altr,a10-pr-ip
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
fpga-mgr@ff20c000 {
compatible = "altr,a10-pr-ip";
reg = <0xff20c000 0x10>;
};

38
Documentation/devicetree/bindings/fpga/altr,socfpga-fpga-mgr.yaml Normal file
View File

@ -0,0 +1,38 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/altr,socfpga-fpga-mgr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Altera SOCFPGA FPGA Manager
maintainers:
- Steffen Trumtrar <s.trumtrar@pengutronix.de>
properties:
compatible:
const: altr,socfpga-fpga-mgr
reg:
items:
- description: FPGA manager register access
- description: Writing FPGA configuration data
interrupts:
maxItems: 1
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
fpgamgr@ff706000 {
compatible = "altr,socfpga-fpga-mgr";
reg = <0xff706000 0x1000>,
<0xffb90000 0x1000>;
interrupts = <0 175 4>;
};

98
Documentation/devicetree/bindings/fpga/efinix,trion-config.yaml Normal file
View File

@ -0,0 +1,98 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/efinix,trion-config.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Efinix SPI FPGA Manager
maintainers:
- Ian Dannapel <iansdannapel@gmail.com>
description: |
Efinix FPGAs (Trion, Topaz, and Titanium families) support loading bitstreams
through "SPI Passive Mode".
Additional pin hogs for bus width configuration should be set
elsewhere, if necessary.
References:
- https://www.efinixinc.com/docs/an006-configuring-trion-fpgas-v6.3.pdf
- https://www.efinixinc.com/docs/an033-configuring-titanium-fpgas-v2.8.pdf
- https://www.efinixinc.com/docs/an061-configuring-topaz-fpgas-v1.1.pdf
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
oneOf:
- items:
- enum:
- efinix,titanium-config
- efinix,topaz-config
- const: efinix,trion-config
- const: efinix,trion-config
spi-cpha: true
spi-cpol: true
spi-max-frequency:
maximum: 25000000
reg:
maxItems: 1
reset-gpios:
description:
reset and re-configuration trigger pin (low active)
maxItems: 1
cdone-gpios:
description:
optional configuration done status pin (high active)
maxItems: 1
required:
- compatible
- reg
- reset-gpios
- spi-cpha
- spi-cpol
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
fpga-mgr@0 {
compatible = "efinix,trion-config";
reg = <0>;
spi-max-frequency = <25000000>;
spi-cpha;
spi-cpol;
reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
cdone-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
};
};
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
fpga-mgr@0 {
compatible = "efinix,titanium-config", "efinix,trion-config";
reg = <0>;
spi-max-frequency = <25000000>;
spi-cpha;
spi-cpol;
reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
cdone-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
};
};
...

36
Documentation/devicetree/bindings/fpga/technologic,ts7300-fpga.yaml Normal file
View File

@ -0,0 +1,36 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/technologic,ts7300-fpga.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Technologic Systems TS-7300 FPGA Manager
maintainers:
- Florian Fainelli <f.fainelli@gmail.com>
description:
FPGA manager for the Altera Cyclone II FPGA on Technologic Systems
TS-7300 board. The FPGA is programmed via the memory-mapped interface
implemented in the CPLD.
properties:
compatible:
const: technologic,ts7300-fpga
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
fpga-mgr@13c00000 {
compatible = "technologic,ts7300-fpga";
reg = <0x13c00000 0x2>;
};
...

56
Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
View File

@ -18,7 +18,11 @@ description: |
service a wide variety of precision, wide bandwidth data acquisition
applications.
The AD4880 is a dual-channel variant with two independent ADC channels,
each with its own SPI configuration interface.
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4880.pdf
$ref: /schemas/spi/spi-peripheral-props.yaml#
@ -34,9 +38,16 @@ properties:
- adi,ad4086
- adi,ad4087
- adi,ad4088
- adi,ad4880
- adi,ad4884
reg:
maxItems: 1
minItems: 1
maxItems: 2
description:
SPI chip select(s). For single-channel devices, one chip select.
For multi-channel devices like AD4880, two chip selects are required
as each channel has its own SPI configuration interface.
spi-max-frequency:
description: Configuration of the SPI bus.
@ -60,7 +71,10 @@ properties:
vrefin-supply: true
io-backends:
maxItems: 1
minItems: 1
items:
- description: Backend for channel A (primary)
- description: Backend for channel B (secondary)
adi,lvds-cnv-enable:
description: Enable the LVDS signal type on the CNV pin. Default is CMOS.
@ -81,6 +95,27 @@ required:
- vdd33-supply
- vrefin-supply
allOf:
- if:
properties:
compatible:
contains:
enum:
- adi,ad4880
- adi,ad4884
then:
properties:
reg:
minItems: 2
io-backends:
minItems: 2
else:
properties:
reg:
maxItems: 1
io-backends:
maxItems: 1
additionalProperties: false
examples:
@ -101,4 +136,21 @@ examples:
io-backends = <&iio_backend>;
};
};
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad4880";
reg = <0>, <1>;
spi-max-frequency = <10000000>;
vdd33-supply = <&vdd33>;
vddldo-supply = <&vddldo>;
vrefin-supply = <&vrefin>;
clocks = <&cnv>;
clock-names = "cnv";
io-backends = <&iio_backend_cha>, <&iio_backend_chb>;
};
};
...

19
Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml
View File

@ -5,19 +5,30 @@
$id: http://devicetree.org/schemas/iio/adc/adi,ad4130.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD4130 ADC device driver
title: Analog Devices AD4130 family ADCs
maintainers:
- Cosmin Tanislav <cosmin.tanislav@analog.com>
description: |
Bindings for the Analog Devices AD4130 ADC. Datasheet can be found here:
Bindings for the Analog Devices AD4130 family ADCs.
Datasheets can be found here:
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4129-4.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4129-8.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-4.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4131-4.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4131-8.pdf
properties:
compatible:
enum:
- adi,ad4129-4
- adi,ad4129-8
- adi,ad4130-4
- adi,ad4130
- adi,ad4131-4
- adi,ad4131-8
reg:
maxItems: 1
@ -32,6 +43,10 @@ properties:
interrupts:
maxItems: 1
description: |
Data Ready / FIFO interrupt. For devices with FIFO support, the
interrupt polarity specified here is inverted when the device enters
FIFO mode, and normal for data ready.
interrupt-names:
description: |

180
Documentation/devicetree/bindings/iio/adc/adi,ad4691.yaml Normal file
View File

@ -0,0 +1,180 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad4691.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD4691 Family Multichannel SAR ADCs
maintainers:
- Radu Sabau <radu.sabau@analog.com>
description: |
The AD4691 family are high-speed, low-power, multichannel successive
approximation register (SAR) analog-to-digital converters (ADCs) with
an SPI-compatible serial interface. The ADC supports CNV Burst Mode,
where an external PWM drives the CNV pin, and Manual Mode, where CNV
is directly tied to the SPI chip-select.
Datasheets:
* https://www.analog.com/en/products/ad4691.html
* https://www.analog.com/en/products/ad4692.html
* https://www.analog.com/en/products/ad4693.html
* https://www.analog.com/en/products/ad4694.html
$ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
enum:
- adi,ad4691
- adi,ad4692
- adi,ad4693
- adi,ad4694
reg:
maxItems: 1
spi-max-frequency:
maximum: 40000000
spi-cpol: true
spi-cpha: true
avdd-supply:
description: Analog power supply (4.5V to 5.5V).
vdd-supply:
description:
External 1.8V digital core supply. When present, the internal LDO is
disabled (LDO_EN = 0). Mutually exclusive with ldo-in-supply.
ldo-in-supply:
description:
LDO input supply (2.4V to 5.5V). When present and vdd-supply is absent,
the internal LDO generates 1.8V VDD from this input (LDO_EN = 1).
Mutually exclusive with vdd-supply.
vio-supply:
description: I/O voltage supply (1.71V to 1.89V or VDD).
ref-supply:
description: External reference voltage supply (2.4V to 5.25V).
refin-supply:
description: Internal reference buffer input supply.
reset-gpios:
description:
GPIO line controlling the hardware reset pin (active-low).
maxItems: 1
pwms:
description:
PWM connected to the CNV pin. When present, selects CNV Burst Mode where
the PWM drives the conversion rate. When absent, Manual Mode is used
(CNV tied to SPI CS).
maxItems: 1
interrupts:
description:
Interrupt lines connected to the ADC GP pins. Each GP pin can be
physically wired to an interrupt-capable input on the SoC.
maxItems: 4
interrupt-names:
description: Names of the interrupt lines, matching the GP pin names.
minItems: 1
maxItems: 4
items:
enum:
- gp0
- gp1
- gp2
- gp3
gpio-controller: true
'#gpio-cells':
const: 2
'#trigger-source-cells':
description:
This node can act as a trigger source. The single cell in a consumer
reference specifies the GP pin number (0-3) used as the trigger output.
const: 1
required:
- compatible
- reg
- avdd-supply
- vio-supply
allOf:
# vdd-supply and ldo-in-supply are mutually exclusive, one is required:
# either an external 1.8V VDD is provided or the internal LDO is fed from
# ldo-in-supply to generate VDD.
- oneOf:
- required:
- vdd-supply
- required:
- ldo-in-supply
# ref-supply and refin-supply are mutually exclusive, one is required
- oneOf:
- required:
- ref-supply
- required:
- refin-supply
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
/* AD4692 in CNV Burst Mode with SPI offload */
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad4692";
reg = <0>;
spi-cpol;
spi-cpha;
spi-max-frequency = <40000000>;
avdd-supply = <&avdd_supply>;
ldo-in-supply = <&avdd_supply>;
vio-supply = <&vio_supply>;
ref-supply = <&ref_5v>;
reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
pwms = <&pwm_gen 0 0>;
#trigger-source-cells = <1>;
};
};
- |
#include <dt-bindings/gpio/gpio.h>
/* AD4692 in Manual Mode (CNV tied to SPI CS) */
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad4692";
reg = <0>;
spi-cpol;
spi-cpha;
spi-max-frequency = <31250000>;
avdd-supply = <&avdd_supply>;
ldo-in-supply = <&avdd_supply>;
vio-supply = <&vio_supply>;
refin-supply = <&refin_supply>;
reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
};
};

32
Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
View File

@ -14,6 +14,7 @@ properties:
oneOf:
- enum:
- allwinner,sun20i-d1-gpadc
- allwinner,sun55i-a523-gpadc
- items:
- enum:
- allwinner,sun50i-h616-gpadc
@ -29,7 +30,12 @@ properties:
const: 0
clocks:
maxItems: 1
minItems: 1
maxItems: 2
clock-names:
minItems: 1
maxItems: 2
interrupts:
maxItems: 1
@ -40,6 +46,30 @@ properties:
resets:
maxItems: 1
allOf:
- if:
properties:
compatible:
enum:
- allwinner,sun55i-a523-gpadc
then:
properties:
clocks:
items:
- description: Bus clock
- description: Module clock
clock-names:
items:
- const: bus
- const: mod
required:
- clock-names
else:
properties:
clocks:
maxItems: 1
clock-names: false
patternProperties:
"^channel@[0-9a-f]+$":
$ref: adc.yaml

25
Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml
View File

@ -10,14 +10,9 @@ maintainers:
- Andreas Klinger <ak@it-klinger.de>
description: |
Bit-banging driver using two GPIOs:
- sck-gpio gives a clock to the sensor with 24 cycles for data retrieval
and up to 3 cycles for selection of the input channel and gain for the
next measurement
- dout-gpio is the sensor data the sensor responds to the clock
Specifications about the driver can be found at:
http://www.aviaic.com/ENProducts.aspx
The HX711 is a 24-bit ADC with selectable gain (32/64/128) and two
differential input channels. Channel A supports gain 64 and 128;
channel B supports gain 32.
properties:
compatible:
@ -26,23 +21,23 @@ properties:
sck-gpios:
description:
Definition of the GPIO for the clock (output). In the datasheet it is
named PD_SCK
GPIO for the clock output (PD_SCK in the datasheet).
maxItems: 1
dout-gpios:
description:
Definition of the GPIO for the data-out sent by the sensor in
response to the clock (input).
See Documentation/devicetree/bindings/gpio/gpio.txt for information
on how to specify a consumer gpio.
GPIO for the data output from the sensor (DOUT in the datasheet).
maxItems: 1
avdd-supply:
description:
Definition of the regulator used as analog supply
Analog supply voltage (AVDD).
clock-frequency:
description:
Controls the SCK bit-bang timing. The value is used to derive the
delay between SCK edges; keep the SCK high time below 60 us to
avoid triggering chip power-down mode.
minimum: 20000
maximum: 2500000
default: 400000

15
Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml
View File

@ -78,6 +78,10 @@ patternProperties:
reg:
maxItems: 1
label:
description: |
Unique name to identify which channel this is.
qcom,decimation:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
@ -130,36 +134,47 @@ examples:
vcoin: adc-channel@0 {
reg = <0x00 0x00>;
label = "vcoin";
};
vbat: adc-channel@1 {
reg = <0x00 0x01>;
label = "vbat";
};
dcin: adc-channel@2 {
reg = <0x00 0x02>;
label = "dcin";
};
ichg: adc-channel@3 {
reg = <0x00 0x03>;
label = "ichg";
};
vph_pwr: adc-channel@4 {
reg = <0x00 0x04>;
label = "vph_pwr";
};
usb_vbus: adc-channel@a {
reg = <0x00 0x0a>;
label = "usb_vbus";
};
die_temp: adc-channel@b {
reg = <0x00 0x0b>;
label = "die_temp";
};
ref_625mv: adc-channel@c {
reg = <0x00 0x0c>;
label = "ref_625mv";
};
ref_1250mv: adc-channel@d {
reg = <0x00 0x0d>;
label = "ref_1250mv";
};
ref_325mv: adc-channel@e {
reg = <0x00 0x0e>;
label = "ref_325mv";
};
ref_muxoff: adc-channel@f {
reg = <0x00 0x0f>;
label = "ref_muxoff";
};
};
};

2
Documentation/devicetree/bindings/iio/chemical/sensirion,scd30.yaml
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Sensirion SCD30 carbon dioxide sensor
maintainers:
- Tomasz Duszynski <tomasz.duszynski@octakon.com>
- Maxwell Doose <m32285159@gmail.com>
description: |
Air quality sensor capable of measuring co2 concentration, temperature

105
Documentation/devicetree/bindings/iio/dac/adi,ad5706r.yaml Normal file
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@ -0,0 +1,105 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/dac/adi,ad5706r.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD5706R 4-Channel Current Output DAC
maintainers:
- Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
description: |
The AD5706R is a 4-channel, 16-bit resolution, current output
digital-to-analog converter (DAC) with programmable output current
ranges (50mA, 150mA, 200mA, 300mA), an integrated 2.5V voltage
reference, and load DAC, A/B toggle, and dither functions.
Datasheet:
https://www.analog.com/en/products/ad5706r.html
properties:
compatible:
enum:
- adi,ad5706r
reg:
maxItems: 1
avdd-supply:
description: Analog power supply (2.9V to 3.6V).
iovdd-supply:
description: Logic power supply (1.14V to 1.89V).
pvdd0-supply:
description: Power supply for IDAC0 channel (1.65V to AVDD).
pvdd1-supply:
description: Power supply for IDAC1 channel (1.65V to AVDD).
pvdd2-supply:
description: Power supply for IDAC2 channel (1.65V to AVDD).
pvdd3-supply:
description: Power supply for IDAC3 channel (1.65V to AVDD).
vref-supply:
description:
Optional external 2.5V voltage reference. If not provided, the
internal 2.5V reference is used.
pwms:
maxItems: 1
description:
Optional PWM connected to the LDAC/TGP/DCK pin for hardware
triggered DAC updates, toggle, or dither clock generation.
reset-gpios:
maxItems: 1
description:
GPIO connected to the active low RESET pin. If not provided,
software reset is used.
enable-gpios:
maxItems: 1
description:
GPIO connected to the active low OUT_EN pin. Controls whether
the current outputs are enabled or in high-Z/ground state.
required:
- compatible
- reg
- avdd-supply
- iovdd-supply
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
dac@0 {
compatible = "adi,ad5706r";
reg = <0>;
avdd-supply = <&avdd>;
iovdd-supply = <&iovdd>;
pvdd0-supply = <&pvdd>;
pvdd1-supply = <&pvdd>;
pvdd2-supply = <&pvdd>;
pvdd3-supply = <&pvdd>;
vref-supply = <&vref>;
spi-max-frequency = <50000000>;
pwms = <&pwm0 0 1000000 0>;
reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
enable-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
};
};
...

36
Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml
View File

@ -161,8 +161,8 @@ patternProperties:
properties:
reg:
description: The channel number.
minItems: 1
maxItems: 8
minimum: 0
maximum: 7
label:
description: Unique name to identify which channel this is.
@ -280,23 +280,23 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
dac@0 {
compatible = "microchip,mcp47feb02";
reg = <0>;
vdd-supply = <&vdac_vdd>;
vref-supply = <&vref_reg>;
dac@60 {
compatible = "microchip,mcp47feb02";
reg = <0x60>;
vdd-supply = <&vdac_vdd>;
vref-supply = <&vref_reg>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
label = "Adjustable_voltage_ch0";
};
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
label = "Adjustable_voltage_ch0";
};
channel@1 {
reg = <0x1>;
label = "Adjustable_voltage_ch1";
};
};
channel@1 {
reg = <0x1>;
label = "Adjustable_voltage_ch1";
};
};
};
...

6
Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml
View File

@ -26,6 +26,9 @@ properties:
vdd-supply: true
vddio-supply: true
mount-matrix:
description: an optional 3x3 mounting rotation matrix.
spi-max-frequency:
maximum: 10000000
@ -56,6 +59,9 @@ examples:
reg = <0x69>;
interrupt-parent = <&gpio6>;
interrupts = <18 IRQ_TYPE_EDGE_RISING>;
mount-matrix = "0", "1", "0",
"1", "0", "0",
"0", "0", "1";
};
};
...

54
Documentation/devicetree/bindings/iio/light/brcm,apds9999.yaml Normal file
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@ -0,0 +1,54 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/light/brcm,apds9999.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom APDS-9999 Digital Proximity and RGB Sensor
maintainers:
- Jose A. Perez de Azpillaga <azpijr@gmail.com>
description: |
Broadcom APDS-9999 is a digital proximity and RGB sensor with
ambient light sensing (ALS) capability. The device uses individual
R, G, B, and IR channels plus a Vertical Cavity Surface Emitting
Laser (VCSEL) for proximity detection.
Datasheet: https://docs.broadcom.com/docs/APDS-9999-DS
properties:
compatible:
enum:
- brcm,apds9999
reg:
maxItems: 1
vdd-supply: true
vcsel-supply:
description: VCSEL power supply (VVCSEL pin)
interrupts:
maxItems: 1
additionalProperties: false
required:
- compatible
- reg
- vdd-supply
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
light-sensor@52 {
compatible = "brcm,apds9999";
reg = <0x52>;
vdd-supply = <&vdd_reg>;
vcsel-supply = <&vcsel_reg>;
};
};

2
Documentation/devicetree/bindings/iio/light/tsl2772.yaml
View File

@ -26,6 +26,8 @@ properties:
- amstaos,tmd2672
- amstaos,tsl2772
- amstaos,tmd2772
- avago,apds9900
- avago,apds9901
- avago,apds9930
reg:

5
Documentation/devicetree/bindings/iio/light/vishay,veml6030.yaml
View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/iio/light/vishay,veml6030.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: VEML3235, VEML6030, VEML6035 and VEML7700 Ambient Light Sensors (ALS)
title: VEML3235, VEML3328, VEML6030, VEML6035 and VEML7700 Ambient Light Sensors (ALS)
maintainers:
- Rishi Gupta <gupt21@gmail.com>
@ -21,6 +21,7 @@ description: |
Specifications about the sensors can be found at:
https://www.vishay.com/docs/80131/veml3235.pdf
https://www.vishay.com/docs/84968/veml3328.pdf
https://www.vishay.com/docs/84366/veml6030.pdf
https://www.vishay.com/docs/84889/veml6035.pdf
https://www.vishay.com/docs/84286/veml7700.pdf
@ -29,6 +30,7 @@ properties:
compatible:
enum:
- vishay,veml3235
- vishay,veml3328
- vishay,veml6030
- vishay,veml6035
- vishay,veml7700
@ -79,6 +81,7 @@ allOf:
compatible:
enum:
- vishay,veml3235
- vishay,veml3328
- vishay,veml7700
then:
properties:

63
Documentation/devicetree/bindings/iio/magnetometer/memsic,mmc5983.yaml Normal file
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@ -0,0 +1,63 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/magnetometer/memsic,mmc5983.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MEMSIC MMC5983MA 3-axis magnetic sensor
maintainers:
- Vladislav Kulikov <vlad.kulikov.c@gmail.com>
properties:
compatible:
const: memsic,mmc5983
reg:
maxItems: 1
interrupts:
maxItems: 1
vdd-supply:
description: Regulator that provides power to the sensor
vddio-supply:
description: Regulator that provides power to the digital interface and INT pin
required:
- compatible
- reg
- vdd-supply
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
magnetometer@30 {
compatible = "memsic,mmc5983";
reg = <0x30>;
vdd-supply = <&vdd_3v3_reg>;
vddio-supply = <&vdd_3v3_reg>;
};
};
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
magnetometer@0 {
compatible = "memsic,mmc5983";
reg = <0>;
spi-max-frequency = <10000000>;
vdd-supply = <&vdd_3v3_reg>;
vddio-supply = <&vdd_3v3_reg>;
};
};

217
Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml
View File

@ -4,14 +4,18 @@
$id: http://devicetree.org/schemas/iio/temperature/adi,ltc2983.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices LTC2983, LTC2986, LTM2985 Multi-sensor Temperature system
title: Analog Devices LTC2983 and similar Multi-sensor Temperature systems
maintainers:
- Nuno Sá <nuno.sa@analog.com>
description: |
Analog Devices LTC2983, LTC2984, LTC2986, LTM2985 Multi-Sensor Digital
Temperature Measurement Systems
Analog Devices Multi-Sensor Digital Temperature Measurement Systems:
- ADT7604
- LTC2983
- LTC2984
- LTC2986
- LTM2985
https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/2984fb.pdf
@ -43,6 +47,7 @@ properties:
compatible:
oneOf:
- enum:
- adi,adt7604
- adi,ltc2983
- adi,ltc2986
- adi,ltm2985
@ -436,6 +441,121 @@ patternProperties:
required:
- adi,custom-temp
'^copper-trace@':
$ref: '#/$defs/sensor-node'
unevaluatedProperties: false
description: |
Copper trace resistance sensor (some parts only). Two variants exist:
sub-ohm (< 1 ohm, no custom table allowed) and standard (> 1 ohm,
required custom table).
properties:
reg:
minimum: 2
maximum: 20
adi,sensor-type:
description: Sensor type for copper trace sensors.
$ref: /schemas/types.yaml#/definitions/uint32
const: 32
adi,rsense-handle:
description: Associated sense resistor sensor.
$ref: /schemas/types.yaml#/definitions/phandle
adi,copper-trace-sub-ohm:
description:
Select the sub-ohm (< 1 ohm) copper trace variant. Custom table
and excitation current are not allowed in this mode.
type: boolean
adi,excitation-current-microamp:
description:
Excitation current applied to the copper trace. Not used in
sub-ohm mode. The datasheet recommends 1mA for copper trace
sensors due to their typically small resistance.
enum: [5, 10, 25, 50, 100, 250, 500, 1000]
default: 1000
adi,custom-copper-trace:
description:
Resistance-to-temperature table for copper trace sensors with
resistance > 1 ohm. Required when adi,copper-trace-sub-ohm is not
set. See Page 36 of the datasheet.
$ref: /schemas/types.yaml#/definitions/uint64-matrix
minItems: 3
maxItems: 64
items:
items:
- description: Resistance point in uOhms.
- description: Temperature point in uK.
required:
- adi,rsense-handle
allOf:
- if:
required:
- adi,copper-trace-sub-ohm
then:
properties:
adi,custom-copper-trace: false
adi,excitation-current-microamp: false
- if:
not:
required:
- adi,copper-trace-sub-ohm
then:
required:
- adi,custom-copper-trace
'^leak-detector@':
$ref: '#/$defs/sensor-node'
unevaluatedProperties: false
description: |
Leak detector sensor (some parts only). Outputs resistance in ohms and
a coverage percentage via IIO_COVERAGE (raw/1024 = coverage %).
properties:
reg:
minimum: 2
maximum: 20
adi,sensor-type:
description: Sensor type for leak detector sensors.
$ref: /schemas/types.yaml#/definitions/uint32
const: 33
adi,rsense-handle:
description: Associated sense resistor sensor.
$ref: /schemas/types.yaml#/definitions/phandle
adi,excitation-current-nanoamp:
description:
Excitation current applied to the leak detector. The correct value
depends on the electrical characteristics of the liquid being sensed.
For example, 10000 (10µA) is recommended for PG25 (see datasheet
Table 39).
enum: [250, 500, 1000, 5000, 10000, 25000, 50000, 100000, 250000,
500000, 1000000]
adi,custom-leak-detector:
description: |
Lookup table mapping resistance to coverage percentage. Entries must
be in ascending resistance order.
$ref: /schemas/types.yaml#/definitions/uint64-matrix
minItems: 3
maxItems: 64
items:
items:
- description: Resistance point in uOhms.
- description: Coverage data percentage (0 to 100).
required:
- adi,rsense-handle
- adi,excitation-current-nanoamp
- adi,custom-leak-detector
'^rsense@':
$ref: '#/$defs/sensor-node'
unevaluatedProperties: false
@ -477,6 +597,32 @@ allOf:
patternProperties:
'^temp@': false
- if:
properties:
compatible:
contains:
const: adi,adt7604
then:
patternProperties:
'^thermocouple@': false
'^diode@': false
'^adc@': false
'^temp@': false
'^rtd@':
properties:
adi,sensor-type:
not:
const: 18
'^thermistor@':
properties:
adi,sensor-type:
not:
const: 27
else:
patternProperties:
'^copper-trace@': false
'^leak-detector@': false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
@ -556,4 +702,69 @@ examples:
};
};
};
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
temperature-sensor@0 {
compatible = "adi,adt7604";
reg = <0>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
vdd-supply = <&supply>;
trace_rsense: rsense@2 {
reg = <2>;
adi,sensor-type = <29>;
adi,rsense-val-milli-ohms = <100000>; // 100 ohm
};
copper-trace@4 {
reg = <4>;
adi,sensor-type = <32>;
adi,rsense-handle = <&trace_rsense>;
adi,copper-trace-sub-ohm;
};
r_sense: rsense@12 {
reg = <12>;
adi,sensor-type = <29>;
adi,rsense-val-milli-ohms = <1000000>; // 1 kohm
};
leak-detector@14 {
reg = <14>;
adi,sensor-type = <33>;
adi,rsense-handle = <&r_sense>;
adi,excitation-current-nanoamp = <10000>;
adi,custom-leak-detector =
/bits/ 64 < 0 100>,
/bits/ 64 < 202020000 99>,
/bits/ 64 < 285710000 70>,
/bits/ 64 < 333330000 60>,
/bits/ 64 < 400000000 50>,
/bits/ 64 < 500000000 40>,
/bits/ 64 < 666670000 30>,
/bits/ 64 < 1000000000 20>,
/bits/ 64 < 2000000000 10>,
/bits/ 64 <1000000000000 0>;
};
rtd@18 {
reg = <18>;
adi,sensor-type = <12>; // PT100
adi,rsense-handle = <&r_sense>;
adi,number-of-wires = <2>;
adi,rsense-share;
adi,excitation-current-microamp = <500>;
adi,rtd-curve = <0>;
};
};
};
...

131
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@ -0,0 +1,131 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,hawi-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on Hawi
maintainers:
- Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
able to communicate with the BCM through the Resource State Coordinator (RSC)
associated with each execution environment. Provider nodes must point to at
least one RPMh device child node pertaining to their RSC and each provider
can map to multiple RPMh resources.
See also: include/dt-bindings/interconnect/qcom,hawi-rpmh.h
properties:
compatible:
enum:
- qcom,hawi-aggre1-noc
- qcom,hawi-clk-virt
- qcom,hawi-cnoc-main
- qcom,hawi-gem-noc
- qcom,hawi-llclpi-noc
- qcom,hawi-lpass-ag-noc
- qcom,hawi-lpass-lpiaon-noc
- qcom,hawi-lpass-lpicx-noc
- qcom,hawi-mc-virt
- qcom,hawi-mmss-noc
- qcom,hawi-nsp-noc
- qcom,hawi-pcie-anoc
- qcom,hawi-stdst-cfg
- qcom,hawi-stdst-main
- qcom,hawi-system-noc
reg:
maxItems: 1
clocks:
minItems: 2
maxItems: 3
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,hawi-clk-virt
- qcom,hawi-mc-virt
then:
properties:
reg: false
else:
required:
- reg
- if:
properties:
compatible:
contains:
enum:
- qcom,hawi-pcie-anoc
then:
properties:
clocks:
items:
- description: aggre-NOC PCIe AXI clock
- description: cfg-NOC PCIe a-NOC AHB clock
- if:
properties:
compatible:
contains:
enum:
- qcom,hawi-aggre1-noc
then:
properties:
clocks:
items:
- description: aggre UFS PHY AXI clock
- description: aggre USB3 PRIM AXI clock
- description: RPMH CC IPA clock
- if:
properties:
compatible:
contains:
enum:
- qcom,hawi-aggre1-noc
- qcom,hawi-pcie-anoc
then:
required:
- clocks
else:
properties:
clocks: false
unevaluatedProperties: false
examples:
- |
soc {
#address-cells = <2>;
#size-cells = <2>;
clk_virt: interconnect-0 {
compatible = "qcom,hawi-clk-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre_noc: interconnect@f00000 {
compatible = "qcom,hawi-aggre1-noc";
reg = <0x0 0xf00000 0x0 0x54400>;
#interconnect-cells = <2>;
clocks = <&gcc_aggre_ufs_phy_axi_clk>,
<&gcc_aggre_usb3_prim_axi_clk>,
<&rpmhcc_ipa_clk>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
};

2
Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
View File

@ -26,6 +26,7 @@ properties:
- items:
- enum:
- qcom,glymur-cpu-bwmon
- qcom,hawi-cpu-bwmon
- qcom,kaanapali-cpu-bwmon
- qcom,qcm2290-cpu-bwmon
- qcom,qcs615-cpu-bwmon
@ -45,6 +46,7 @@ properties:
- const: qcom,sdm845-bwmon # BWMON v4, unified register space
- items:
- enum:
- qcom,hawi-llcc-bwmon
- qcom,qcs615-llcc-bwmon
- qcom,qcs8300-llcc-bwmon
- qcom,sa8775p-llcc-bwmon

131
Documentation/devicetree/bindings/interconnect/qcom,nord-rpmh.yaml Normal file
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@ -0,0 +1,131 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,nord-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on Nord
maintainers:
- Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
able to communicate with the BCM through the Resource State Coordinator (RSC)
associated with each execution environment. Provider nodes must point to at
least one RPMh device child node pertaining to their RSC and each provider
can map to multiple RPMh resources.
See also: include/dt-bindings/interconnect/qcom,nord-rpmh.h
properties:
compatible:
enum:
- qcom,nord-aggre1-noc
- qcom,nord-aggre1-noc-tile
- qcom,nord-aggre2-noc
- qcom,nord-aggre2-noc-tile
- qcom,nord-clk-virt
- qcom,nord-cnoc-cfg
- qcom,nord-cnoc-main
- qcom,nord-hpass-ag-noc
- qcom,nord-hscnoc
- qcom,nord-mc-virt
- qcom,nord-mmss-noc
- qcom,nord-nsp-data-noc-0
- qcom,nord-nsp-data-noc-1
- qcom,nord-nsp-data-noc-2
- qcom,nord-nsp-data-noc-3
- qcom,nord-pcie-cfg
- qcom,nord-pcie-data-inbound
- qcom,nord-pcie-data-outbound
- qcom,nord-system-noc
reg:
maxItems: 1
clocks:
minItems: 1
maxItems: 4
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,nord-clk-virt
- qcom,nord-mc-virt
then:
properties:
reg: false
else:
required:
- reg
- if:
properties:
compatible:
contains:
enum:
- qcom,nord-aggre1-noc-tile
then:
properties:
clocks:
items:
- description: aggre UFS PHY AXI clock
- description: aggre USB2 AXI clock
- description: aggre USB3 PRIM AXI clock
- description: aggre USB3 SEC AXI clock
- if:
properties:
compatible:
contains:
enum:
- qcom,nord-aggre2-noc
then:
properties:
clocks:
items:
- description: RPMH CC IPA clock
- if:
properties:
compatible:
contains:
enum:
- qcom,nord-aggre1-noc-tile
- qcom,nord-aggre2-noc
then:
required:
- clocks
else:
properties:
clocks: false
unevaluatedProperties: false
examples:
- |
clk_virt: interconnect-clk-virt {
compatible = "qcom,nord-clk-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc_tile: interconnect@1720000 {
compatible = "qcom,nord-aggre1-noc-tile";
reg = <0x01720000 0x23400>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
clocks = <&ne_gcc_aggre_noc_ufs_phy_axi_clk>,
<&ne_gcc_aggre_noc_usb2_axi_clk>,
<&ne_gcc_aggre_noc_usb3_prim_axi_clk>,
<&ne_gcc_aggre_noc_usb3_sec_axi_clk>;
};

13
Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml
View File

@ -79,6 +79,19 @@ allOf:
- const: aggre2_usb3_axi
- const: cfg_noc_usb2_axi
- if:
properties:
compatible:
enum:
- qcom,sdm660-bimc
- qcom,sdm660-cnoc
- qcom,sdm660-gnoc
- qcom,sdm660-snoc
then:
properties:
clocks: false
clock-names: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sdm660.h>

134
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@ -0,0 +1,134 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,shikra.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Shikra Network-On-Chip interconnect
maintainers:
- Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
description:
The Qualcomm Shikra interconnect providers support adjusting the
bandwidth requirements between the various NoC fabrics.
properties:
compatible:
enum:
- qcom,shikra-config-noc
- qcom,shikra-mem-noc-core
- qcom,shikra-sys-noc
reg:
maxItems: 1
clocks:
minItems: 1
maxItems: 4
clock-names:
minItems: 1
maxItems: 4
# Child node's properties
patternProperties:
'^interconnect-[a-z0-9]+$':
type: object
description:
The interconnect providers do not have a separate QoS register space,
but share parent's space.
$ref: qcom,rpm-common.yaml#
properties:
compatible:
enum:
- qcom,shikra-clk-virt
- qcom,shikra-mc-virt
- qcom,shikra-mmrt-virt
- qcom,shikra-mmnrt-virt
required:
- compatible
unevaluatedProperties: false
required:
- compatible
- reg
allOf:
- $ref: qcom,rpm-common.yaml#
- if:
properties:
compatible:
const: qcom,shikra-mem-noc-core
then:
properties:
clocks:
items:
- description: GPU-NoC AXI clock
clock-names:
items:
- const: gpu_axi
patternProperties:
'^interconnect-[a-z0-9]+$': false
- if:
properties:
compatible:
const: qcom,shikra-sys-noc
then:
properties:
clocks:
items:
- description: EMAC0-NoC AXI clock.
- description: EMAC1-NoC AXI clock.
- description: USB2-NoC AXI clock.
- description: USB3-NoC AXI clock.
clock-names:
items:
- const: emac0_axi
- const: emac1_axi
- const: usb2_axi
- const: usb3_axi
- if:
properties:
compatible:
const: qcom,shikra-config-noc
then:
properties:
clocks: false
clock-names: false
patternProperties:
'^interconnect-[a-z0-9]+$': false
unevaluatedProperties: false
examples:
- |
interconnect@1880000 {
compatible = "qcom,shikra-sys-noc";
reg = <0x01880000 0x6a080>;
#interconnect-cells = <2>;
clocks = <&gcc_emac0_axi_sys_noc_clk>,
<&gcc_emac1_axi_sys_noc_clk>,
<&gcc_sys_noc_usb2_prim_axi_clk>,
<&gcc_sys_noc_usb3_prim_axi_clk>;
clock-names = "emac0_axi",
"emac1_axi",
"usb2_axi",
"usb3_axi";
interconnect-clk {
compatible = "qcom,shikra-clk-virt";
#interconnect-cells = <2>;
};
};

33
Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml
View File

@ -62,23 +62,33 @@ allOf:
- if:
properties:
compatible:
const: qcom,sm6115-cnoc
const: qcom,sm6115-bimc
then:
properties:
clocks: false
clock-names: false
patternProperties:
'^interconnect-[a-z0-9]+$': false
- if:
properties:
compatible:
const: qcom,sm6115-cnoc
then:
properties:
clocks:
items:
- description: USB-NoC AXI clock
clock-names:
items:
- const: usb_axi
patternProperties:
'^interconnect-[a-z0-9]+$': false
- if:
properties:
compatible:
const: qcom,sm6115-snoc
then:
properties:
clocks:
@ -87,7 +97,6 @@ allOf:
- description: UFS-NoC AXI clock.
- description: USB-NoC AXI clock.
- description: IPA clock.
clock-names:
items:
- const: cpu_axi
@ -95,20 +104,6 @@ allOf:
- const: usb_axi
- const: ipa
- if:
properties:
compatible:
enum:
- qcom,sm6115-bimc
- qcom,sm6115-clk-virt
- qcom,sm6115-mmrt-virt
- qcom,sm6115-mmnrt-virt
then:
properties:
clocks: false
clock-names: false
unevaluatedProperties: false
examples:
@ -149,4 +144,6 @@ examples:
compatible = "qcom,sm6115-cnoc";
reg = <0x01900000 0x8200>;
#interconnect-cells = <1>;
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>;
clock-names = "usb_axi";
};

2
Documentation/devicetree/bindings/vendor-prefixes.yaml
View File

@ -491,6 +491,8 @@ patternProperties:
description: Emtop Embedded Solutions
"^eeti,.*":
description: eGalax_eMPIA Technology Inc
"^efinix,.*":
description: Efinix, Inc.
"^egnite,.*":
description: egnite GmbH
"^einfochips,.*":

7
Documentation/driver-api/iio/buffers.rst
View File

@ -37,9 +37,10 @@ directory contains attributes of the following form:
* :file:`index`, the scan_index of the channel.
* :file:`type`, description of the scan element data storage within the buffer
and hence the form in which it is read from user space.
Format is [be|le]:[s|u]bits/storagebits[Xrepeat][>>shift] .
Format is [be|le]:[f|s|u]bits/storagebits[Xrepeat][>>shift] .
* *be* or *le*, specifies big or little endian.
* *f*, specifies if floating-point.
* *s* or *u*, specifies if signed (2's complement) or unsigned.
* *bits*, is the number of valid data bits.
* *storagebits*, is the number of bits (after padding) that it occupies in the
@ -78,7 +79,7 @@ fields in iio_chan_spec definition::
/* other members */
int scan_index
struct {
char sign;
char format;
u8 realbits;
u8 storagebits;
u8 shift;
@ -98,7 +99,7 @@ following channel definition::
/* other stuff here */
.scan_index = 0,
.scan_type = {
.sign = 's',
.format = IIO_SCAN_FORMAT_SIGNED_INT,
.realbits = 12,
.storagebits = 16,
.shift = 4,

10
Documentation/driver-api/iio/triggered-buffers.rst
View File

@ -29,21 +29,21 @@ A typical triggered buffer setup looks like this::
irqreturn_t sensor_trigger_handler(int irq, void *p)
{
u16 buf[8];
IIO_DECLARE_BUFFER_WITH_TS(u16, buf, 3) = { };
int i = 0;
/* read data for each active channel */
for_each_set_bit(bit, active_scan_mask, masklength)
buf[i++] = sensor_get_data(bit)
iio_for_each_active_channel(indio_dev, bit)
buf[i++] = sensor_get_data(bit);
iio_push_to_buffers_with_timestamp(indio_dev, buf, timestamp);
iio_push_to_buffers_with_ts(indio_dev, buf, sizeof(buf), timestamp);
iio_trigger_notify_done(trigger);
return IRQ_HANDLED;
}
/* setup triggered buffer, usually in probe function */
iio_triggered_buffer_setup(indio_dev, sensor_iio_polfunc,
iio_triggered_buffer_setup(indio_dev, sensor_iio_pollfunc,
sensor_trigger_handler,
sensor_buffer_setup_ops);

227
Documentation/iio/ad4691.rst Normal file
View File

@ -0,0 +1,227 @@
.. SPDX-License-Identifier: GPL-2.0-only
=============
AD4691 driver
=============
ADC driver for Analog Devices Inc. AD4691 family of multichannel SAR ADCs.
The module name is ``ad4691``.
Supported devices
=================
The following chips are supported by this driver:
* `AD4691 <https://www.analog.com/en/products/ad4691.html>`_ — 16-channel, 500 kSPS
* `AD4692 <https://www.analog.com/en/products/ad4692.html>`_ — 16-channel, 1 MSPS
* `AD4693 <https://www.analog.com/en/products/ad4693.html>`_ — 8-channel, 500 kSPS
* `AD4694 <https://www.analog.com/en/products/ad4694.html>`_ — 8-channel, 1 MSPS
IIO channels
============
Each physical ADC input maps to one IIO voltage channel. The AD4691 and AD4692
expose 16 channels (``voltage0`` through ``voltage15``); the AD4693 and AD4694
expose 8 channels (``voltage0`` through ``voltage7``).
All channels share a common scale (``in_voltage_scale``), derived from the
reference voltage. Each channel exposes:
* ``in_voltageN_raw`` — single-shot ADC result
The following attributes are shared across all channels:
* ``in_voltage_sampling_frequency`` — effective output rate, defined as the
internal oscillator frequency divided by the oversampling ratio. Writing this
attribute selects the nearest achievable rate for the current OSR; the value
read back reflects the actual rate after snapping to the closest valid
oscillator entry.
* ``in_voltage_sampling_frequency_available`` — list of achievable effective
rates for the current oversampling ratio. The list updates dynamically when
the oversampling ratio changes.
The following attributes are shared across all channels and only available in
CNV Burst Mode:
* ``in_voltage_oversampling_ratio`` — hardware oversampling depth applied to
all channels; see `Oversampling`_ below.
* ``in_voltage_oversampling_ratio_available`` — valid ratios: 1, 2, 4, 8, 16,
32.
Operating modes
===============
The driver supports two operating modes, selected automatically from the
device tree at probe time.
Manual Mode
-----------
Selected when no ``pwms`` property is present in the device tree. The CNV pin
is tied to the SPI chip-select: every CS assertion triggers a conversion and
returns the previous result. A user-defined IIO trigger (e.g. hrtimer trigger)
drives the buffer.
Oversampling is not supported in Manual Mode.
CNV Burst Mode
--------------
Selected when a ``pwms`` property is present in the device tree. A PWM drives
the CNV pin at the configured conversion rate. A GP pin wired to the SoC and
declared in the device tree signals DATA_READY at the end of each burst,
triggering a readout of all active channel results into the IIO buffer.
The buffer output rate is controlled by the ``sampling_frequency`` attribute
on the IIO buffer. In practice the PWM rate should be set low enough to allow
the SPI readout to complete before the next conversion burst begins.
Autonomous Mode (idle / single-shot)
-------------------------------------
When the IIO buffer is disabled, ``in_voltageN_raw`` reads perform a single
conversion on the requested channel using the internal oscillator. The
oscillator is started and stopped around each read to save power.
Oversampling
============
In CNV Burst Mode a shared hardware accumulator averages a configurable number
of successive conversions across all active channels. The result is always a
16-bit mean, so the buffer data type (shown in ``buffer0/in_voltageN_type``)
is unaffected by the oversampling ratio. Valid ratios are 1, 2, 4, 8, 16 and
32; the default is 1 (no averaging). Oversampling is not supported in Manual
Mode.
.. code-block:: bash
# Set oversampling ratio to 16 (shared across all channels)
echo 16 > /sys/bus/iio/devices/iio:device0/in_voltage_oversampling_ratio
# Read the resulting effective sampling frequency
cat /sys/bus/iio/devices/iio:device0/in_voltage_sampling_frequency
Writing ``in_voltage_oversampling_ratio`` stores the new shared depth and snaps
the internal oscillator to the largest valid table entry that is both less than
or equal to ``old_effective_rate × new_osr`` and evenly divisible by
``new_osr``. This preserves an integer read-back of
``in_voltage_sampling_frequency`` after the change and keeps the oscillator as
close as possible to the previous effective rate.
Reference voltage
=================
The driver supports two reference configurations, mutually exclusive:
* **External reference** (``ref-supply``): a voltage between 2.4 V and 5.25 V
supplied externally.
* **Buffered internal reference** (``refin-supply``): an internal reference
buffer is enabled by the driver.
Exactly one of ``ref-supply`` or ``refin-supply`` must be present in the
device tree. The reference voltage determines the full-scale range reported
via ``in_voltage_scale``.
LDO supply
==========
The chip contains an internal LDO that powers part of the analog front-end.
The supply configuration is mutually exclusive:
* **External VDD** (``vdd-supply``): an external 1.8 V supply is used directly;
the internal LDO is disabled.
* **Internal LDO** (``ldo-in-supply``): the internal LDO is enabled and fed
from the ``ldo-in`` regulator. Use this when no external 1.8 V VDD is present.
Exactly one of ``vdd-supply`` or ``ldo-in-supply`` must be provided.
Reset
=====
The driver supports two reset mechanisms:
* **Hardware reset** (``reset-gpios`` in device tree): the GPIO line is
asserted then deasserted at probe; the driver waits 300 µs for the chip
to complete its internal reset sequence before accepting SPI commands.
* **Software reset** (fallback when ``reset-gpios`` is absent): written
automatically at probe.
GP pins and interrupts
======================
The chip exposes up to four general-purpose (GP) pins. In CNV Burst Mode
(non-offload), one GP pin must be wired to an interrupt-capable SoC input and
declared in the device tree using the ``interrupts`` and ``interrupt-names``
properties. The ``interrupt-names`` value identifies which GP pin is used
(``"gp0"`` through ``"gp3"``).
Example device tree fragment::
adc@0 {
compatible = "adi,ad4692";
...
interrupt-parent = <&gpio0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp0";
};
SPI offload support
===================
When a SPI offload engine (e.g. the AXI SPI Engine) is present, the driver
uses DMA-backed transfers for CPU-independent, high-throughput data capture.
SPI offload is detected automatically at probe; if no offload hardware is
available the driver falls back to the software triggered-buffer path.
Two SPI offload sub-modes exist:
CNV Burst offload
-----------------
Used when a ``pwms`` property is present and SPI offload is available. The PWM
drives CNV at the configured rate; on DATA_READY the offload engine reads all
active channel results and streams them directly to the IIO DMA buffer with no
CPU involvement. The GP pin used as DATA_READY trigger is supplied by the
trigger-source consumer at buffer enable time; no ``interrupt-names`` entry is
required.
Manual offload
--------------
Used when no ``pwms`` property is present and SPI offload is available. A
periodic SPI offload trigger controls the conversion rate and the offload engine
streams results directly to the IIO DMA buffer.
The ``sampling_frequency`` attribute on the IIO buffer controls the trigger
rate (in Hz). The initial rate is 100 kHz.
Oversampling is not supported in Manual Mode.
Buffer data format
==================
The sample format in the IIO buffer depends on whether SPI offload is in use.
Software triggered-buffer path (no SPI offload)
------------------------------------------------
Each active channel occupies one 16-bit big-endian slot (``storagebits=16``,
``endianness=be``). Active channels are packed densely in scan-index order,
followed by a 64-bit software timestamp appended by the IIO core.
SPI offload path
----------------
Each active channel occupies one 16-bit CPU-native slot (``storagebits=16``,
``endianness=cpu``). The SPI offload engine streams 16-bit words directly from
the SPI Engine into the DMA buffer; no software timestamp is appended.

10
Documentation/iio/adxl313.rst
View File

@ -11,7 +11,7 @@ This driver supports Analog Device's ADXL313 on SPI/I2C bus.
* `ADXL313 <https://www.analog.com/ADXL313>`_
The ADXL313is a low noise density, low power, 3-axis accelerometer with
The ADXL313 is a low noise density, low power, 3-axis accelerometer with
selectable measurement ranges. The ADXL313 supports the ±0.5 g, ±1 g, ±2 g and
±4 g ranges.
@ -38,7 +38,7 @@ specific device folder path ``/sys/bus/iio/devices/iio:deviceX``.
+---------------------------------------------------+----------------------------------------------------------+
| in_accel_x_raw | Raw X-axis accelerometer channel value. |
+---------------------------------------------------+----------------------------------------------------------+
| in_accel_y_calibbias | y-axis acceleration offset correction |
| in_accel_y_calibbias | Calibration offset for the Y-axis accelerometer channel. |
+---------------------------------------------------+----------------------------------------------------------+
| in_accel_y_raw | Raw Y-axis accelerometer channel value. |
+---------------------------------------------------+----------------------------------------------------------+
@ -112,9 +112,9 @@ apply the following formula:
Where _offset and _scale are device attributes. If no _offset attribute is
present, simply assume its value is 0.
The ADXL313 driver offers data for a single types of channels, the table below
shows the measurement units for the processed value, which are defined by the
IIO framework:
The ADXL313 driver offers data for multiple channels of a single type.
The table below shows the measurement units for the processed value,
which are defined by the IIO framework:
+-------------------------------------+---------------------------+
| Channel type | Measurement unit |

2
Documentation/iio/adxl345.rst
View File

@ -47,7 +47,7 @@ specific device folder path ``/sys/bus/iio/devices/iio:deviceX``.
+-------------------------------------------+----------------------------------------------------------+
| in_accel_x_raw | Raw X-axis accelerometer channel value. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_y_calibbias | Y-axis acceleration offset correction |
| in_accel_y_calibbias | Calibration offset for the Y-axis accelerometer channel. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_y_raw | Raw Y-axis accelerometer channel value. |
+-------------------------------------------+----------------------------------------------------------+

2
Documentation/iio/adxl380.rst
View File

@ -51,7 +51,7 @@ specific device folder path ``/sys/bus/iio/devices/iio:deviceX``.
+---------------------------------------------------+----------------------------------------------------------+
| in_accel_x_raw | Raw X-axis accelerometer channel value. |
+---------------------------------------------------+----------------------------------------------------------+
| in_accel_y_calibbias | y-axis acceleration offset correction |
| in_accel_y_calibbias | Calibration offset for the Y-axis accelerometer channel. |
+---------------------------------------------------+----------------------------------------------------------+
| in_accel_y_raw | Raw Y-axis accelerometer channel value. |
+---------------------------------------------------+----------------------------------------------------------+

3
Documentation/iio/iio_devbuf.rst
View File

@ -83,9 +83,10 @@ and the relevant _type attributes to establish the data storage format.
Read-only attribute containing the description of the scan element data storage
within the buffer and hence the form in which it is read from userspace. Format
is [be|le]:[s|u]bits/storagebits[Xrepeat][>>shift], where:
is [be|le]:[f|s|u]bits/storagebits[Xrepeat][>>shift], where:
- **be** or **le** specifies big or little-endian.
- **f** specifies if floating-point.
- **s** or **u** specifies if signed (2's complement) or unsigned.
- **bits** is the number of valid data bits.
- **storagebits** is the number of bits (after padding) that it occupies in the

1
Documentation/iio/index.rst
View File

@ -23,6 +23,7 @@ Industrial I/O Kernel Drivers
ad4000
ad4030
ad4062
ad4691
ad4695
ad7191
ad7380

128
Documentation/misc-devices/apds990x.rst
View File

@ -1,128 +0,0 @@
.. SPDX-License-Identifier: GPL-2.0
======================
Kernel driver apds990x
======================
Supported chips:
Avago APDS990X
Data sheet:
Not freely available
Author:
Samu Onkalo <samu.p.onkalo@nokia.com>
Description
-----------
APDS990x is a combined ambient light and proximity sensor. ALS and proximity
functionality are highly connected. ALS measurement path must be running
while the proximity functionality is enabled.
ALS produces raw measurement values for two channels: Clear channel
(infrared + visible light) and IR only. However, threshold comparisons happen
using clear channel only. Lux value and the threshold level on the HW
might vary quite much depending the spectrum of the light source.
Driver makes necessary conversions to both directions so that user handles
only lux values. Lux value is calculated using information from the both
channels. HW threshold level is calculated from the given lux value to match
with current type of the lightning. Sometimes inaccuracy of the estimations
lead to false interrupt, but that doesn't harm.
ALS contains 4 different gain steps. Driver automatically
selects suitable gain step. After each measurement, reliability of the results
is estimated and new measurement is triggered if necessary.
Platform data can provide tuned values to the conversion formulas if
values are known. Otherwise plain sensor default values are used.
Proximity side is little bit simpler. There is no need for complex conversions.
It produces directly usable values.
Driver controls chip operational state using pm_runtime framework.
Voltage regulators are controlled based on chip operational state.
SYSFS
-----
chip_id
RO - shows detected chip type and version
power_state
RW - enable / disable chip. Uses counting logic
1 enables the chip
0 disables the chip
lux0_input
RO - measured lux value
sysfs_notify called when threshold interrupt occurs
lux0_sensor_range
RO - lux0_input max value.
Actually never reaches since sensor tends
to saturate much before that. Real max value varies depending
on the light spectrum etc.
lux0_rate
RW - measurement rate in Hz
lux0_rate_avail
RO - supported measurement rates
lux0_calibscale
RW - calibration value.
Set to neutral value by default.
Output results are multiplied with calibscale / calibscale_default
value.
lux0_calibscale_default
RO - neutral calibration value
lux0_thresh_above_value
RW - HI level threshold value.
All results above the value
trigs an interrupt. 65535 (i.e. sensor_range) disables the above
interrupt.
lux0_thresh_below_value
RW - LO level threshold value.
All results below the value
trigs an interrupt. 0 disables the below interrupt.
prox0_raw
RO - measured proximity value
sysfs_notify called when threshold interrupt occurs
prox0_sensor_range
RO - prox0_raw max value (1023)
prox0_raw_en
RW - enable / disable proximity - uses counting logic
- 1 enables the proximity
- 0 disables the proximity
prox0_reporting_mode
RW - trigger / periodic.
In "trigger" mode the driver tells two possible
values: 0 or prox0_sensor_range value. 0 means no proximity,
1023 means proximity. This causes minimal number of interrupts.
In "periodic" mode the driver reports all values above
prox0_thresh_above. This causes more interrupts, but it can give
_rough_ estimate about the distance.
prox0_reporting_mode_avail
RO - accepted values to prox0_reporting_mode (trigger, periodic)
prox0_thresh_above_value
RW - threshold level which trigs proximity events.

1
Documentation/misc-devices/index.rst
View File

@ -13,7 +13,6 @@ fit into other categories.
ad525x_dpot
amd-sbi
apds990x
bh1770glc
c2port
dw-xdata-pcie

1
Documentation/userspace-api/ioctl/ioctl-number.rst
View File

@ -340,7 +340,6 @@ Code Seq# Include File Comments
0xA2 all uapi/linux/acrn.h ACRN hypervisor
0xA3 80-8F Port ACL in development:
<mailto:tlewis@mindspring.com>
0xA3 90-9F linux/dtlk.h
0xA4 00-1F uapi/linux/tee.h Generic TEE subsystem
0xA4 00-1F uapi/asm/sgx.h <mailto:linux-sgx@vger.kernel.org>
0xA5 01-05 linux/surface_aggregator/cdev.h Microsoft Surface Platform System Aggregator

59
MAINTAINERS
View File

@ -640,7 +640,7 @@ F: drivers/iio/accel/adxl355_i2c.c
F: drivers/iio/accel/adxl355_spi.c
ADXL367 THREE-AXIS DIGITAL ACCELEROMETER DRIVER
M: Cosmin Tanislav <cosmin.tanislav@analog.com>
M: Marcelo Schmitt <marcelo.schmitt@analog.com>
L: linux-iio@vger.kernel.org
S: Supported
W: https://ez.analog.com/linux-software-drivers
@ -1492,7 +1492,7 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
F: drivers/iio/adc/ad4080.c
ANALOG DEVICES INC AD4130 DRIVER
M: Cosmin Tanislav <cosmin.tanislav@analog.com>
M: Marcelo Schmitt <marcelo.schmitt@analog.com>
L: linux-iio@vger.kernel.org
S: Supported
W: https://ez.analog.com/linux-software-drivers
@ -1516,6 +1516,15 @@ W: https://ez.analog.com/linux-software-drivers
F: Documentation/devicetree/bindings/iio/adc/adi,ad4170-4.yaml
F: drivers/iio/adc/ad4170-4.c
ANALOG DEVICES INC AD4691 DRIVER
M: Radu Sabau <radu.sabau@analog.com>
L: linux-iio@vger.kernel.org
S: Supported
W: https://ez.analog.com/linux-software-drivers
F: Documentation/devicetree/bindings/iio/adc/adi,ad4691.yaml
F: Documentation/iio/ad4691.rst
F: drivers/iio/adc/ad4691.c
ANALOG DEVICES INC AD4695 DRIVER
M: Michael Hennerich <michael.hennerich@analog.com>
M: Nuno Sá <nuno.sa@analog.com>
@ -1538,6 +1547,14 @@ W: https://ez.analog.com/linux-software-drivers
F: Documentation/devicetree/bindings/iio/adc/adi,ad4851.yaml
F: drivers/iio/adc/ad4851.c
ANALOG DEVICES INC AD5706R DRIVER
M: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
L: linux-iio@vger.kernel.org
S: Supported
W: https://ez.analog.com/linux-software-drivers
F: Documentation/devicetree/bindings/iio/dac/adi,ad5706r.yaml
F: drivers/iio/dac/ad5706r.c
ANALOG DEVICES INC AD7091R DRIVER
M: Marcelo Schmitt <marcelo.schmitt@analog.com>
L: linux-iio@vger.kernel.org
@ -1580,7 +1597,7 @@ F: Documentation/devicetree/bindings/iio/dac/adi,ad7293.yaml
F: drivers/iio/dac/ad7293.c
ANALOG DEVICES INC AD74115 DRIVER
M: Cosmin Tanislav <cosmin.tanislav@analog.com>
M: Marcelo Schmitt <marcelo.schmitt@analog.com>
L: linux-iio@vger.kernel.org
S: Supported
W: https://ez.analog.com/linux-software-drivers
@ -1588,7 +1605,7 @@ F: Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml
F: drivers/iio/addac/ad74115.c
ANALOG DEVICES INC AD74413R DRIVER
M: Cosmin Tanislav <cosmin.tanislav@analog.com>
M: Marcelo Schmitt <marcelo.schmitt@analog.com>
L: linux-iio@vger.kernel.org
S: Supported
W: https://ez.analog.com/linux-software-drivers
@ -1884,8 +1901,9 @@ W: https://ez.analog.com/linux-software-drivers
F: drivers/dma/dma-axi-dmac.c
ANALOG DEVICES INC IIO DRIVERS
M: Lars-Peter Clausen <lars@metafoo.de>
M: Nuno Sá <nuno.sa@analog.com>
M: Michael Hennerich <Michael.Hennerich@analog.com>
L: linux@analog.com
S: Supported
W: http://wiki.analog.com/
W: https://ez.analog.com/linux-software-drivers
@ -5041,6 +5059,13 @@ S: Maintained
F: Documentation/devicetree/bindings/iio/light/brcm,apds9160.yaml
F: drivers/iio/light/apds9160.c
BROADCOM APDS9999 AMBIENT LIGHT SENSOR DRIVER
M: Jose A. Perez de Azpillaga <azpijr@gmail.com>
L: linux-iio@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/iio/light/brcm,apds9999.yaml
F: drivers/iio/light/apds9999.c
BROADCOM ASP 2.0 ETHERNET DRIVER
M: Justin Chen <justin.chen@broadcom.com>
M: Florian Fainelli <florian.fainelli@broadcom.com>
@ -7787,13 +7812,6 @@ T: git git://linuxtv.org/media.git
F: Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.yaml
F: drivers/media/i2c/dw9807-vcm.c
DOUBLETALK DRIVER
M: "James R. Van Zandt" <jrv@vanzandt.mv.com>
L: blinux-list@redhat.com
S: Maintained
F: drivers/char/dtlk.c
F: include/linux/dtlk.h
DPAA2 DATAPATH I/O (DPIO) DRIVER
M: Roy Pledge <Roy.Pledge@nxp.com>
L: linux-kernel@vger.kernel.org
@ -12582,6 +12600,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git
F: Documentation/ABI/testing/configfs-iio*
F: Documentation/ABI/testing/sysfs-bus-iio*
F: Documentation/devicetree/bindings/iio/
F: Documentation/driver-api/iio/
F: Documentation/iio/
F: drivers/iio/
F: drivers/staging/iio/
@ -17333,6 +17352,13 @@ F: drivers/mtd/
F: include/linux/mtd/
F: include/uapi/mtd/
MEMSIC MMC5983 MAGNETOMETER DRIVER
M: Vladislav Kulikov <vlad.kulikov.c@gmail.com>
L: linux-iio@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/iio/magnetometer/memsic,mmc5983.yaml
F: drivers/iio/magnetometer/mmc5983.c
MEN A21 WATCHDOG DRIVER
M: Johannes Thumshirn <morbidrsa@gmail.com>
L: linux-watchdog@vger.kernel.org
@ -22835,7 +22861,7 @@ F: Documentation/devicetree/bindings/mtd/renesas-nandc.yaml
F: drivers/mtd/nand/raw/renesas-nand-controller.c
RENESAS R-CAR GYROADC DRIVER
M: Marek Vasut <marek.vasut@gmail.com>
M: Marek Vasut <marek.vasut+renesas@mailbox.org>
L: linux-iio@vger.kernel.org
S: Supported
F: Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml
@ -24459,7 +24485,7 @@ F: Documentation/devicetree/bindings/iio/chemical/senseair,sunrise.yaml
F: drivers/iio/chemical/sunrise_co2.c
SENSIRION SCD30 CARBON DIOXIDE SENSOR DRIVER
M: Tomasz Duszynski <tomasz.duszynski@octakon.com>
M: Maxwell Doose <m32285159@gmail.com>
S: Maintained
F: Documentation/devicetree/bindings/iio/chemical/sensirion,scd30.yaml
F: drivers/iio/chemical/scd30.h
@ -28677,6 +28703,11 @@ S: Maintained
F: Documentation/devicetree/bindings/iio/light/vishay,veml6030.yaml
F: drivers/iio/light/veml3235.c
VISHAY VEML3328 RGB IR LIGHT SENSOR DRIVER
M: Joshua Crofts <joshua.crofts1@gmail.com>
S: Maintained
F: drivers/iio/light/veml3328.c
VISHAY VEML6030 AMBIENT LIGHT SENSOR DRIVER
M: Javier Carrasco <javier.carrasco.cruz@gmail.com>
S: Maintained

1
arch/powerpc/configs/ppc6xx_defconfig
View File

@ -572,7 +572,6 @@ CONFIG_PPDEV=m
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=m
CONFIG_NVRAM=y
CONFIG_DTLK=m
CONFIG_IPWIRELESS=m
CONFIG_I2C_CHARDEV=m
CONFIG_I2C_HYDRA=m

6
drivers/android/binder.c
View File

@ -3080,12 +3080,10 @@ static void binder_transaction(struct binder_proc *proc,
int t_debug_id = atomic_inc_return(&binder_last_id);
ktime_t t_start_time = ktime_get();
struct lsm_context lsmctx = { };
struct list_head sgc_head;
struct list_head pf_head;
LIST_HEAD(sgc_head);
LIST_HEAD(pf_head);
const void __user *user_buffer = (const void __user *)
(uintptr_t)tr->data.ptr.buffer;
INIT_LIST_HEAD(&sgc_head);
INIT_LIST_HEAD(&pf_head);
e = binder_transaction_log_add(&binder_transaction_log);
e->debug_id = t_debug_id;

24
drivers/android/binder/page_range.rs
View File

@ -705,7 +705,7 @@ fn drop(self: Pin<&mut Self>) {
let page;
let page_index;
let mm;
let mmap_read;
let vma_read;
let mm_mutex;
let vma_addr;
let range_ptr;
@ -728,17 +728,18 @@ fn drop(self: Pin<&mut Self>) {
None => return LRU_SKIP,
};
mmap_read = match mm.mmap_read_trylock() {
Some(guard) => guard,
None => return LRU_SKIP,
};
// We can't lock it normally here, since we hold the lru lock.
let inner = match range.lock.try_lock() {
Some(inner) => inner,
None => return LRU_SKIP,
};
vma_addr = inner.vma_addr;
vma_read = match mm.lock_vma_under_rcu(vma_addr) {
Some(guard) => guard,
None => return LRU_SKIP,
};
// SAFETY: The item is in this lru list, so it's okay to remove it.
unsafe { bindings::list_lru_isolate(lru, item) };
@ -751,7 +752,6 @@ fn drop(self: Pin<&mut Self>) {
// `zap_page_range` before we release the mmap lock, so `use_page_slow` will not be able to
// insert a new page until after our call to `zap_page_range`.
page = unsafe { PageInfo::take_page(info) };
vma_addr = inner.vma_addr;
// From this point on, we don't access this PageInfo or ShrinkablePageRange again, because
// they can be freed at any point after we unlock `lru_lock`. This is with the exception of
@ -761,14 +761,12 @@ fn drop(self: Pin<&mut Self>) {
// SAFETY: The lru lock is locked when this method is called.
unsafe { bindings::spin_unlock(&raw mut (*lru).lock) };
if let Some(unchecked_vma) = mmap_read.vma_lookup(vma_addr) {
if let Some(vma) = check_vma(unchecked_vma, range_ptr) {
let user_page_addr = vma_addr + (page_index << PAGE_SHIFT);
vma.zap_vma_range(user_page_addr, PAGE_SIZE);
}
if let Some(vma) = check_vma(&vma_read, range_ptr) {
let user_page_addr = vma_addr + (page_index << PAGE_SHIFT);
vma.zap_vma_range(user_page_addr, PAGE_SIZE);
}
drop(mmap_read);
drop(vma_read);
drop(mm_mutex);
drop(mm);
drop(page);

11
drivers/bus/mhi/ep/main.c
View File

@ -232,7 +232,9 @@ static int mhi_ep_process_cmd_ring(struct mhi_ep_ring *ring, struct mhi_ring_ele
ret = mhi_ep_create_device(mhi_cntrl, ch_id);
if (ret) {
dev_err(dev, "Error creating device for channel (%u)\n", ch_id);
mutex_lock(&mhi_cntrl->state_lock);
mhi_ep_handle_syserr(mhi_cntrl);
mutex_unlock(&mhi_cntrl->state_lock);
return ret;
}
}
@ -1087,11 +1089,12 @@ static void mhi_ep_reset_worker(struct work_struct *work)
mhi_ep_power_down(mhi_cntrl);
mutex_lock(&mhi_cntrl->state_lock);
/* Reset MMIO to signal host that the MHI_RESET is completed in endpoint */
mhi_ep_mmio_reset(mhi_cntrl);
mutex_lock(&mhi_cntrl->state_lock);
cur_state = mhi_cntrl->mhi_state;
mutex_unlock(&mhi_cntrl->state_lock);
/*
* Only proceed further if the reset is due to SYS_ERR. The host will
@ -1100,8 +1103,6 @@ static void mhi_ep_reset_worker(struct work_struct *work)
*/
if (cur_state == MHI_STATE_SYS_ERR)
mhi_ep_power_up(mhi_cntrl);
mutex_unlock(&mhi_cntrl->state_lock);
}
/*
@ -1148,7 +1149,9 @@ int mhi_ep_power_up(struct mhi_ep_cntrl *mhi_cntrl)
for (i = 0; i < mhi_cntrl->event_rings; i++)
mhi_ep_ring_init(&mhi_cntrl->mhi_event[i].ring, RING_TYPE_ER, i);
mutex_lock(&mhi_cntrl->state_lock);
mhi_cntrl->mhi_state = MHI_STATE_RESET;
mutex_unlock(&mhi_cntrl->state_lock);
/* Set AMSS EE before signaling ready state */
mhi_ep_mmio_set_env(mhi_cntrl, MHI_EE_AMSS);

36
drivers/bus/mhi/host/pci_generic.c
View File

@ -914,6 +914,16 @@ static const struct mhi_pci_dev_info mhi_telit_fe912c04_info = {
.edl_trigger = true,
};
static const struct mhi_pci_dev_info mhi_telit_fe910c04_info = {
.name = "telit-fe910c04",
.config = &modem_telit_fn920c04_config,
.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
.dma_data_width = 32,
.sideband_wake = false,
.mru_default = 32768,
.edl_trigger = true,
};
static const struct mhi_pci_dev_info mhi_netprisma_lcur57_info = {
.name = "netprisma-lcur57",
.edl = "qcom/prog_firehose_sdx24.mbn",
@ -941,6 +951,9 @@ static const struct pci_device_id mhi_pci_id_table[] = {
/* Telit FN920C04 (sdx35) */
{PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x011a, 0x1c5d, 0x2020),
.driver_data = (kernel_ulong_t) &mhi_telit_fn920c04_info },
/* Telit FE910C04 (sdx35) */
{PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x011a, 0x1c5d, 0x202a),
.driver_data = (kernel_ulong_t) &mhi_telit_fe910c04_info },
/* Telit FE912C04 (sdx35) */
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x011a, 0x1c5d, 0x2045),
.driver_data = (kernel_ulong_t) &mhi_telit_fe912c04_info },
@ -1189,7 +1202,8 @@ static int mhi_pci_get_irqs(struct mhi_controller *mhi_cntrl,
*/
mhi_cntrl->nr_irqs = 1 + mhi_cntrl_config->num_events;
nr_vectors = pci_alloc_irq_vectors(pdev, 1, mhi_cntrl->nr_irqs, PCI_IRQ_MSIX | PCI_IRQ_MSI);
nr_vectors = pci_alloc_irq_vectors(pdev, 1, roundup_pow_of_two(mhi_cntrl->nr_irqs),
PCI_IRQ_MSIX | PCI_IRQ_MSI);
if (nr_vectors < 0) {
dev_err(&pdev->dev, "Error allocating MSI vectors %d\n",
nr_vectors);
@ -1247,7 +1261,7 @@ static void mhi_pci_recovery_work(struct work_struct *work)
dev_warn(&pdev->dev, "device recovery started\n");
if (pdev->is_physfn)
if (!pdev->is_virtfn)
timer_delete(&mhi_pdev->health_check_timer);
pm_runtime_forbid(&pdev->dev);
@ -1277,7 +1291,7 @@ static void mhi_pci_recovery_work(struct work_struct *work)
set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
if (pdev->is_physfn)
if (!pdev->is_virtfn)
mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
return;
@ -1368,7 +1382,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
mhi_cntrl_config = info->config;
/* Initialize health check monitor only for Physical functions */
if (pdev->is_physfn)
if (!pdev->is_virtfn)
timer_setup(&mhi_pdev->health_check_timer, health_check, 0);
mhi_cntrl = &mhi_pdev->mhi_cntrl;
@ -1390,7 +1404,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
mhi_cntrl->mru = info->mru_default;
mhi_cntrl->name = info->name;
if (pdev->is_physfn)
if (!pdev->is_virtfn)
mhi_pdev->reset_on_remove = info->reset_on_remove;
if (info->edl_trigger)
@ -1439,7 +1453,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
/* start health check */
if (pdev->is_physfn)
if (!pdev->is_virtfn)
mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
/* Allow runtime suspend only if both PME from D3Hot and M3 are supported */
@ -1468,7 +1482,7 @@ static void mhi_pci_remove(struct pci_dev *pdev)
pm_runtime_forbid(&pdev->dev);
pci_disable_sriov(pdev);
if (pdev->is_physfn)
if (!pdev->is_virtfn)
timer_delete_sync(&mhi_pdev->health_check_timer);
cancel_work_sync(&mhi_pdev->recovery_work);
@ -1500,7 +1514,7 @@ static void mhi_pci_reset_prepare(struct pci_dev *pdev)
dev_info(&pdev->dev, "reset\n");
if (pdev->is_physfn)
if (!pdev->is_virtfn)
timer_delete(&mhi_pdev->health_check_timer);
/* Clean up MHI state */
@ -1546,7 +1560,7 @@ static void mhi_pci_reset_done(struct pci_dev *pdev)
}
set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
if (pdev->is_physfn)
if (!pdev->is_virtfn)
mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
}
@ -1612,7 +1626,7 @@ static int __maybe_unused mhi_pci_runtime_suspend(struct device *dev)
if (test_and_set_bit(MHI_PCI_DEV_SUSPENDED, &mhi_pdev->status))
return 0;
if (pdev->is_physfn)
if (!pdev->is_virtfn)
timer_delete(&mhi_pdev->health_check_timer);
cancel_work_sync(&mhi_pdev->recovery_work);
@ -1665,7 +1679,7 @@ static int __maybe_unused mhi_pci_runtime_resume(struct device *dev)
}
/* Resume health check */
if (pdev->is_physfn)
if (!pdev->is_virtfn)
mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
/* It can be a remote wakeup (no mhi runtime_get), update access time */

26
drivers/char/Kconfig
View File

@ -199,17 +199,6 @@ config NWFLASH
source "drivers/char/hw_random/Kconfig"
config DTLK
tristate "Double Talk PC internal speech card support"
depends on ISA
help
This driver is for the DoubleTalk PC, a speech synthesizer
manufactured by RC Systems (<https://www.rcsys.com/>). It is also
called the `internal DoubleTalk'.
To compile this driver as a module, choose M here: the
module will be called dtlk.
config XILINX_HWICAP
tristate "Xilinx HWICAP Support"
depends on MICROBLAZE
@ -220,21 +209,6 @@ config XILINX_HWICAP
If unsure, say N.
config APPLICOM
tristate "Applicom intelligent fieldbus card support"
depends on PCI
help
This driver provides the kernel-side support for the intelligent
fieldbus cards made by Applicom International. More information
about these cards can be found on the WWW at the address
<https://www.applicom-int.com/>, or by email from David Woodhouse
<dwmw2@infradead.org>.
To compile this driver as a module, choose M here: the
module will be called applicom.
If unsure, say N.
config SONYPI
tristate "Sony Vaio Programmable I/O Control Device support"
depends on X86_32 && PCI && INPUT && HAS_IOPORT

2
drivers/char/Makefile
View File

@ -16,8 +16,6 @@ obj-$(CONFIG_PRINTER) += lp.o
obj-$(CONFIG_APM_EMULATION) += apm-emulation.o
obj-$(CONFIG_DTLK) += dtlk.o
obj-$(CONFIG_APPLICOM) += applicom.o
obj-$(CONFIG_SONYPI) += sonypi.o
obj-$(CONFIG_HPET) += hpet.o
obj-$(CONFIG_XILINX_HWICAP) += xilinx_hwicap/

857
drivers/char/applicom.c
View File

@ -1,857 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Derived from Applicom driver ac.c for SCO Unix */
/* Ported by David Woodhouse, Axiom (Cambridge) Ltd. */
/* dwmw2@infradead.org 30/8/98 */
/* $Id: ac.c,v 1.30 2000/03/22 16:03:57 dwmw2 Exp $ */
/* This module is for Linux 2.1 and 2.2 series kernels. */
/*****************************************************************************/
/* J PAGET 18/02/94 passage V2.4.2 ioctl avec code 2 reset to les interrupt */
/* ceci pour reseter correctement apres une sortie sauvage */
/* J PAGET 02/05/94 passage V2.4.3 dans le traitement de d'interruption, */
/* LoopCount n'etait pas initialise a 0. */
/* F LAFORSE 04/07/95 version V2.6.0 lecture bidon apres acces a une carte */
/* pour liberer le bus */
/* J.PAGET 19/11/95 version V2.6.1 Nombre, addresse,irq n'est plus configure */
/* et passe en argument a acinit, mais est scrute sur le bus pour s'adapter */
/* au nombre de cartes presentes sur le bus. IOCL code 6 affichait V2.4.3 */
/* F.LAFORSE 28/11/95 creation de fichiers acXX.o avec les differentes */
/* addresses de base des cartes, IOCTL 6 plus complet */
/* J.PAGET le 19/08/96 copie de la version V2.6 en V2.8.0 sans modification */
/* de code autre que le texte V2.6.1 en V2.8.0 */
/*****************************************************************************/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/sched/signal.h>
#include <linux/slab.h>
#include <linux/errno.h>
#include <linux/mutex.h>
#include <linux/miscdevice.h>
#include <linux/pci.h>
#include <linux/wait.h>
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/nospec.h>
#include <asm/io.h>
#include <linux/uaccess.h>
#include "applicom.h"
/* NOTE: We use for loops with {write,read}b() instead of
memcpy_{from,to}io throughout this driver. This is because
the board doesn't correctly handle word accesses - only
bytes.
*/
#undef DEBUG
#define MAX_BOARD 8 /* maximum of pc board possible */
#define MAX_ISA_BOARD 4
#define LEN_RAM_IO 0x800
#ifndef PCI_VENDOR_ID_APPLICOM
#define PCI_VENDOR_ID_APPLICOM 0x1389
#define PCI_DEVICE_ID_APPLICOM_PCIGENERIC 0x0001
#define PCI_DEVICE_ID_APPLICOM_PCI2000IBS_CAN 0x0002
#define PCI_DEVICE_ID_APPLICOM_PCI2000PFB 0x0003
#endif
static DEFINE_MUTEX(ac_mutex);
static char *applicom_pci_devnames[] = {
"PCI board",
"PCI2000IBS / PCI2000CAN",
"PCI2000PFB"
};
static const struct pci_device_id applicom_pci_tbl[] = {
{ PCI_VDEVICE(APPLICOM, PCI_DEVICE_ID_APPLICOM_PCIGENERIC) },
{ PCI_VDEVICE(APPLICOM, PCI_DEVICE_ID_APPLICOM_PCI2000IBS_CAN) },
{ PCI_VDEVICE(APPLICOM, PCI_DEVICE_ID_APPLICOM_PCI2000PFB) },
{ 0 }
};
MODULE_DEVICE_TABLE(pci, applicom_pci_tbl);
MODULE_AUTHOR("David Woodhouse & Applicom International");
MODULE_DESCRIPTION("Driver for Applicom Profibus card");
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(AC_MINOR);
static struct applicom_board {
unsigned long PhysIO;
void __iomem *RamIO;
wait_queue_head_t FlagSleepSend;
long irq;
spinlock_t mutex;
} apbs[MAX_BOARD];
static unsigned int irq; /* interrupt number IRQ */
static unsigned long mem; /* physical segment of board */
module_param_hw(irq, uint, irq, 0);
MODULE_PARM_DESC(irq, "IRQ of the Applicom board");
module_param_hw(mem, ulong, iomem, 0);
MODULE_PARM_DESC(mem, "Shared Memory Address of Applicom board");
static unsigned int numboards; /* number of installed boards */
static volatile unsigned char Dummy;
static DECLARE_WAIT_QUEUE_HEAD(FlagSleepRec);
static unsigned int WriteErrorCount; /* number of write error */
static unsigned int ReadErrorCount; /* number of read error */
static unsigned int DeviceErrorCount; /* number of device error */
static ssize_t ac_read (struct file *, char __user *, size_t, loff_t *);
static ssize_t ac_write (struct file *, const char __user *, size_t, loff_t *);
static long ac_ioctl(struct file *, unsigned int, unsigned long);
static irqreturn_t ac_interrupt(int, void *);
static const struct file_operations ac_fops = {
.owner = THIS_MODULE,
.read = ac_read,
.write = ac_write,
.unlocked_ioctl = ac_ioctl,
};
static struct miscdevice ac_miscdev = {
AC_MINOR,
"ac",
&ac_fops
};
static int dummy; /* dev_id for request_irq() */
static int ac_register_board(unsigned long physloc, void __iomem *loc,
unsigned char boardno)
{
volatile unsigned char byte_reset_it;
if((readb(loc + CONF_END_TEST) != 0x00) ||
(readb(loc + CONF_END_TEST + 1) != 0x55) ||
(readb(loc + CONF_END_TEST + 2) != 0xAA) ||
(readb(loc + CONF_END_TEST + 3) != 0xFF))
return 0;
if (!boardno)
boardno = readb(loc + NUMCARD_OWNER_TO_PC);
if (!boardno || boardno > MAX_BOARD) {
printk(KERN_WARNING "Board #%d (at 0x%lx) is out of range (1 <= x <= %d).\n",
boardno, physloc, MAX_BOARD);
return 0;
}
if (apbs[boardno - 1].RamIO) {
printk(KERN_WARNING "Board #%d (at 0x%lx) conflicts with previous board #%d (at 0x%lx)\n",
boardno, physloc, boardno, apbs[boardno-1].PhysIO);
return 0;
}
boardno--;
apbs[boardno].PhysIO = physloc;
apbs[boardno].RamIO = loc;
init_waitqueue_head(&apbs[boardno].FlagSleepSend);
spin_lock_init(&apbs[boardno].mutex);
byte_reset_it = readb(loc + RAM_IT_TO_PC);
numboards++;
return boardno + 1;
}
static void __exit applicom_exit(void)
{
unsigned int i;
misc_deregister(&ac_miscdev);
for (i = 0; i < MAX_BOARD; i++) {
if (!apbs[i].RamIO)
continue;
if (apbs[i].irq)
free_irq(apbs[i].irq, &dummy);
iounmap(apbs[i].RamIO);
}
}
static int __init applicom_init(void)
{
int i, numisa = 0;
struct pci_dev *dev = NULL;
void __iomem *RamIO;
int boardno, ret;
printk(KERN_INFO "Applicom driver: $Id: ac.c,v 1.30 2000/03/22 16:03:57 dwmw2 Exp $\n");
/* No mem and irq given - check for a PCI card */
while ( (dev = pci_get_class(PCI_CLASS_OTHERS << 16, dev))) {
if (!pci_match_id(applicom_pci_tbl, dev))
continue;
if (pci_enable_device(dev)) {
pci_dev_put(dev);
return -EIO;
}
RamIO = ioremap(pci_resource_start(dev, 0), LEN_RAM_IO);
if (!RamIO) {
printk(KERN_INFO "ac.o: Failed to ioremap PCI memory "
"space at 0x%llx\n",
(unsigned long long)pci_resource_start(dev, 0));
pci_disable_device(dev);
pci_dev_put(dev);
return -EIO;
}
printk(KERN_INFO "Applicom %s found at mem 0x%llx, irq %d\n",
applicom_pci_devnames[dev->device-1],
(unsigned long long)pci_resource_start(dev, 0),
dev->irq);
boardno = ac_register_board(pci_resource_start(dev, 0),
RamIO, 0);
if (!boardno) {
printk(KERN_INFO "ac.o: PCI Applicom device doesn't have correct signature.\n");
iounmap(RamIO);
pci_disable_device(dev);
continue;
}
if (request_irq(dev->irq, &ac_interrupt, IRQF_SHARED, "Applicom PCI", &dummy)) {
printk(KERN_INFO "Could not allocate IRQ %d for PCI Applicom device.\n", dev->irq);
iounmap(RamIO);
pci_disable_device(dev);
apbs[boardno - 1].RamIO = NULL;
continue;
}
/* Enable interrupts. */
writeb(0x40, apbs[boardno - 1].RamIO + RAM_IT_FROM_PC);
apbs[boardno - 1].irq = dev->irq;
}
/* Finished with PCI cards. If none registered,
* and there was no mem/irq specified, exit */
if (!mem || !irq) {
if (numboards)
goto fin;
else {
printk(KERN_INFO "ac.o: No PCI boards found.\n");
printk(KERN_INFO "ac.o: For an ISA board you must supply memory and irq parameters.\n");
return -ENXIO;
}
}
/* Now try the specified ISA cards */
for (i = 0; i < MAX_ISA_BOARD; i++) {
RamIO = ioremap(mem + (LEN_RAM_IO * i), LEN_RAM_IO);
if (!RamIO) {
printk(KERN_INFO "ac.o: Failed to ioremap the ISA card's memory space (slot #%d)\n", i + 1);
continue;
}
if (!(boardno = ac_register_board((unsigned long)mem+ (LEN_RAM_IO*i),
RamIO,i+1))) {
iounmap(RamIO);
continue;
}
printk(KERN_NOTICE "Applicom ISA card found at mem 0x%lx, irq %d\n", mem + (LEN_RAM_IO*i), irq);
if (!numisa) {
if (request_irq(irq, &ac_interrupt, IRQF_SHARED, "Applicom ISA", &dummy)) {
printk(KERN_WARNING "Could not allocate IRQ %d for ISA Applicom device.\n", irq);
iounmap(RamIO);
apbs[boardno - 1].RamIO = NULL;
}
else
apbs[boardno - 1].irq = irq;
}
else
apbs[boardno - 1].irq = 0;
numisa++;
}
if (!numisa)
printk(KERN_WARNING "ac.o: No valid ISA Applicom boards found "
"at mem 0x%lx\n", mem);
fin:
init_waitqueue_head(&FlagSleepRec);
WriteErrorCount = 0;
ReadErrorCount = 0;
DeviceErrorCount = 0;
if (numboards) {
ret = misc_register(&ac_miscdev);
if (ret) {
printk(KERN_WARNING "ac.o: Unable to register misc device\n");
goto out;
}
for (i = 0; i < MAX_BOARD; i++) {
int serial;
char boardname[(SERIAL_NUMBER - TYPE_CARD) + 1];
if (!apbs[i].RamIO)
continue;
for (serial = 0; serial < SERIAL_NUMBER - TYPE_CARD; serial++)
boardname[serial] = readb(apbs[i].RamIO + TYPE_CARD + serial);
boardname[serial] = 0;
printk(KERN_INFO "Applicom board %d: %s, PROM V%d.%d",
i+1, boardname,
(int)(readb(apbs[i].RamIO + VERS) >> 4),
(int)(readb(apbs[i].RamIO + VERS) & 0xF));
serial = (readb(apbs[i].RamIO + SERIAL_NUMBER) << 16) +
(readb(apbs[i].RamIO + SERIAL_NUMBER + 1) << 8) +
(readb(apbs[i].RamIO + SERIAL_NUMBER + 2) );
if (serial != 0)
printk(" S/N %d\n", serial);
else
printk("\n");
}
return 0;
}
else
return -ENXIO;
out:
for (i = 0; i < MAX_BOARD; i++) {
if (!apbs[i].RamIO)
continue;
if (apbs[i].irq)
free_irq(apbs[i].irq, &dummy);
iounmap(apbs[i].RamIO);
}
return ret;
}
module_init(applicom_init);
module_exit(applicom_exit);
static ssize_t ac_write(struct file *file, const char __user *buf, size_t count, loff_t * ppos)
{
unsigned int NumCard; /* Board number 1 -> 8 */
unsigned int IndexCard; /* Index board number 0 -> 7 */
unsigned char TicCard; /* Board TIC to send */
unsigned long flags; /* Current priority */
struct st_ram_io st_loc;
struct mailbox tmpmailbox;
#ifdef DEBUG
int c;
#endif
DECLARE_WAITQUEUE(wait, current);
if (count != sizeof(struct st_ram_io) + sizeof(struct mailbox)) {
static int warncount = 5;
if (warncount) {
printk(KERN_INFO "Hmmm. write() of Applicom card, length %zd != expected %zd\n",
count, sizeof(struct st_ram_io) + sizeof(struct mailbox));
warncount--;
}
return -EINVAL;
}
if(copy_from_user(&st_loc, buf, sizeof(struct st_ram_io)))
return -EFAULT;
if(copy_from_user(&tmpmailbox, &buf[sizeof(struct st_ram_io)],
sizeof(struct mailbox)))
return -EFAULT;
NumCard = st_loc.num_card; /* board number to send */
TicCard = st_loc.tic_des_from_pc; /* tic number to send */
IndexCard = NumCard - 1;
if (IndexCard >= MAX_BOARD)
return -EINVAL;
IndexCard = array_index_nospec(IndexCard, MAX_BOARD);
if (!apbs[IndexCard].RamIO)
return -EINVAL;
#ifdef DEBUG
printk("Write to applicom card #%d. struct st_ram_io follows:",
IndexCard+1);
for (c = 0; c < sizeof(struct st_ram_io);) {
printk("\n%5.5X: %2.2X", c, ((unsigned char *) &st_loc)[c]);
for (c++; c % 8 && c < sizeof(struct st_ram_io); c++) {
printk(" %2.2X", ((unsigned char *) &st_loc)[c]);
}
}
printk("\nstruct mailbox follows:");
for (c = 0; c < sizeof(struct mailbox);) {
printk("\n%5.5X: %2.2X", c, ((unsigned char *) &tmpmailbox)[c]);
for (c++; c % 8 && c < sizeof(struct mailbox); c++) {
printk(" %2.2X", ((unsigned char *) &tmpmailbox)[c]);
}
}
printk("\n");
#endif
spin_lock_irqsave(&apbs[IndexCard].mutex, flags);
/* Test octet ready correct */
if(readb(apbs[IndexCard].RamIO + DATA_FROM_PC_READY) > 2) {
Dummy = readb(apbs[IndexCard].RamIO + VERS);
spin_unlock_irqrestore(&apbs[IndexCard].mutex, flags);
printk(KERN_WARNING "APPLICOM driver write error board %d, DataFromPcReady = %d\n",
IndexCard,(int)readb(apbs[IndexCard].RamIO + DATA_FROM_PC_READY));
DeviceErrorCount++;
return -EIO;
}
/* Place ourselves on the wait queue */
set_current_state(TASK_INTERRUPTIBLE);
add_wait_queue(&apbs[IndexCard].FlagSleepSend, &wait);
/* Check whether the card is ready for us */
while (readb(apbs[IndexCard].RamIO + DATA_FROM_PC_READY) != 0) {
Dummy = readb(apbs[IndexCard].RamIO + VERS);
/* It's busy. Sleep. */
spin_unlock_irqrestore(&apbs[IndexCard].mutex, flags);
schedule();
if (signal_pending(current)) {
remove_wait_queue(&apbs[IndexCard].FlagSleepSend,
&wait);
return -EINTR;
}
spin_lock_irqsave(&apbs[IndexCard].mutex, flags);
set_current_state(TASK_INTERRUPTIBLE);
}
/* We may not have actually slept */
set_current_state(TASK_RUNNING);
remove_wait_queue(&apbs[IndexCard].FlagSleepSend, &wait);
writeb(1, apbs[IndexCard].RamIO + DATA_FROM_PC_READY);
/* Which is best - lock down the pages with rawio and then
copy directly, or use bounce buffers? For now we do the latter
because it works with 2.2 still */
{
unsigned char *from = (unsigned char *) &tmpmailbox;
void __iomem *to = apbs[IndexCard].RamIO + RAM_FROM_PC;
int c;
for (c = 0; c < sizeof(struct mailbox); c++)
writeb(*(from++), to++);
}
writeb(0x20, apbs[IndexCard].RamIO + TIC_OWNER_FROM_PC);
writeb(0xff, apbs[IndexCard].RamIO + NUMCARD_OWNER_FROM_PC);
writeb(TicCard, apbs[IndexCard].RamIO + TIC_DES_FROM_PC);
writeb(NumCard, apbs[IndexCard].RamIO + NUMCARD_DES_FROM_PC);
writeb(2, apbs[IndexCard].RamIO + DATA_FROM_PC_READY);
writeb(1, apbs[IndexCard].RamIO + RAM_IT_FROM_PC);
Dummy = readb(apbs[IndexCard].RamIO + VERS);
spin_unlock_irqrestore(&apbs[IndexCard].mutex, flags);
return 0;
}
static int do_ac_read(int IndexCard, char __user *buf,
struct st_ram_io *st_loc, struct mailbox *mailbox)
{
void __iomem *from = apbs[IndexCard].RamIO + RAM_TO_PC;
unsigned char *to = (unsigned char *)mailbox;
#ifdef DEBUG
int c;
#endif
st_loc->tic_owner_to_pc = readb(apbs[IndexCard].RamIO + TIC_OWNER_TO_PC);
st_loc->numcard_owner_to_pc = readb(apbs[IndexCard].RamIO + NUMCARD_OWNER_TO_PC);
{
int c;
for (c = 0; c < sizeof(struct mailbox); c++)
*(to++) = readb(from++);
}
writeb(1, apbs[IndexCard].RamIO + ACK_FROM_PC_READY);
writeb(1, apbs[IndexCard].RamIO + TYP_ACK_FROM_PC);
writeb(IndexCard+1, apbs[IndexCard].RamIO + NUMCARD_ACK_FROM_PC);
writeb(readb(apbs[IndexCard].RamIO + TIC_OWNER_TO_PC),
apbs[IndexCard].RamIO + TIC_ACK_FROM_PC);
writeb(2, apbs[IndexCard].RamIO + ACK_FROM_PC_READY);
writeb(0, apbs[IndexCard].RamIO + DATA_TO_PC_READY);
writeb(2, apbs[IndexCard].RamIO + RAM_IT_FROM_PC);
Dummy = readb(apbs[IndexCard].RamIO + VERS);
#ifdef DEBUG
printk("Read from applicom card #%d. struct st_ram_io follows:", NumCard);
for (c = 0; c < sizeof(struct st_ram_io);) {
printk("\n%5.5X: %2.2X", c, ((unsigned char *)st_loc)[c]);
for (c++; c % 8 && c < sizeof(struct st_ram_io); c++) {
printk(" %2.2X", ((unsigned char *)st_loc)[c]);
}
}
printk("\nstruct mailbox follows:");
for (c = 0; c < sizeof(struct mailbox);) {
printk("\n%5.5X: %2.2X", c, ((unsigned char *)mailbox)[c]);
for (c++; c % 8 && c < sizeof(struct mailbox); c++) {
printk(" %2.2X", ((unsigned char *)mailbox)[c]);
}
}
printk("\n");
#endif
return (sizeof(struct st_ram_io) + sizeof(struct mailbox));
}
static ssize_t ac_read (struct file *filp, char __user *buf, size_t count, loff_t *ptr)
{
unsigned long flags;
unsigned int i;
unsigned char tmp;
int ret = 0;
DECLARE_WAITQUEUE(wait, current);
#ifdef DEBUG
int loopcount=0;
#endif
/* No need to ratelimit this. Only root can trigger it anyway */
if (count != sizeof(struct st_ram_io) + sizeof(struct mailbox)) {
printk( KERN_WARNING "Hmmm. read() of Applicom card, length %zd != expected %zd\n",
count,sizeof(struct st_ram_io) + sizeof(struct mailbox));
return -EINVAL;
}
while(1) {
/* Stick ourself on the wait queue */
set_current_state(TASK_INTERRUPTIBLE);
add_wait_queue(&FlagSleepRec, &wait);
/* Scan each board, looking for one which has a packet for us */
for (i=0; i < MAX_BOARD; i++) {
if (!apbs[i].RamIO)
continue;
spin_lock_irqsave(&apbs[i].mutex, flags);
tmp = readb(apbs[i].RamIO + DATA_TO_PC_READY);
if (tmp == 2) {
struct st_ram_io st_loc;
struct mailbox mailbox;
/* Got a packet for us */
memset(&st_loc, 0, sizeof(st_loc));
ret = do_ac_read(i, buf, &st_loc, &mailbox);
spin_unlock_irqrestore(&apbs[i].mutex, flags);
set_current_state(TASK_RUNNING);
remove_wait_queue(&FlagSleepRec, &wait);
if (copy_to_user(buf, &st_loc, sizeof(st_loc)))
return -EFAULT;
if (copy_to_user(buf + sizeof(st_loc), &mailbox, sizeof(mailbox)))
return -EFAULT;
return tmp;
}
if (tmp > 2) {
/* Got an error */
Dummy = readb(apbs[i].RamIO + VERS);
spin_unlock_irqrestore(&apbs[i].mutex, flags);
set_current_state(TASK_RUNNING);
remove_wait_queue(&FlagSleepRec, &wait);
printk(KERN_WARNING "APPLICOM driver read error board %d, DataToPcReady = %d\n",
i,(int)readb(apbs[i].RamIO + DATA_TO_PC_READY));
DeviceErrorCount++;
return -EIO;
}
/* Nothing for us. Try the next board */
Dummy = readb(apbs[i].RamIO + VERS);
spin_unlock_irqrestore(&apbs[i].mutex, flags);
} /* per board */
/* OK - No boards had data for us. Sleep now */
schedule();
remove_wait_queue(&FlagSleepRec, &wait);
if (signal_pending(current))
return -EINTR;
#ifdef DEBUG
if (loopcount++ > 2) {
printk(KERN_DEBUG "Looping in ac_read. loopcount %d\n", loopcount);
}
#endif
}
}
static irqreturn_t ac_interrupt(int vec, void *dev_instance)
{
unsigned int i;
unsigned int FlagInt;
unsigned int LoopCount;
int handled = 0;
// printk("Applicom interrupt on IRQ %d occurred\n", vec);
LoopCount = 0;
do {
FlagInt = 0;
for (i = 0; i < MAX_BOARD; i++) {
/* Skip if this board doesn't exist */
if (!apbs[i].RamIO)
continue;
spin_lock(&apbs[i].mutex);
/* Skip if this board doesn't want attention */
if(readb(apbs[i].RamIO + RAM_IT_TO_PC) == 0) {
spin_unlock(&apbs[i].mutex);
continue;
}
handled = 1;
FlagInt = 1;
writeb(0, apbs[i].RamIO + RAM_IT_TO_PC);
if (readb(apbs[i].RamIO + DATA_TO_PC_READY) > 2) {
printk(KERN_WARNING "APPLICOM driver interrupt err board %d, DataToPcReady = %d\n",
i+1,(int)readb(apbs[i].RamIO + DATA_TO_PC_READY));
DeviceErrorCount++;
}
if((readb(apbs[i].RamIO + DATA_FROM_PC_READY) > 2) &&
(readb(apbs[i].RamIO + DATA_FROM_PC_READY) != 6)) {
printk(KERN_WARNING "APPLICOM driver interrupt err board %d, DataFromPcReady = %d\n",
i+1,(int)readb(apbs[i].RamIO + DATA_FROM_PC_READY));
DeviceErrorCount++;
}
if (readb(apbs[i].RamIO + DATA_TO_PC_READY) == 2) { /* mailbox sent by the card ? */
if (waitqueue_active(&FlagSleepRec)) {
wake_up_interruptible(&FlagSleepRec);
}
}
if (readb(apbs[i].RamIO + DATA_FROM_PC_READY) == 0) { /* ram i/o free for write by pc ? */
if (waitqueue_active(&apbs[i].FlagSleepSend)) { /* process sleep during read ? */
wake_up_interruptible(&apbs[i].FlagSleepSend);
}
}
Dummy = readb(apbs[i].RamIO + VERS);
if(readb(apbs[i].RamIO + RAM_IT_TO_PC)) {
/* There's another int waiting on this card */
spin_unlock(&apbs[i].mutex);
i--;
} else {
spin_unlock(&apbs[i].mutex);
}
}
if (FlagInt)
LoopCount = 0;
else
LoopCount++;
} while(LoopCount < 2);
return IRQ_RETVAL(handled);
}
static long ac_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{ /* @ ADG ou ATO selon le cas */
int i;
unsigned char IndexCard;
void __iomem *pmem;
int ret = 0;
static int warncount = 10;
volatile unsigned char byte_reset_it;
struct st_ram_io *adgl;
void __user *argp = (void __user *)arg;
/* In general, the device is only openable by root anyway, so we're not
particularly concerned that bogus ioctls can flood the console. */
adgl = memdup_user(argp, sizeof(struct st_ram_io));
if (IS_ERR(adgl))
return PTR_ERR(adgl);
mutex_lock(&ac_mutex);
IndexCard = adgl->num_card-1;
if (cmd != 6 && IndexCard >= MAX_BOARD)
goto err;
IndexCard = array_index_nospec(IndexCard, MAX_BOARD);
if (cmd != 6 && !apbs[IndexCard].RamIO)
goto err;
switch (cmd) {
case 0:
pmem = apbs[IndexCard].RamIO;
for (i = 0; i < sizeof(struct st_ram_io); i++)
((unsigned char *)adgl)[i]=readb(pmem++);
if (copy_to_user(argp, adgl, sizeof(struct st_ram_io)))
ret = -EFAULT;
break;
case 1:
pmem = apbs[IndexCard].RamIO + CONF_END_TEST;
for (i = 0; i < 4; i++)
adgl->conf_end_test[i] = readb(pmem++);
for (i = 0; i < 2; i++)
adgl->error_code[i] = readb(pmem++);
for (i = 0; i < 4; i++)
adgl->parameter_error[i] = readb(pmem++);
pmem = apbs[IndexCard].RamIO + VERS;
adgl->vers = readb(pmem);
pmem = apbs[IndexCard].RamIO + TYPE_CARD;
for (i = 0; i < 20; i++)
adgl->reserv1[i] = readb(pmem++);
*(int *)&adgl->reserv1[20] =
(readb(apbs[IndexCard].RamIO + SERIAL_NUMBER) << 16) +
(readb(apbs[IndexCard].RamIO + SERIAL_NUMBER + 1) << 8) +
(readb(apbs[IndexCard].RamIO + SERIAL_NUMBER + 2) );
if (copy_to_user(argp, adgl, sizeof(struct st_ram_io)))
ret = -EFAULT;
break;
case 2:
pmem = apbs[IndexCard].RamIO + CONF_END_TEST;
for (i = 0; i < 10; i++)
writeb(0xff, pmem++);
writeb(adgl->data_from_pc_ready,
apbs[IndexCard].RamIO + DATA_FROM_PC_READY);
writeb(1, apbs[IndexCard].RamIO + RAM_IT_FROM_PC);
for (i = 0; i < MAX_BOARD; i++) {
if (apbs[i].RamIO) {
byte_reset_it = readb(apbs[i].RamIO + RAM_IT_TO_PC);
}
}
break;
case 3:
pmem = apbs[IndexCard].RamIO + TIC_DES_FROM_PC;
writeb(adgl->tic_des_from_pc, pmem);
break;
case 4:
pmem = apbs[IndexCard].RamIO + TIC_OWNER_TO_PC;
adgl->tic_owner_to_pc = readb(pmem++);
adgl->numcard_owner_to_pc = readb(pmem);
if (copy_to_user(argp, adgl,sizeof(struct st_ram_io)))
ret = -EFAULT;
break;
case 5:
writeb(adgl->num_card, apbs[IndexCard].RamIO + NUMCARD_OWNER_TO_PC);
writeb(adgl->num_card, apbs[IndexCard].RamIO + NUMCARD_DES_FROM_PC);
writeb(adgl->num_card, apbs[IndexCard].RamIO + NUMCARD_ACK_FROM_PC);
writeb(4, apbs[IndexCard].RamIO + DATA_FROM_PC_READY);
writeb(1, apbs[IndexCard].RamIO + RAM_IT_FROM_PC);
break;
case 6:
printk(KERN_INFO "APPLICOM driver release .... V2.8.0 ($Revision: 1.30 $)\n");
printk(KERN_INFO "Number of installed boards . %d\n", (int) numboards);
printk(KERN_INFO "Segment of board ........... %X\n", (int) mem);
printk(KERN_INFO "Interrupt IRQ number ....... %d\n", (int) irq);
for (i = 0; i < MAX_BOARD; i++) {
int serial;
char boardname[(SERIAL_NUMBER - TYPE_CARD) + 1];
if (!apbs[i].RamIO)
continue;
for (serial = 0; serial < SERIAL_NUMBER - TYPE_CARD; serial++)
boardname[serial] = readb(apbs[i].RamIO + TYPE_CARD + serial);
boardname[serial] = 0;
printk(KERN_INFO "Prom version board %d ....... V%d.%d %s",
i+1,
(int)(readb(apbs[i].RamIO + VERS) >> 4),
(int)(readb(apbs[i].RamIO + VERS) & 0xF),
boardname);
serial = (readb(apbs[i].RamIO + SERIAL_NUMBER) << 16) +
(readb(apbs[i].RamIO + SERIAL_NUMBER + 1) << 8) +
(readb(apbs[i].RamIO + SERIAL_NUMBER + 2) );
if (serial != 0)
printk(" S/N %d\n", serial);
else
printk("\n");
}
if (DeviceErrorCount != 0)
printk(KERN_INFO "DeviceErrorCount ........... %d\n", DeviceErrorCount);
if (ReadErrorCount != 0)
printk(KERN_INFO "ReadErrorCount ............. %d\n", ReadErrorCount);
if (WriteErrorCount != 0)
printk(KERN_INFO "WriteErrorCount ............ %d\n", WriteErrorCount);
if (waitqueue_active(&FlagSleepRec))
printk(KERN_INFO "Process in read pending\n");
for (i = 0; i < MAX_BOARD; i++) {
if (apbs[i].RamIO && waitqueue_active(&apbs[i].FlagSleepSend))
printk(KERN_INFO "Process in write pending board %d\n",i+1);
}
break;
default:
ret = -ENOTTY;
break;
}
if (cmd != 6)
Dummy = readb(apbs[IndexCard].RamIO + VERS);
kfree(adgl);
mutex_unlock(&ac_mutex);
return ret;
err:
if (warncount) {
pr_warn("APPLICOM driver IOCTL, bad board number %d\n",
(int)IndexCard + 1);
warncount--;
}
kfree(adgl);
mutex_unlock(&ac_mutex);
return -EINVAL;
}

86
drivers/char/applicom.h
View File

@ -1,86 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* $Id: applicom.h,v 1.2 1999/08/28 15:09:49 dwmw2 Exp $ */
#ifndef __LINUX_APPLICOM_H__
#define __LINUX_APPLICOM_H__
#define DATA_TO_PC_READY 0x00
#define TIC_OWNER_TO_PC 0x01
#define NUMCARD_OWNER_TO_PC 0x02
#define TIC_DES_TO_PC 0x03
#define NUMCARD_DES_TO_PC 0x04
#define DATA_FROM_PC_READY 0x05
#define TIC_OWNER_FROM_PC 0x06
#define NUMCARD_OWNER_FROM_PC 0x07
#define TIC_DES_FROM_PC 0x08
#define NUMCARD_DES_FROM_PC 0x09
#define ACK_FROM_PC_READY 0x0E
#define TIC_ACK_FROM_PC 0x0F
#define NUMCARD_ACK_FROM_PC 0x010
#define TYP_ACK_FROM_PC 0x011
#define CONF_END_TEST 0x012
#define ERROR_CODE 0x016
#define PARAMETER_ERROR 0x018
#define VERS 0x01E
#define RAM_TO_PC 0x040
#define RAM_FROM_PC 0x0170
#define TYPE_CARD 0x03C0
#define SERIAL_NUMBER 0x03DA
#define RAM_IT_FROM_PC 0x03FE
#define RAM_IT_TO_PC 0x03FF
struct mailbox{
u16 stjb_codef; /* offset 00 */
s16 stjb_status; /* offset 02 */
u16 stjb_ticuser_root; /* offset 04 */
u8 stjb_piduser[4]; /* offset 06 */
u16 stjb_mode; /* offset 0A */
u16 stjb_time; /* offset 0C */
u16 stjb_stop; /* offset 0E */
u16 stjb_nfonc; /* offset 10 */
u16 stjb_ncard; /* offset 12 */
u16 stjb_nchan; /* offset 14 */
u16 stjb_nes; /* offset 16 */
u16 stjb_nb; /* offset 18 */
u16 stjb_typvar; /* offset 1A */
u32 stjb_adr; /* offset 1C */
u16 stjb_ticuser_dispcyc; /* offset 20 */
u16 stjb_ticuser_protocol; /* offset 22 */
u8 stjb_filler[12]; /* offset 24 */
u8 stjb_data[256]; /* offset 30 */
};
struct st_ram_io
{
unsigned char data_to_pc_ready;
unsigned char tic_owner_to_pc;
unsigned char numcard_owner_to_pc;
unsigned char tic_des_to_pc;
unsigned char numcard_des_to_pc;
unsigned char data_from_pc_ready;
unsigned char tic_owner_from_pc;
unsigned char numcard_owner_from_pc;
unsigned char tic_des_from_pc;
unsigned char numcard_des_from_pc;
unsigned char ack_to_pc_ready;
unsigned char tic_ack_to_pc;
unsigned char numcard_ack_to_pc;
unsigned char typ_ack_to_pc;
unsigned char ack_from_pc_ready;
unsigned char tic_ack_from_pc;
unsigned char numcard_ack_from_pc;
unsigned char typ_ack_from_pc;
unsigned char conf_end_test[4];
unsigned char error_code[2];
unsigned char parameter_error[4];
unsigned char time_base;
unsigned char nul_inc;
unsigned char vers;
unsigned char num_card;
unsigned char reserv1[32];
};
#endif /* __LINUX_APPLICOM_H__ */

663
drivers/char/dtlk.c
View File

@ -1,663 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/* -*- linux-c -*-
* dtlk.c - DoubleTalk PC driver for Linux
*
* Original author: Chris Pallotta <chris@allmedia.com>
* Current maintainer: Jim Van Zandt <jrv@vanzandt.mv.com>
*
* 2000-03-18 Jim Van Zandt: Fix polling.
* Eliminate dtlk_timer_active flag and separate dtlk_stop_timer
* function. Don't restart timer in dtlk_timer_tick. Restart timer
* in dtlk_poll after every poll. dtlk_poll returns mask (duh).
* Eliminate unused function dtlk_write_byte. Misc. code cleanups.
*/
/* This driver is for the DoubleTalk PC, a speech synthesizer
manufactured by RC Systems (http://www.rcsys.com/). It was written
based on documentation in their User's Manual file and Developer's
Tools disk.
The DoubleTalk PC contains four voice synthesizers: text-to-speech
(TTS), linear predictive coding (LPC), PCM/ADPCM, and CVSD. It
also has a tone generator. Output data for LPC are written to the
LPC port, and output data for the other modes are written to the
TTS port.
Two kinds of data can be read from the DoubleTalk: status
information (in response to the "\001?" interrogation command) is
read from the TTS port, and index markers (which mark the progress
of the speech) are read from the LPC port. Not all models of the
DoubleTalk PC implement index markers. Both the TTS and LPC ports
can also display status flags.
The DoubleTalk PC generates no interrupts.
These characteristics are mapped into the Unix stream I/O model as
follows:
"write" sends bytes to the TTS port. It is the responsibility of
the user program to switch modes among TTS, PCM/ADPCM, and CVSD.
This driver was written for use with the text-to-speech
synthesizer. If LPC output is needed some day, other minor device
numbers can be used to select among output modes.
"read" gets index markers from the LPC port. If the device does
not implement index markers, the read will fail with error EINVAL.
Status information is available using the DTLK_INTERROGATE ioctl.
*/
#include <linux/module.h>
#define KERNEL
#include <linux/types.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/errno.h> /* for -EBUSY */
#include <linux/ioport.h> /* for request_region */
#include <linux/delay.h> /* for loops_per_jiffy */
#include <linux/sched.h>
#include <linux/mutex.h>
#include <asm/io.h> /* for inb_p, outb_p, inb, outb, etc. */
#include <linux/uaccess.h> /* for get_user, etc. */
#include <linux/wait.h> /* for wait_queue */
#include <linux/init.h> /* for __init, module_{init,exit} */
#include <linux/poll.h> /* for EPOLLIN, etc. */
#include <linux/dtlk.h> /* local header file for DoubleTalk values */
#ifdef TRACING
#define TRACE_TEXT(str) printk(str);
#define TRACE_RET printk(")")
#else /* !TRACING */
#define TRACE_TEXT(str) ((void) 0)
#define TRACE_RET ((void) 0)
#endif /* TRACING */
static DEFINE_MUTEX(dtlk_mutex);
static void dtlk_timer_tick(struct timer_list *unused);
static int dtlk_major;
static int dtlk_port_lpc;
static int dtlk_port_tts;
static int dtlk_busy;
static int dtlk_has_indexing;
static unsigned int dtlk_portlist[] =
{0x25e, 0x29e, 0x2de, 0x31e, 0x35e, 0x39e, 0};
static wait_queue_head_t dtlk_process_list;
static DEFINE_TIMER(dtlk_timer, dtlk_timer_tick);
/* prototypes for file_operations struct */
static ssize_t dtlk_read(struct file *, char __user *,
size_t nbytes, loff_t * ppos);
static ssize_t dtlk_write(struct file *, const char __user *,
size_t nbytes, loff_t * ppos);
static __poll_t dtlk_poll(struct file *, poll_table *);
static int dtlk_open(struct inode *, struct file *);
static int dtlk_release(struct inode *, struct file *);
static long dtlk_ioctl(struct file *file,
unsigned int cmd, unsigned long arg);
static const struct file_operations dtlk_fops =
{
.owner = THIS_MODULE,
.read = dtlk_read,
.write = dtlk_write,
.poll = dtlk_poll,
.unlocked_ioctl = dtlk_ioctl,
.open = dtlk_open,
.release = dtlk_release,
};
/* local prototypes */
static int dtlk_dev_probe(void);
static struct dtlk_settings *dtlk_interrogate(void);
static int dtlk_readable(void);
static char dtlk_read_lpc(void);
static char dtlk_read_tts(void);
static int dtlk_writeable(void);
static char dtlk_write_bytes(const char *buf, int n);
static char dtlk_write_tts(char);
/*
static void dtlk_handle_error(char, char, unsigned int);
*/
static ssize_t dtlk_read(struct file *file, char __user *buf,
size_t count, loff_t * ppos)
{
unsigned int minor = iminor(file_inode(file));
char ch;
int i = 0, retries;
TRACE_TEXT("(dtlk_read");
/* printk("DoubleTalk PC - dtlk_read()\n"); */
if (minor != DTLK_MINOR || !dtlk_has_indexing)
return -EINVAL;
for (retries = 0; retries < loops_per_jiffy; retries++) {
while (i < count && dtlk_readable()) {
ch = dtlk_read_lpc();
/* printk("dtlk_read() reads 0x%02x\n", ch); */
if (put_user(ch, buf++))
return -EFAULT;
i++;
}
if (i)
return i;
if (file->f_flags & O_NONBLOCK)
break;
msleep_interruptible(100);
}
if (retries == loops_per_jiffy)
printk(KERN_ERR "dtlk_read times out\n");
TRACE_RET;
return -EAGAIN;
}
static ssize_t dtlk_write(struct file *file, const char __user *buf,
size_t count, loff_t * ppos)
{
int i = 0, retries = 0, ch;
TRACE_TEXT("(dtlk_write");
#ifdef TRACING
printk(" \"");
{
int i, ch;
for (i = 0; i < count; i++) {
if (get_user(ch, buf + i))
return -EFAULT;
if (' ' <= ch && ch <= '~')
printk("%c", ch);
else
printk("\\%03o", ch);
}
printk("\"");
}
#endif
if (iminor(file_inode(file)) != DTLK_MINOR)
return -EINVAL;
while (1) {
while (i < count && !get_user(ch, buf) &&
(ch == DTLK_CLEAR || dtlk_writeable())) {
dtlk_write_tts(ch);
buf++;
i++;
if (i % 5 == 0)
/* We yield our time until scheduled
again. This reduces the transfer
rate to 500 bytes/sec, but that's
still enough to keep up with the
speech synthesizer. */
msleep_interruptible(1);
else {
/* the RDY bit goes zero 2-3 usec
after writing, and goes 1 again
180-190 usec later. Here, we wait
up to 250 usec for the RDY bit to
go nonzero. */
for (retries = 0;
retries < loops_per_jiffy / (4000/HZ);
retries++)
if (inb_p(dtlk_port_tts) &
TTS_WRITABLE)
break;
}
retries = 0;
}
if (i == count)
return i;
if (file->f_flags & O_NONBLOCK)
break;
msleep_interruptible(1);
if (++retries > 10 * HZ) { /* wait no more than 10 sec
from last write */
printk("dtlk: write timeout. "
"inb_p(dtlk_port_tts) = 0x%02x\n",
inb_p(dtlk_port_tts));
TRACE_RET;
return -EBUSY;
}
}
TRACE_RET;
return -EAGAIN;
}
static __poll_t dtlk_poll(struct file *file, poll_table * wait)
{
__poll_t mask = 0;
unsigned long expires;
TRACE_TEXT(" dtlk_poll");
/*
static long int j;
printk(".");
printk("<%ld>", jiffies-j);
j=jiffies;
*/
poll_wait(file, &dtlk_process_list, wait);
if (dtlk_has_indexing && dtlk_readable()) {
timer_delete(&dtlk_timer);
mask = EPOLLIN | EPOLLRDNORM;
}
if (dtlk_writeable()) {
timer_delete(&dtlk_timer);
mask |= EPOLLOUT | EPOLLWRNORM;
}
/* there are no exception conditions */
/* There won't be any interrupts, so we set a timer instead. */
expires = jiffies + 3*HZ / 100;
mod_timer(&dtlk_timer, expires);
return mask;
}
static void dtlk_timer_tick(struct timer_list *unused)
{
TRACE_TEXT(" dtlk_timer_tick");
wake_up_interruptible(&dtlk_process_list);
}
static long dtlk_ioctl(struct file *file,
unsigned int cmd,
unsigned long arg)
{
char __user *argp = (char __user *)arg;
struct dtlk_settings *sp;
char portval;
TRACE_TEXT(" dtlk_ioctl");
switch (cmd) {
case DTLK_INTERROGATE:
mutex_lock(&dtlk_mutex);
sp = dtlk_interrogate();
mutex_unlock(&dtlk_mutex);
if (copy_to_user(argp, sp, sizeof(struct dtlk_settings)))
return -EINVAL;
return 0;
case DTLK_STATUS:
portval = inb_p(dtlk_port_tts);
return put_user(portval, argp);
default:
return -EINVAL;
}
}
/* Note that nobody ever sets dtlk_busy... */
static int dtlk_open(struct inode *inode, struct file *file)
{
TRACE_TEXT("(dtlk_open");
switch (iminor(inode)) {
case DTLK_MINOR:
if (dtlk_busy)
return -EBUSY;
return stream_open(inode, file);
default:
return -ENXIO;
}
}
static int dtlk_release(struct inode *inode, struct file *file)
{
TRACE_TEXT("(dtlk_release");
switch (iminor(inode)) {
case DTLK_MINOR:
break;
default:
break;
}
TRACE_RET;
timer_delete_sync(&dtlk_timer);
return 0;
}
static int __init dtlk_init(void)
{
int err;
dtlk_port_lpc = 0;
dtlk_port_tts = 0;
dtlk_busy = 0;
dtlk_major = register_chrdev(0, "dtlk", &dtlk_fops);
if (dtlk_major < 0) {
printk(KERN_ERR "DoubleTalk PC - cannot register device\n");
return dtlk_major;
}
err = dtlk_dev_probe();
if (err) {
unregister_chrdev(dtlk_major, "dtlk");
return err;
}
printk(", MAJOR %d\n", dtlk_major);
init_waitqueue_head(&dtlk_process_list);
return 0;
}
static void __exit dtlk_cleanup (void)
{
dtlk_write_bytes("goodbye", 8);
msleep_interruptible(500); /* nap 0.50 sec but
could be awakened
earlier by
signals... */
dtlk_write_tts(DTLK_CLEAR);
unregister_chrdev(dtlk_major, "dtlk");
release_region(dtlk_port_lpc, DTLK_IO_EXTENT);
}
module_init(dtlk_init);
module_exit(dtlk_cleanup);
/* ------------------------------------------------------------------------ */
static int dtlk_readable(void)
{
#ifdef TRACING
printk(" dtlk_readable=%u@%u", inb_p(dtlk_port_lpc) != 0x7f, jiffies);
#endif
return inb_p(dtlk_port_lpc) != 0x7f;
}
static int dtlk_writeable(void)
{
/* TRACE_TEXT(" dtlk_writeable"); */
#ifdef TRACINGMORE
printk(" dtlk_writeable=%u", (inb_p(dtlk_port_tts) & TTS_WRITABLE)!=0);
#endif
return inb_p(dtlk_port_tts) & TTS_WRITABLE;
}
static int __init dtlk_dev_probe(void)
{
unsigned int testval = 0;
int i = 0;
struct dtlk_settings *sp;
if (dtlk_port_lpc | dtlk_port_tts)
return -EBUSY;
for (i = 0; dtlk_portlist[i]; i++) {
#if 0
printk("DoubleTalk PC - Port %03x = %04x\n",
dtlk_portlist[i], (testval = inw_p(dtlk_portlist[i])));
#endif
if (!request_region(dtlk_portlist[i], DTLK_IO_EXTENT,
"dtlk"))
continue;
testval = inw_p(dtlk_portlist[i]);
if ((testval &= 0xfbff) == 0x107f) {
dtlk_port_lpc = dtlk_portlist[i];
dtlk_port_tts = dtlk_port_lpc + 1;
sp = dtlk_interrogate();
printk("DoubleTalk PC at %03x-%03x, "
"ROM version %s, serial number %u",
dtlk_portlist[i], dtlk_portlist[i] +
DTLK_IO_EXTENT - 1,
sp->rom_version, sp->serial_number);
/* put LPC port into known state, so
dtlk_readable() gives valid result */
outb_p(0xff, dtlk_port_lpc);
/* INIT string and index marker */
dtlk_write_bytes("\036\1@\0\0012I\r", 8);
/* posting an index takes 18 msec. Here, we
wait up to 100 msec to see whether it
appears. */
msleep_interruptible(100);
dtlk_has_indexing = dtlk_readable();
#ifdef TRACING
printk(", indexing %d\n", dtlk_has_indexing);
#endif
#ifdef INSCOPE
{
/* This macro records ten samples read from the LPC port, for later display */
#define LOOK \
for (i = 0; i < 10; i++) \
{ \
buffer[b++] = inb_p(dtlk_port_lpc); \
__delay(loops_per_jiffy/(1000000/HZ)); \
}
char buffer[1000];
int b = 0, i, j;
LOOK
outb_p(0xff, dtlk_port_lpc);
buffer[b++] = 0;
LOOK
dtlk_write_bytes("\0012I\r", 4);
buffer[b++] = 0;
__delay(50 * loops_per_jiffy / (1000/HZ));
outb_p(0xff, dtlk_port_lpc);
buffer[b++] = 0;
LOOK
printk("\n");
for (j = 0; j < b; j++)
printk(" %02x", buffer[j]);
printk("\n");
}
#endif /* INSCOPE */
#ifdef OUTSCOPE
{
/* This macro records ten samples read from the TTS port, for later display */
#define LOOK \
for (i = 0; i < 10; i++) \
{ \
buffer[b++] = inb_p(dtlk_port_tts); \
__delay(loops_per_jiffy/(1000000/HZ)); /* 1 us */ \
}
char buffer[1000];
int b = 0, i, j;
mdelay(10); /* 10 ms */
LOOK
outb_p(0x03, dtlk_port_tts);
buffer[b++] = 0;
LOOK
LOOK
printk("\n");
for (j = 0; j < b; j++)
printk(" %02x", buffer[j]);
printk("\n");
}
#endif /* OUTSCOPE */
dtlk_write_bytes("Double Talk found", 18);
return 0;
}
release_region(dtlk_portlist[i], DTLK_IO_EXTENT);
}
printk(KERN_INFO "DoubleTalk PC - not found\n");
return -ENODEV;
}
/*
static void dtlk_handle_error(char op, char rc, unsigned int minor)
{
printk(KERN_INFO"\nDoubleTalk PC - MINOR: %d, OPCODE: %d, ERROR: %d\n",
minor, op, rc);
return;
}
*/
/* interrogate the DoubleTalk PC and return its settings */
static struct dtlk_settings *dtlk_interrogate(void)
{
unsigned char *t;
static char buf[sizeof(struct dtlk_settings) + 1];
int total, i;
static struct dtlk_settings status;
TRACE_TEXT("(dtlk_interrogate");
dtlk_write_bytes("\030\001?", 3);
for (total = 0, i = 0; i < 50; i++) {
buf[total] = dtlk_read_tts();
if (total > 2 && buf[total] == 0x7f)
break;
if (total < sizeof(struct dtlk_settings))
total++;
}
/*
if (i==50) printk("interrogate() read overrun\n");
for (i=0; i<sizeof(buf); i++)
printk(" %02x", buf[i]);
printk("\n");
*/
t = buf;
status.serial_number = t[0] + t[1] * 256; /* serial number is
little endian */
t += 2;
i = 0;
while (*t != '\r') {
status.rom_version[i] = *t;
if (i < sizeof(status.rom_version) - 1)
i++;
t++;
}
status.rom_version[i] = 0;
t++;
status.mode = *t++;
status.punc_level = *t++;
status.formant_freq = *t++;
status.pitch = *t++;
status.speed = *t++;
status.volume = *t++;
status.tone = *t++;
status.expression = *t++;
status.ext_dict_loaded = *t++;
status.ext_dict_status = *t++;
status.free_ram = *t++;
status.articulation = *t++;
status.reverb = *t++;
status.eob = *t++;
status.has_indexing = dtlk_has_indexing;
TRACE_RET;
return &status;
}
static char dtlk_read_tts(void)
{
int portval, retries = 0;
char ch;
TRACE_TEXT("(dtlk_read_tts");
/* verify DT is ready, read char, wait for ACK */
do {
portval = inb_p(dtlk_port_tts);
} while ((portval & TTS_READABLE) == 0 &&
retries++ < DTLK_MAX_RETRIES);
if (retries > DTLK_MAX_RETRIES)
printk(KERN_ERR "dtlk_read_tts() timeout\n");
ch = inb_p(dtlk_port_tts); /* input from TTS port */
ch &= 0x7f;
outb_p(ch, dtlk_port_tts);
retries = 0;
do {
portval = inb_p(dtlk_port_tts);
} while ((portval & TTS_READABLE) != 0 &&
retries++ < DTLK_MAX_RETRIES);
if (retries > DTLK_MAX_RETRIES)
printk(KERN_ERR "dtlk_read_tts() timeout\n");
TRACE_RET;
return ch;
}
static char dtlk_read_lpc(void)
{
int retries = 0;
char ch;
TRACE_TEXT("(dtlk_read_lpc");
/* no need to test -- this is only called when the port is readable */
ch = inb_p(dtlk_port_lpc); /* input from LPC port */
outb_p(0xff, dtlk_port_lpc);
/* acknowledging a read takes 3-4
usec. Here, we wait up to 20 usec
for the acknowledgement */
retries = (loops_per_jiffy * 20) / (1000000/HZ);
while (inb_p(dtlk_port_lpc) != 0x7f && --retries > 0);
if (retries == 0)
printk(KERN_ERR "dtlk_read_lpc() timeout\n");
TRACE_RET;
return ch;
}
/* write n bytes to tts port */
static char dtlk_write_bytes(const char *buf, int n)
{
char val = 0;
/* printk("dtlk_write_bytes(\"%-*s\", %d)\n", n, buf, n); */
TRACE_TEXT("(dtlk_write_bytes");
while (n-- > 0)
val = dtlk_write_tts(*buf++);
TRACE_RET;
return val;
}
static char dtlk_write_tts(char ch)
{
int retries = 0;
#ifdef TRACINGMORE
printk(" dtlk_write_tts(");
if (' ' <= ch && ch <= '~')
printk("'%c'", ch);
else
printk("0x%02x", ch);
#endif
if (ch != DTLK_CLEAR) /* no flow control for CLEAR command */
while ((inb_p(dtlk_port_tts) & TTS_WRITABLE) == 0 &&
retries++ < DTLK_MAX_RETRIES) /* DT ready? */
;
if (retries > DTLK_MAX_RETRIES)
printk(KERN_ERR "dtlk_write_tts() timeout\n");
outb_p(ch, dtlk_port_tts); /* output to TTS port */
/* the RDY bit goes zero 2-3 usec after writing, and goes
1 again 180-190 usec later. Here, we wait up to 10
usec for the RDY bit to go zero. */
for (retries = 0; retries < loops_per_jiffy / (100000/HZ); retries++)
if ((inb_p(dtlk_port_tts) & TTS_WRITABLE) == 0)
break;
#ifdef TRACINGMORE
printk(")\n");
#endif
return 0;
}
MODULE_DESCRIPTION("RC Systems DoubleTalk PC speech card driver");
MODULE_LICENSE("GPL");

6
drivers/char/hpet.c
View File

@ -976,10 +976,14 @@ static acpi_status hpet_resources(struct acpi_resource *res, void *data)
static int hpet_acpi_probe(struct platform_device *pdev)
{
struct acpi_device *device = ACPI_COMPANION(&pdev->dev);
struct acpi_device *device;
acpi_status result;
struct hpet_data data;
device = ACPI_COMPANION(&pdev->dev);
if (!device)
return -ENODEV;
memset(&data, 0, sizeof(data));
result =

16
drivers/char/nvram.c
View File

@ -53,7 +53,6 @@
#include <asm/nvram.h>
#endif
static DEFINE_MUTEX(nvram_mutex);
static DEFINE_SPINLOCK(nvram_state_lock);
static int nvram_open_cnt; /* #times opened */
static int nvram_open_mode; /* special open modes */
@ -310,11 +309,8 @@ static long nvram_misc_ioctl(struct file *file, unsigned int cmd,
break;
#ifdef CONFIG_PPC32
case IOC_NVRAM_SYNC:
if (ppc_md.nvram_sync != NULL) {
mutex_lock(&nvram_mutex);
if (ppc_md.nvram_sync)
ppc_md.nvram_sync();
mutex_unlock(&nvram_mutex);
}
ret = 0;
break;
#endif
@ -324,11 +320,8 @@ static long nvram_misc_ioctl(struct file *file, unsigned int cmd,
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
if (arch_nvram_ops.initialize != NULL) {
mutex_lock(&nvram_mutex);
if (arch_nvram_ops.initialize)
ret = arch_nvram_ops.initialize();
mutex_unlock(&nvram_mutex);
}
break;
case NVRAM_SETCKS:
/* just set checksum, contents unchanged (maybe useful after
@ -336,11 +329,8 @@ static long nvram_misc_ioctl(struct file *file, unsigned int cmd,
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
if (arch_nvram_ops.set_checksum != NULL) {
mutex_lock(&nvram_mutex);
if (arch_nvram_ops.set_checksum)
ret = arch_nvram_ops.set_checksum();
mutex_unlock(&nvram_mutex);
}
break;
#endif /* CONFIG_X86 || CONFIG_M68K */
}

6
drivers/char/sonypi.c
View File

@ -1117,7 +1117,11 @@ static int sonypi_disable(void)
#ifdef CONFIG_ACPI
static int sonypi_acpi_probe(struct platform_device *pdev)
{
struct acpi_device *device = ACPI_COMPANION(&pdev->dev);
struct acpi_device *device;
device = ACPI_COMPANION(&pdev->dev);
if (!device)
return -ENODEV;
sonypi_acpi_device = device;
strcpy(acpi_device_name(device), "Sony laptop hotkeys");

4
drivers/char/tlclk.c
View File

@ -264,6 +264,7 @@ static ssize_t tlclk_read(struct file *filp, char __user *buf, size_t count,
}
static const struct file_operations tlclk_fops = {
.owner = THIS_MODULE,
.read = tlclk_read,
.open = tlclk_open,
.release = tlclk_release,
@ -837,6 +838,9 @@ static void __exit tlclk_cleanup(void)
misc_deregister(&tlclk_miscdev);
unregister_chrdev(tlclk_major, "telco_clock");
got_event = 1;
wake_up_all(&wq);
release_region(TLCLK_BASE, 8);
timer_delete_sync(&switchover_timer);
kfree(alarm_events);

32
drivers/comedi/drivers/8255_pci.c
View File

@ -267,25 +267,25 @@ static int pci_8255_pci_probe(struct pci_dev *dev,
static const struct pci_device_id pci_8255_pci_table[] = {
#ifdef CONFIG_HAS_IOPORT
{ PCI_VDEVICE(ADLINK, 0x7224), BOARD_ADLINK_PCI7224 },
{ PCI_VDEVICE(ADLINK, 0x7248), BOARD_ADLINK_PCI7248 },
{ PCI_VDEVICE(ADLINK, 0x7296), BOARD_ADLINK_PCI7296 },
{ PCI_VDEVICE(CB, 0x0028), BOARD_CB_PCIDIO24 },
{ PCI_VDEVICE(CB, 0x0014), BOARD_CB_PCIDIO24H },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CB, 0x000b, 0x0000, 0x0000),
{ PCI_VDEVICE(ADLINK, 0x7224), .driver_data = BOARD_ADLINK_PCI7224 },
{ PCI_VDEVICE(ADLINK, 0x7248), .driver_data = BOARD_ADLINK_PCI7248 },
{ PCI_VDEVICE(ADLINK, 0x7296), .driver_data = BOARD_ADLINK_PCI7296 },
{ PCI_VDEVICE(CB, 0x0028), .driver_data = BOARD_CB_PCIDIO24 },
{ PCI_VDEVICE(CB, 0x0014), .driver_data = BOARD_CB_PCIDIO24H },
{ PCI_VDEVICE_SUB(CB, 0x000b, 0x0000, 0x0000),
.driver_data = BOARD_CB_PCIDIO48H_OLD },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CB, 0x000b, PCI_VENDOR_ID_CB, 0x000b),
{ PCI_VDEVICE_SUB(CB, 0x000b, PCI_VENDOR_ID_CB, 0x000b),
.driver_data = BOARD_CB_PCIDIO48H_NEW },
{ PCI_VDEVICE(CB, 0x0017), BOARD_CB_PCIDIO96H },
{ PCI_VDEVICE(CB, 0x0017), .driver_data = BOARD_CB_PCIDIO96H },
#endif /* CONFIG_HAS_IOPORT */
{ PCI_VDEVICE(NI, 0x0160), BOARD_NI_PCIDIO96 },
{ PCI_VDEVICE(NI, 0x1630), BOARD_NI_PCIDIO96B },
{ PCI_VDEVICE(NI, 0x13c0), BOARD_NI_PXI6508 },
{ PCI_VDEVICE(NI, 0x0400), BOARD_NI_PCI6503 },
{ PCI_VDEVICE(NI, 0x1250), BOARD_NI_PCI6503B },
{ PCI_VDEVICE(NI, 0x17d0), BOARD_NI_PCI6503X },
{ PCI_VDEVICE(NI, 0x1800), BOARD_NI_PXI_6503 },
{ 0 }
{ PCI_VDEVICE(NI, 0x0160), .driver_data = BOARD_NI_PCIDIO96 },
{ PCI_VDEVICE(NI, 0x1630), .driver_data = BOARD_NI_PCIDIO96B },
{ PCI_VDEVICE(NI, 0x13c0), .driver_data = BOARD_NI_PXI6508 },
{ PCI_VDEVICE(NI, 0x0400), .driver_data = BOARD_NI_PCI6503 },
{ PCI_VDEVICE(NI, 0x1250), .driver_data = BOARD_NI_PCI6503B },
{ PCI_VDEVICE(NI, 0x17d0), .driver_data = BOARD_NI_PCI6503X },
{ PCI_VDEVICE(NI, 0x1800), .driver_data = BOARD_NI_PXI_6503 },
{ }
};
MODULE_DEVICE_TABLE(pci, pci_8255_pci_table);

4
drivers/comedi/drivers/addi_apci_1032.c
View File

@ -378,8 +378,8 @@ static int apci1032_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id apci1032_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1003) },
{ 0 }
{ PCI_VDEVICE(ADDIDATA, 0x1003) },
{ }
};
MODULE_DEVICE_TABLE(pci, apci1032_pci_table);

4
drivers/comedi/drivers/addi_apci_1500.c
View File

@ -869,8 +869,8 @@ static int apci1500_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id apci1500_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMCC, 0x80fc) },
{ 0 }
{ PCI_VDEVICE(AMCC, 0x80fc) },
{ }
};
MODULE_DEVICE_TABLE(pci, apci1500_pci_table);

8
drivers/comedi/drivers/addi_apci_1516.c
View File

@ -196,10 +196,10 @@ static int apci1516_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id apci1516_pci_table[] = {
{ PCI_VDEVICE(ADDIDATA, 0x1000), BOARD_APCI1016 },
{ PCI_VDEVICE(ADDIDATA, 0x1001), BOARD_APCI1516 },
{ PCI_VDEVICE(ADDIDATA, 0x1002), BOARD_APCI2016 },
{ 0 }
{ PCI_VDEVICE(ADDIDATA, 0x1000), .driver_data = BOARD_APCI1016 },
{ PCI_VDEVICE(ADDIDATA, 0x1001), .driver_data = BOARD_APCI1516 },
{ PCI_VDEVICE(ADDIDATA, 0x1002), .driver_data = BOARD_APCI2016 },
{ }
};
MODULE_DEVICE_TABLE(pci, apci1516_pci_table);

4
drivers/comedi/drivers/addi_apci_1564.c
View File

@ -802,8 +802,8 @@ static int apci1564_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id apci1564_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1006) },
{ 0 }
{ PCI_VDEVICE(ADDIDATA, 0x1006) },
{ }
};
MODULE_DEVICE_TABLE(pci, apci1564_pci_table);

6
drivers/comedi/drivers/addi_apci_16xx.c
View File

@ -158,9 +158,9 @@ static int apci16xx_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id apci16xx_pci_table[] = {
{ PCI_VDEVICE(ADDIDATA, 0x1009), BOARD_APCI1648 },
{ PCI_VDEVICE(ADDIDATA, 0x100a), BOARD_APCI1696 },
{ 0 }
{ PCI_VDEVICE(ADDIDATA, 0x1009), .driver_data = BOARD_APCI1648 },
{ PCI_VDEVICE(ADDIDATA, 0x100a), .driver_data = BOARD_APCI1696 },
{ }
};
MODULE_DEVICE_TABLE(pci, apci16xx_pci_table);

4
drivers/comedi/drivers/addi_apci_2032.c
View File

@ -312,8 +312,8 @@ static int apci2032_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id apci2032_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1004) },
{ 0 }
{ PCI_VDEVICE(ADDIDATA, 0x1004) },
{ }
};
MODULE_DEVICE_TABLE(pci, apci2032_pci_table);

4
drivers/comedi/drivers/addi_apci_2200.c
View File

@ -125,8 +125,8 @@ static int apci2200_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id apci2200_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1005) },
{ 0 }
{ PCI_VDEVICE(ADDIDATA, 0x1005) },
{ }
};
MODULE_DEVICE_TABLE(pci, apci2200_pci_table);

6
drivers/comedi/drivers/addi_apci_3120.c
View File

@ -1098,9 +1098,9 @@ static int apci3120_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id apci3120_pci_table[] = {
{ PCI_VDEVICE(AMCC, 0x818d), BOARD_APCI3120 },
{ PCI_VDEVICE(AMCC, 0x828d), BOARD_APCI3001 },
{ 0 }
{ PCI_VDEVICE(AMCC, 0x818d), .driver_data = BOARD_APCI3120 },
{ PCI_VDEVICE(AMCC, 0x828d), .driver_data = BOARD_APCI3001 },
{ }
};
MODULE_DEVICE_TABLE(pci, apci3120_pci_table);

4
drivers/comedi/drivers/addi_apci_3501.c
View File

@ -399,8 +399,8 @@ static int apci3501_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id apci3501_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3001) },
{ 0 }
{ PCI_VDEVICE(ADDIDATA, 0x3001) },
{ }
};
MODULE_DEVICE_TABLE(pci, apci3501_pci_table);

52
drivers/comedi/drivers/addi_apci_3xxx.c
View File

@ -918,32 +918,32 @@ static int apci3xxx_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id apci3xxx_pci_table[] = {
{ PCI_VDEVICE(ADDIDATA, 0x3010), BOARD_APCI3000_16 },
{ PCI_VDEVICE(ADDIDATA, 0x300f), BOARD_APCI3000_8 },
{ PCI_VDEVICE(ADDIDATA, 0x300e), BOARD_APCI3000_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3013), BOARD_APCI3006_16 },
{ PCI_VDEVICE(ADDIDATA, 0x3014), BOARD_APCI3006_8 },
{ PCI_VDEVICE(ADDIDATA, 0x3015), BOARD_APCI3006_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3016), BOARD_APCI3010_16 },
{ PCI_VDEVICE(ADDIDATA, 0x3017), BOARD_APCI3010_8 },
{ PCI_VDEVICE(ADDIDATA, 0x3018), BOARD_APCI3010_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3019), BOARD_APCI3016_16 },
{ PCI_VDEVICE(ADDIDATA, 0x301a), BOARD_APCI3016_8 },
{ PCI_VDEVICE(ADDIDATA, 0x301b), BOARD_APCI3016_4 },
{ PCI_VDEVICE(ADDIDATA, 0x301c), BOARD_APCI3100_16_4 },
{ PCI_VDEVICE(ADDIDATA, 0x301d), BOARD_APCI3100_8_4 },
{ PCI_VDEVICE(ADDIDATA, 0x301e), BOARD_APCI3106_16_4 },
{ PCI_VDEVICE(ADDIDATA, 0x301f), BOARD_APCI3106_8_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3020), BOARD_APCI3110_16_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3021), BOARD_APCI3110_8_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3022), BOARD_APCI3116_16_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3023), BOARD_APCI3116_8_4 },
{ PCI_VDEVICE(ADDIDATA, 0x300B), BOARD_APCI3003 },
{ PCI_VDEVICE(ADDIDATA, 0x3002), BOARD_APCI3002_16 },
{ PCI_VDEVICE(ADDIDATA, 0x3003), BOARD_APCI3002_8 },
{ PCI_VDEVICE(ADDIDATA, 0x3004), BOARD_APCI3002_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3024), BOARD_APCI3500 },
{ 0 }
{ PCI_VDEVICE(ADDIDATA, 0x3010), .driver_data = BOARD_APCI3000_16 },
{ PCI_VDEVICE(ADDIDATA, 0x300f), .driver_data = BOARD_APCI3000_8 },
{ PCI_VDEVICE(ADDIDATA, 0x300e), .driver_data = BOARD_APCI3000_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3013), .driver_data = BOARD_APCI3006_16 },
{ PCI_VDEVICE(ADDIDATA, 0x3014), .driver_data = BOARD_APCI3006_8 },
{ PCI_VDEVICE(ADDIDATA, 0x3015), .driver_data = BOARD_APCI3006_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3016), .driver_data = BOARD_APCI3010_16 },
{ PCI_VDEVICE(ADDIDATA, 0x3017), .driver_data = BOARD_APCI3010_8 },
{ PCI_VDEVICE(ADDIDATA, 0x3018), .driver_data = BOARD_APCI3010_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3019), .driver_data = BOARD_APCI3016_16 },
{ PCI_VDEVICE(ADDIDATA, 0x301a), .driver_data = BOARD_APCI3016_8 },
{ PCI_VDEVICE(ADDIDATA, 0x301b), .driver_data = BOARD_APCI3016_4 },
{ PCI_VDEVICE(ADDIDATA, 0x301c), .driver_data = BOARD_APCI3100_16_4 },
{ PCI_VDEVICE(ADDIDATA, 0x301d), .driver_data = BOARD_APCI3100_8_4 },
{ PCI_VDEVICE(ADDIDATA, 0x301e), .driver_data = BOARD_APCI3106_16_4 },
{ PCI_VDEVICE(ADDIDATA, 0x301f), .driver_data = BOARD_APCI3106_8_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3020), .driver_data = BOARD_APCI3110_16_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3021), .driver_data = BOARD_APCI3110_8_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3022), .driver_data = BOARD_APCI3116_16_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3023), .driver_data = BOARD_APCI3116_8_4 },
{ PCI_VDEVICE(ADDIDATA, 0x300B), .driver_data = BOARD_APCI3003 },
{ PCI_VDEVICE(ADDIDATA, 0x3002), .driver_data = BOARD_APCI3002_16 },
{ PCI_VDEVICE(ADDIDATA, 0x3003), .driver_data = BOARD_APCI3002_8 },
{ PCI_VDEVICE(ADDIDATA, 0x3004), .driver_data = BOARD_APCI3002_4 },
{ PCI_VDEVICE(ADDIDATA, 0x3024), .driver_data = BOARD_APCI3500 },
{ }
};
MODULE_DEVICE_TABLE(pci, apci3xxx_pci_table);

7
drivers/comedi/drivers/adl_pci6208.c
View File

@ -180,10 +180,9 @@ static int adl_pci6208_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id adl_pci6208_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADLINK, 0x6208) },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
0x9999, 0x6208) },
{ 0 }
{ PCI_VDEVICE(ADLINK, 0x6208) },
{ PCI_VDEVICE_SUB(PLX, PCI_DEVICE_ID_PLX_9050, 0x9999, 0x6208) },
{ }
};
MODULE_DEVICE_TABLE(pci, adl_pci6208_pci_table);

18
drivers/comedi/drivers/adl_pci7250.c
View File

@ -194,16 +194,16 @@ static int adl_pci7250_pci_probe(struct pci_dev *dev,
static const struct pci_device_id adl_pci7250_pci_table[] = {
#ifdef CONFIG_HAS_IOPORT
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
0x9999, 0x7250) },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ADLINK, 0x7250,
0x9999, 0x7250) },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ADLINK, 0x7250,
PCI_VENDOR_ID_ADLINK, 0x7250) },
{ PCI_VDEVICE_SUB(PLX, PCI_DEVICE_ID_PLX_9050,
0x9999, 0x7250) },
{ PCI_VDEVICE_SUB(ADLINK, 0x7250,
0x9999, 0x7250) },
{ PCI_VDEVICE_SUB(ADLINK, 0x7250,
PCI_VENDOR_ID_ADLINK, 0x7250) },
#endif
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ADLINK, 0x7250,
PCI_VENDOR_ID_ADLINK, 0x7000) }, /* newer LPCIe-7250 */
{ 0 }
{ PCI_VDEVICE_SUB(ADLINK, 0x7250,
PCI_VENDOR_ID_ADLINK, 0x7000) }, /* newer LPCIe-7250 */
{ }
};
MODULE_DEVICE_TABLE(pci, adl_pci7250_pci_table);

14
drivers/comedi/drivers/adl_pci7x3x.c
View File

@ -518,13 +518,13 @@ static int adl_pci7x3x_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id adl_pci7x3x_pci_table[] = {
{ PCI_VDEVICE(ADLINK, 0x7230), BOARD_PCI7230 },
{ PCI_VDEVICE(ADLINK, 0x7233), BOARD_PCI7233 },
{ PCI_VDEVICE(ADLINK, 0x7234), BOARD_PCI7234 },
{ PCI_VDEVICE(ADLINK, 0x7432), BOARD_PCI7432 },
{ PCI_VDEVICE(ADLINK, 0x7433), BOARD_PCI7433 },
{ PCI_VDEVICE(ADLINK, 0x7434), BOARD_PCI7434 },
{ 0 }
{ PCI_VDEVICE(ADLINK, 0x7230), .driver_data = BOARD_PCI7230 },
{ PCI_VDEVICE(ADLINK, 0x7233), .driver_data = BOARD_PCI7233 },
{ PCI_VDEVICE(ADLINK, 0x7234), .driver_data = BOARD_PCI7234 },
{ PCI_VDEVICE(ADLINK, 0x7432), .driver_data = BOARD_PCI7432 },
{ PCI_VDEVICE(ADLINK, 0x7433), .driver_data = BOARD_PCI7433 },
{ PCI_VDEVICE(ADLINK, 0x7434), .driver_data = BOARD_PCI7434 },
{ }
};
MODULE_DEVICE_TABLE(pci, adl_pci7x3x_pci_table);

4
drivers/comedi/drivers/adl_pci8164.c
View File

@ -135,8 +135,8 @@ static int adl_pci8164_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id adl_pci8164_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADLINK, 0x8164) },
{ 0 }
{ PCI_VDEVICE(ADLINK, 0x8164) },
{ }
};
MODULE_DEVICE_TABLE(pci, adl_pci8164_pci_table);

6
drivers/comedi/drivers/adl_pci9111.c
View File

@ -727,9 +727,9 @@ static int pci9111_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id pci9111_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADLINK, 0x9111) },
/* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
{ 0 }
{ PCI_VDEVICE(ADLINK, 0x9111) },
/* { PCI_VDEVICE(ADLINK, PCI9111_HG_DEVICE_ID) }, */
{ }
};
MODULE_DEVICE_TABLE(pci, pci9111_pci_table);

8
drivers/comedi/drivers/adl_pci9118.c
View File

@ -1715,10 +1715,10 @@ static int adl_pci9118_pci_probe(struct pci_dev *dev,
/* FIXME: All the supported board types have the same device ID! */
static const struct pci_device_id adl_pci9118_pci_table[] = {
{ PCI_VDEVICE(AMCC, 0x80d9), BOARD_PCI9118DG },
/* { PCI_VDEVICE(AMCC, 0x80d9), BOARD_PCI9118HG }, */
/* { PCI_VDEVICE(AMCC, 0x80d9), BOARD_PCI9118HR }, */
{ 0 }
{ PCI_VDEVICE(AMCC, 0x80d9), .driver_data = BOARD_PCI9118DG },
/* { PCI_VDEVICE(AMCC, 0x80d9), .driver_data = BOARD_PCI9118HG }, */
/* { PCI_VDEVICE(AMCC, 0x80d9), .driver_data = BOARD_PCI9118HR }, */
{ }
};
MODULE_DEVICE_TABLE(pci, adl_pci9118_pci_table);

62
drivers/comedi/drivers/adv_pci1710.c
View File

@ -892,60 +892,66 @@ static int adv_pci1710_pci_probe(struct pci_dev *dev,
static const struct pci_device_id adv_pci1710_pci_table[] = {
{
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710,
PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710,
PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050),
.driver_data = BOARD_PCI1710,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0x0000),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0x0000),
.driver_data = BOARD_PCI1710,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xb100),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xb100),
.driver_data = BOARD_PCI1710,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xb200),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xb200),
.driver_data = BOARD_PCI1710,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xc100),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xc100),
.driver_data = BOARD_PCI1710,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xc200),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xc200),
.driver_data = BOARD_PCI1710,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710, 0x1000, 0xd100),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710, 0x1000, 0xd100),
.driver_data = BOARD_PCI1710,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0x0002),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0x0002),
.driver_data = BOARD_PCI1710HG,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xb102),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xb102),
.driver_data = BOARD_PCI1710HG,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xb202),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xb202),
.driver_data = BOARD_PCI1710HG,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xc102),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xc102),
.driver_data = BOARD_PCI1710HG,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xc202),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710,
PCI_VENDOR_ID_ADVANTECH, 0xc202),
.driver_data = BOARD_PCI1710HG,
}, {
PCI_DEVICE_SUB(PCI_VENDOR_ID_ADVANTECH, 0x1710, 0x1000, 0xd102),
PCI_VDEVICE_SUB(ADVANTECH, 0x1710, 0x1000, 0xd102),
.driver_data = BOARD_PCI1710HG,
}, {
PCI_VDEVICE(ADVANTECH, 0x1711),
.driver_data = BOARD_PCI1711,
}, {
PCI_VDEVICE(ADVANTECH, 0x1713),
.driver_data = BOARD_PCI1713,
}, {
PCI_VDEVICE(ADVANTECH, 0x1731),
.driver_data = BOARD_PCI1731,
},
{ PCI_VDEVICE(ADVANTECH, 0x1711), BOARD_PCI1711 },
{ PCI_VDEVICE(ADVANTECH, 0x1713), BOARD_PCI1713 },
{ PCI_VDEVICE(ADVANTECH, 0x1731), BOARD_PCI1731 },
{ 0 }
{ }
};
MODULE_DEVICE_TABLE(pci, adv_pci1710_pci_table);

4
drivers/comedi/drivers/adv_pci1720.c
View File

@ -167,8 +167,8 @@ static int adv_pci1720_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id adv_pci1720_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADVANTECH, 0x1720) },
{ 0 }
{ PCI_VDEVICE(ADVANTECH, 0x1720) },
{ }
};
MODULE_DEVICE_TABLE(pci, adv_pci1720_pci_table);

4
drivers/comedi/drivers/adv_pci1723.c
View File

@ -208,8 +208,8 @@ static int adv_pci1723_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id adv_pci1723_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADVANTECH, 0x1723) },
{ 0 }
{ PCI_VDEVICE(ADVANTECH, 0x1723) },
{ }
};
MODULE_DEVICE_TABLE(pci, adv_pci1723_pci_table);

4
drivers/comedi/drivers/adv_pci1724.c
View File

@ -189,8 +189,8 @@ static int adv_pci1724_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id adv_pci1724_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADVANTECH, 0x1724) },
{ 0 }
{ PCI_VDEVICE(ADVANTECH, 0x1724) },
{ }
};
MODULE_DEVICE_TABLE(pci, adv_pci1724_pci_table);

4
drivers/comedi/drivers/adv_pci1760.c
View File

@ -405,8 +405,8 @@ static int pci1760_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id pci1760_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ADVANTECH, 0x1760) },
{ 0 }
{ PCI_VDEVICE(ADVANTECH, 0x1760) },
{ }
};
MODULE_DEVICE_TABLE(pci, pci1760_pci_table);

30
drivers/comedi/drivers/adv_pci_dio.c
View File

@ -768,21 +768,21 @@ static int adv_pci_dio_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id adv_pci_dio_pci_table[] = {
{ PCI_VDEVICE(ADVANTECH, 0x1730), TYPE_PCI1730 },
{ PCI_VDEVICE(ADVANTECH, 0x1733), TYPE_PCI1733 },
{ PCI_VDEVICE(ADVANTECH, 0x1734), TYPE_PCI1734 },
{ PCI_VDEVICE(ADVANTECH, 0x1735), TYPE_PCI1735 },
{ PCI_VDEVICE(ADVANTECH, 0x1736), TYPE_PCI1736 },
{ PCI_VDEVICE(ADVANTECH, 0x1739), TYPE_PCI1739 },
{ PCI_VDEVICE(ADVANTECH, 0x1750), TYPE_PCI1750 },
{ PCI_VDEVICE(ADVANTECH, 0x1751), TYPE_PCI1751 },
{ PCI_VDEVICE(ADVANTECH, 0x1752), TYPE_PCI1752 },
{ PCI_VDEVICE(ADVANTECH, 0x1753), TYPE_PCI1753 },
{ PCI_VDEVICE(ADVANTECH, 0x1754), TYPE_PCI1754 },
{ PCI_VDEVICE(ADVANTECH, 0x1756), TYPE_PCI1756 },
{ PCI_VDEVICE(ADVANTECH, 0x1761), TYPE_PCI1761 },
{ PCI_VDEVICE(ADVANTECH, 0x1762), TYPE_PCI1762 },
{ 0 }
{ PCI_VDEVICE(ADVANTECH, 0x1730), .driver_data = TYPE_PCI1730 },
{ PCI_VDEVICE(ADVANTECH, 0x1733), .driver_data = TYPE_PCI1733 },
{ PCI_VDEVICE(ADVANTECH, 0x1734), .driver_data = TYPE_PCI1734 },
{ PCI_VDEVICE(ADVANTECH, 0x1735), .driver_data = TYPE_PCI1735 },
{ PCI_VDEVICE(ADVANTECH, 0x1736), .driver_data = TYPE_PCI1736 },
{ PCI_VDEVICE(ADVANTECH, 0x1739), .driver_data = TYPE_PCI1739 },
{ PCI_VDEVICE(ADVANTECH, 0x1750), .driver_data = TYPE_PCI1750 },
{ PCI_VDEVICE(ADVANTECH, 0x1751), .driver_data = TYPE_PCI1751 },
{ PCI_VDEVICE(ADVANTECH, 0x1752), .driver_data = TYPE_PCI1752 },
{ PCI_VDEVICE(ADVANTECH, 0x1753), .driver_data = TYPE_PCI1753 },
{ PCI_VDEVICE(ADVANTECH, 0x1754), .driver_data = TYPE_PCI1754 },
{ PCI_VDEVICE(ADVANTECH, 0x1756), .driver_data = TYPE_PCI1756 },
{ PCI_VDEVICE(ADVANTECH, 0x1761), .driver_data = TYPE_PCI1761 },
{ PCI_VDEVICE(ADVANTECH, 0x1762), .driver_data = TYPE_PCI1762 },
{ }
};
MODULE_DEVICE_TABLE(pci, adv_pci_dio_pci_table);

12
drivers/comedi/drivers/amplc_dio200_pci.c
View File

@ -394,13 +394,13 @@ static struct comedi_driver dio200_pci_comedi_driver = {
static const struct pci_device_id dio200_pci_table[] = {
#ifdef CONFIG_HAS_IOPORT
{ PCI_VDEVICE(AMPLICON, 0x000b), pci215_model },
{ PCI_VDEVICE(AMPLICON, 0x000a), pci272_model },
{ PCI_VDEVICE(AMPLICON, 0x000b), .driver_data = pci215_model },
{ PCI_VDEVICE(AMPLICON, 0x000a), .driver_data = pci272_model },
#endif /* CONFIG_HAS_IOPORT */
{ PCI_VDEVICE(AMPLICON, 0x0011), pcie236_model },
{ PCI_VDEVICE(AMPLICON, 0x0012), pcie215_model },
{ PCI_VDEVICE(AMPLICON, 0x0014), pcie296_model },
{0}
{ PCI_VDEVICE(AMPLICON, 0x0011), .driver_data = pcie236_model },
{ PCI_VDEVICE(AMPLICON, 0x0012), .driver_data = pcie215_model },
{ PCI_VDEVICE(AMPLICON, 0x0014), .driver_data = pcie296_model },
{ }
};
MODULE_DEVICE_TABLE(pci, dio200_pci_table);

6
drivers/comedi/drivers/amplc_pci224.c
View File

@ -1122,9 +1122,9 @@ static int amplc_pci224_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id amplc_pci224_pci_table[] = {
{ PCI_VDEVICE(AMPLICON, 0x0007), pci224_model },
{ PCI_VDEVICE(AMPLICON, 0x0008), pci234_model },
{ 0 }
{ PCI_VDEVICE(AMPLICON, 0x0007), .driver_data = pci224_model },
{ PCI_VDEVICE(AMPLICON, 0x0008), .driver_data = pci234_model },
{ }
};
MODULE_DEVICE_TABLE(pci, amplc_pci224_pci_table);

6
drivers/comedi/drivers/amplc_pci230.c
View File

@ -2554,9 +2554,9 @@ static int amplc_pci230_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id amplc_pci230_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_PCI230) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_PCI260) },
{ 0 }
{ PCI_VDEVICE(AMPLICON, PCI_DEVICE_ID_PCI230) },
{ PCI_VDEVICE(AMPLICON, PCI_DEVICE_ID_PCI260) },
{ }
};
MODULE_DEVICE_TABLE(pci, amplc_pci230_pci_table);

4
drivers/comedi/drivers/amplc_pci236.c
View File

@ -116,8 +116,8 @@ static struct comedi_driver amplc_pci236_driver = {
};
static const struct pci_device_id pci236_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, 0x0009) },
{ 0 }
{ PCI_VDEVICE(AMPLICON, 0x0009) },
{ }
};
MODULE_DEVICE_TABLE(pci, pci236_pci_table);

4
drivers/comedi/drivers/amplc_pci263.c
View File

@ -85,8 +85,8 @@ static struct comedi_driver amplc_pci263_driver = {
};
static const struct pci_device_id pci263_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, 0x000c) },
{0}
{ PCI_VDEVICE(AMPLICON, 0x000c) },
{ }
};
MODULE_DEVICE_TABLE(pci, pci263_pci_table);

18
drivers/comedi/drivers/cb_pcidas.c
View File

@ -1474,15 +1474,15 @@ static int cb_pcidas_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id cb_pcidas_pci_table[] = {
{ PCI_VDEVICE(CB, 0x0001), BOARD_PCIDAS1602_16 },
{ PCI_VDEVICE(CB, 0x000f), BOARD_PCIDAS1200 },
{ PCI_VDEVICE(CB, 0x0010), BOARD_PCIDAS1602_12 },
{ PCI_VDEVICE(CB, 0x0019), BOARD_PCIDAS1200_JR },
{ PCI_VDEVICE(CB, 0x001c), BOARD_PCIDAS1602_16_JR },
{ PCI_VDEVICE(CB, 0x004c), BOARD_PCIDAS1000 },
{ PCI_VDEVICE(CB, 0x001a), BOARD_PCIDAS1001 },
{ PCI_VDEVICE(CB, 0x001b), BOARD_PCIDAS1002 },
{ 0 }
{ PCI_VDEVICE(CB, 0x0001), .driver_data = BOARD_PCIDAS1602_16 },
{ PCI_VDEVICE(CB, 0x000f), .driver_data = BOARD_PCIDAS1200 },
{ PCI_VDEVICE(CB, 0x0010), .driver_data = BOARD_PCIDAS1602_12 },
{ PCI_VDEVICE(CB, 0x0019), .driver_data = BOARD_PCIDAS1200_JR },
{ PCI_VDEVICE(CB, 0x001c), .driver_data = BOARD_PCIDAS1602_16_JR },
{ PCI_VDEVICE(CB, 0x004c), .driver_data = BOARD_PCIDAS1000 },
{ PCI_VDEVICE(CB, 0x001a), .driver_data = BOARD_PCIDAS1001 },
{ PCI_VDEVICE(CB, 0x001b), .driver_data = BOARD_PCIDAS1002 },
{ }
};
MODULE_DEVICE_TABLE(pci, cb_pcidas_pci_table);

44
drivers/comedi/drivers/cb_pcidas64.c
View File

@ -4074,28 +4074,28 @@ static int cb_pcidas64_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id cb_pcidas64_pci_table[] = {
{ PCI_VDEVICE(CB, 0x001d), BOARD_PCIDAS6402_16 },
{ PCI_VDEVICE(CB, 0x001e), BOARD_PCIDAS6402_12 },
{ PCI_VDEVICE(CB, 0x0035), BOARD_PCIDAS64_M1_16 },
{ PCI_VDEVICE(CB, 0x0036), BOARD_PCIDAS64_M2_16 },
{ PCI_VDEVICE(CB, 0x0037), BOARD_PCIDAS64_M3_16 },
{ PCI_VDEVICE(CB, 0x0052), BOARD_PCIDAS4020_12 },
{ PCI_VDEVICE(CB, 0x005d), BOARD_PCIDAS6023 },
{ PCI_VDEVICE(CB, 0x005e), BOARD_PCIDAS6025 },
{ PCI_VDEVICE(CB, 0x005f), BOARD_PCIDAS6030 },
{ PCI_VDEVICE(CB, 0x0060), BOARD_PCIDAS6031 },
{ PCI_VDEVICE(CB, 0x0061), BOARD_PCIDAS6032 },
{ PCI_VDEVICE(CB, 0x0062), BOARD_PCIDAS6033 },
{ PCI_VDEVICE(CB, 0x0063), BOARD_PCIDAS6034 },
{ PCI_VDEVICE(CB, 0x0064), BOARD_PCIDAS6035 },
{ PCI_VDEVICE(CB, 0x0065), BOARD_PCIDAS6040 },
{ PCI_VDEVICE(CB, 0x0066), BOARD_PCIDAS6052 },
{ PCI_VDEVICE(CB, 0x0067), BOARD_PCIDAS6070 },
{ PCI_VDEVICE(CB, 0x0068), BOARD_PCIDAS6071 },
{ PCI_VDEVICE(CB, 0x006f), BOARD_PCIDAS6036 },
{ PCI_VDEVICE(CB, 0x0078), BOARD_PCIDAS6013 },
{ PCI_VDEVICE(CB, 0x0079), BOARD_PCIDAS6014 },
{ 0 }
{ PCI_VDEVICE(CB, 0x001d), .driver_data = BOARD_PCIDAS6402_16 },
{ PCI_VDEVICE(CB, 0x001e), .driver_data = BOARD_PCIDAS6402_12 },
{ PCI_VDEVICE(CB, 0x0035), .driver_data = BOARD_PCIDAS64_M1_16 },
{ PCI_VDEVICE(CB, 0x0036), .driver_data = BOARD_PCIDAS64_M2_16 },
{ PCI_VDEVICE(CB, 0x0037), .driver_data = BOARD_PCIDAS64_M3_16 },
{ PCI_VDEVICE(CB, 0x0052), .driver_data = BOARD_PCIDAS4020_12 },
{ PCI_VDEVICE(CB, 0x005d), .driver_data = BOARD_PCIDAS6023 },
{ PCI_VDEVICE(CB, 0x005e), .driver_data = BOARD_PCIDAS6025 },
{ PCI_VDEVICE(CB, 0x005f), .driver_data = BOARD_PCIDAS6030 },
{ PCI_VDEVICE(CB, 0x0060), .driver_data = BOARD_PCIDAS6031 },
{ PCI_VDEVICE(CB, 0x0061), .driver_data = BOARD_PCIDAS6032 },
{ PCI_VDEVICE(CB, 0x0062), .driver_data = BOARD_PCIDAS6033 },
{ PCI_VDEVICE(CB, 0x0063), .driver_data = BOARD_PCIDAS6034 },
{ PCI_VDEVICE(CB, 0x0064), .driver_data = BOARD_PCIDAS6035 },
{ PCI_VDEVICE(CB, 0x0065), .driver_data = BOARD_PCIDAS6040 },
{ PCI_VDEVICE(CB, 0x0066), .driver_data = BOARD_PCIDAS6052 },
{ PCI_VDEVICE(CB, 0x0067), .driver_data = BOARD_PCIDAS6070 },
{ PCI_VDEVICE(CB, 0x0068), .driver_data = BOARD_PCIDAS6071 },
{ PCI_VDEVICE(CB, 0x006f), .driver_data = BOARD_PCIDAS6036 },
{ PCI_VDEVICE(CB, 0x0078), .driver_data = BOARD_PCIDAS6013 },
{ PCI_VDEVICE(CB, 0x0079), .driver_data = BOARD_PCIDAS6014 },
{ }
};
MODULE_DEVICE_TABLE(pci, cb_pcidas64_pci_table);

14
drivers/comedi/drivers/cb_pcidda.c
View File

@ -396,13 +396,13 @@ static int cb_pcidda_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id cb_pcidda_pci_table[] = {
{ PCI_VDEVICE(CB, 0x0020), BOARD_DDA02_12 },
{ PCI_VDEVICE(CB, 0x0021), BOARD_DDA04_12 },
{ PCI_VDEVICE(CB, 0x0022), BOARD_DDA08_12 },
{ PCI_VDEVICE(CB, 0x0023), BOARD_DDA02_16 },
{ PCI_VDEVICE(CB, 0x0024), BOARD_DDA04_16 },
{ PCI_VDEVICE(CB, 0x0025), BOARD_DDA08_16 },
{ 0 }
{ PCI_VDEVICE(CB, 0x0020), .driver_data = BOARD_DDA02_12 },
{ PCI_VDEVICE(CB, 0x0021), .driver_data = BOARD_DDA04_12 },
{ PCI_VDEVICE(CB, 0x0022), .driver_data = BOARD_DDA08_12 },
{ PCI_VDEVICE(CB, 0x0023), .driver_data = BOARD_DDA02_16 },
{ PCI_VDEVICE(CB, 0x0024), .driver_data = BOARD_DDA04_16 },
{ PCI_VDEVICE(CB, 0x0025), .driver_data = BOARD_DDA08_16 },
{ }
};
MODULE_DEVICE_TABLE(pci, cb_pcidda_pci_table);

6
drivers/comedi/drivers/cb_pcimdas.c
View File

@ -455,9 +455,9 @@ static int cb_pcimdas_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id cb_pcimdas_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0056) }, /* PCIM-DAS1602/16 */
{ PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0115) }, /* PCIe-DAS1602/16 */
{ 0 }
{ PCI_VDEVICE(CB, 0x0056) }, /* PCIM-DAS1602/16 */
{ PCI_VDEVICE(CB, 0x0115) }, /* PCIe-DAS1602/16 */
{ }
};
MODULE_DEVICE_TABLE(pci, cb_pcimdas_pci_table);

4
drivers/comedi/drivers/cb_pcimdda.c
View File

@ -172,8 +172,8 @@ static int cb_pcimdda_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id cb_pcimdda_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_CB, PCI_ID_PCIM_DDA06_16) },
{ 0 }
{ PCI_VDEVICE(CB, PCI_ID_PCIM_DDA06_16) },
{ }
};
MODULE_DEVICE_TABLE(pci, cb_pcimdda_pci_table);

4
drivers/comedi/drivers/contec_pci_dio.c
View File

@ -98,8 +98,8 @@ static int contec_pci_dio_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id contec_pci_dio_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_CONTEC, 0x8172) },
{ 0 }
{ PCI_VDEVICE(CONTEC, 0x8172) },
{ }
};
MODULE_DEVICE_TABLE(pci, contec_pci_dio_pci_table);

10
drivers/comedi/drivers/daqboard2000.c
View File

@ -764,11 +764,11 @@ static int db2k_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
}
static const struct pci_device_id db2k_pci_table[] = {
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_IOTECH, 0x0409, PCI_VENDOR_ID_IOTECH,
0x0002), .driver_data = BOARD_DAQBOARD2000, },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_IOTECH, 0x0409, PCI_VENDOR_ID_IOTECH,
0x0004), .driver_data = BOARD_DAQBOARD2001, },
{ 0 }
{ PCI_VDEVICE_SUB(IOTECH, 0x0409, PCI_VENDOR_ID_IOTECH, 0x0002),
.driver_data = BOARD_DAQBOARD2000 },
{ PCI_VDEVICE_SUB(IOTECH, 0x0409, PCI_VENDOR_ID_IOTECH, 0x0004),
.driver_data = BOARD_DAQBOARD2001 },
{ }
};
MODULE_DEVICE_TABLE(pci, db2k_pci_table);

4
drivers/comedi/drivers/das08_pci.c
View File

@ -77,8 +77,8 @@ static int das08_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id das08_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0029) },
{ 0 }
{ PCI_VDEVICE(CB, 0x0029) },
{ }
};
MODULE_DEVICE_TABLE(pci, das08_pci_table);

16
drivers/comedi/drivers/dt3000.c
View File

@ -715,14 +715,14 @@ static int dt3000_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id dt3000_pci_table[] = {
{ PCI_VDEVICE(DT, 0x0022), BOARD_DT3001 },
{ PCI_VDEVICE(DT, 0x0023), BOARD_DT3002 },
{ PCI_VDEVICE(DT, 0x0024), BOARD_DT3003 },
{ PCI_VDEVICE(DT, 0x0025), BOARD_DT3004 },
{ PCI_VDEVICE(DT, 0x0026), BOARD_DT3005 },
{ PCI_VDEVICE(DT, 0x0027), BOARD_DT3001_PGL },
{ PCI_VDEVICE(DT, 0x0028), BOARD_DT3003_PGL },
{ 0 }
{ PCI_VDEVICE(DT, 0x0022), .driver_data = BOARD_DT3001 },
{ PCI_VDEVICE(DT, 0x0023), .driver_data = BOARD_DT3002 },
{ PCI_VDEVICE(DT, 0x0024), .driver_data = BOARD_DT3003 },
{ PCI_VDEVICE(DT, 0x0025), .driver_data = BOARD_DT3004 },
{ PCI_VDEVICE(DT, 0x0026), .driver_data = BOARD_DT3005 },
{ PCI_VDEVICE(DT, 0x0027), .driver_data = BOARD_DT3001_PGL },
{ PCI_VDEVICE(DT, 0x0028), .driver_data = BOARD_DT3003_PGL },
{ }
};
MODULE_DEVICE_TABLE(pci, dt3000_pci_table);

4
drivers/comedi/drivers/dyna_pci10xx.c
View File

@ -246,8 +246,8 @@ static int dyna_pci10xx_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id dyna_pci10xx_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_PLX, 0x1050) },
{ 0 }
{ PCI_VDEVICE(PLX, 0x1050) },
{ }
};
MODULE_DEVICE_TABLE(pci, dyna_pci10xx_pci_table);

6
drivers/comedi/drivers/gsc_hpdi.c
View File

@ -703,9 +703,9 @@ static int gsc_hpdi_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id gsc_hpdi_pci_table[] = {
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9080,
PCI_VENDOR_ID_PLX, 0x2400) },
{ 0 }
{ PCI_VDEVICE_SUB(PLX, PCI_DEVICE_ID_PLX_9080,
PCI_VENDOR_ID_PLX, 0x2400) },
{ }
};
MODULE_DEVICE_TABLE(pci, gsc_hpdi_pci_table);

4
drivers/comedi/drivers/icp_multi.c
View File

@ -317,8 +317,8 @@ static int icp_multi_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id icp_multi_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ICP, 0x8000) },
{ 0 }
{ PCI_VDEVICE(ICP, 0x8000) },
{ }
};
MODULE_DEVICE_TABLE(pci, icp_multi_pci_table);

12
drivers/comedi/drivers/jr3_pci.c
View File

@ -779,12 +779,12 @@ static int jr3_pci_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id jr3_pci_pci_table[] = {
{ PCI_VDEVICE(JR3, 0x1111), BOARD_JR3_1 },
{ PCI_VDEVICE(JR3, 0x3111), BOARD_JR3_1 },
{ PCI_VDEVICE(JR3, 0x3112), BOARD_JR3_2 },
{ PCI_VDEVICE(JR3, 0x3113), BOARD_JR3_3 },
{ PCI_VDEVICE(JR3, 0x3114), BOARD_JR3_4 },
{ 0 }
{ PCI_VDEVICE(JR3, 0x1111), .driver_data = BOARD_JR3_1 },
{ PCI_VDEVICE(JR3, 0x3111), .driver_data = BOARD_JR3_1 },
{ PCI_VDEVICE(JR3, 0x3112), .driver_data = BOARD_JR3_2 },
{ PCI_VDEVICE(JR3, 0x3113), .driver_data = BOARD_JR3_3 },
{ PCI_VDEVICE(JR3, 0x3114), .driver_data = BOARD_JR3_4 },
{ }
};
MODULE_DEVICE_TABLE(pci, jr3_pci_pci_table);

4
drivers/comedi/drivers/ke_counter.c
View File

@ -213,8 +213,8 @@ static int ke_counter_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id ke_counter_pci_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_KOLTER, 0x0014) },
{ 0 }
{ PCI_VDEVICE(KOLTER, 0x0014) },
{ }
};
MODULE_DEVICE_TABLE(pci, ke_counter_pci_table);

28
drivers/comedi/drivers/me4000.c
View File

@ -1254,20 +1254,20 @@ static int me4000_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id me4000_pci_table[] = {
{ PCI_VDEVICE(MEILHAUS, 0x4650), BOARD_ME4650 },
{ PCI_VDEVICE(MEILHAUS, 0x4660), BOARD_ME4660 },
{ PCI_VDEVICE(MEILHAUS, 0x4661), BOARD_ME4660I },
{ PCI_VDEVICE(MEILHAUS, 0x4662), BOARD_ME4660S },
{ PCI_VDEVICE(MEILHAUS, 0x4663), BOARD_ME4660IS },
{ PCI_VDEVICE(MEILHAUS, 0x4670), BOARD_ME4670 },
{ PCI_VDEVICE(MEILHAUS, 0x4671), BOARD_ME4670I },
{ PCI_VDEVICE(MEILHAUS, 0x4672), BOARD_ME4670S },
{ PCI_VDEVICE(MEILHAUS, 0x4673), BOARD_ME4670IS },
{ PCI_VDEVICE(MEILHAUS, 0x4680), BOARD_ME4680 },
{ PCI_VDEVICE(MEILHAUS, 0x4681), BOARD_ME4680I },
{ PCI_VDEVICE(MEILHAUS, 0x4682), BOARD_ME4680S },
{ PCI_VDEVICE(MEILHAUS, 0x4683), BOARD_ME4680IS },
{ 0 }
{ PCI_VDEVICE(MEILHAUS, 0x4650), .driver_data = BOARD_ME4650 },
{ PCI_VDEVICE(MEILHAUS, 0x4660), .driver_data = BOARD_ME4660 },
{ PCI_VDEVICE(MEILHAUS, 0x4661), .driver_data = BOARD_ME4660I },
{ PCI_VDEVICE(MEILHAUS, 0x4662), .driver_data = BOARD_ME4660S },
{ PCI_VDEVICE(MEILHAUS, 0x4663), .driver_data = BOARD_ME4660IS },
{ PCI_VDEVICE(MEILHAUS, 0x4670), .driver_data = BOARD_ME4670 },
{ PCI_VDEVICE(MEILHAUS, 0x4671), .driver_data = BOARD_ME4670I },
{ PCI_VDEVICE(MEILHAUS, 0x4672), .driver_data = BOARD_ME4670S },
{ PCI_VDEVICE(MEILHAUS, 0x4673), .driver_data = BOARD_ME4670IS },
{ PCI_VDEVICE(MEILHAUS, 0x4680), .driver_data = BOARD_ME4680 },
{ PCI_VDEVICE(MEILHAUS, 0x4681), .driver_data = BOARD_ME4680I },
{ PCI_VDEVICE(MEILHAUS, 0x4682), .driver_data = BOARD_ME4680S },
{ PCI_VDEVICE(MEILHAUS, 0x4683), .driver_data = BOARD_ME4680IS },
{ }
};
MODULE_DEVICE_TABLE(pci, me4000_pci_table);

6
drivers/comedi/drivers/me_daq.c
View File

@ -538,9 +538,9 @@ static int me_daq_pci_probe(struct pci_dev *dev,
}
static const struct pci_device_id me_daq_pci_table[] = {
{ PCI_VDEVICE(MEILHAUS, 0x2600), BOARD_ME2600 },
{ PCI_VDEVICE(MEILHAUS, 0x2000), BOARD_ME2000 },
{ 0 }
{ PCI_VDEVICE(MEILHAUS, 0x2600), .driver_data = BOARD_ME2600 },
{ PCI_VDEVICE(MEILHAUS, 0x2000), .driver_data = BOARD_ME2000 },
{ }
};
MODULE_DEVICE_TABLE(pci, me_daq_pci_table);

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