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dt-bindings: clock: Add Amlogic A9 AO clock controller
Add the Always-On clock controller dt-bindings for the Amlogic A9 SoC family. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jian Hu <jian.hu@amlogic.com> Link: https://patch.msgid.link/20260623-a9_aoclk-v5-1-c7cb1ff9ebf1@amlogic.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
This commit is contained in:
Jian Hu
Jerome Brunet
parent
628b6fee9f
commit
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2026 Amlogic, Inc. All rights reserved
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/amlogic,a9-aoclkc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic A9 Series Always-On Clock Controller
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maintainers:
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- Neil Armstrong <neil.armstrong@linaro.org>
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- Jerome Brunet <jbrunet@baylibre.com>
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- Jian Hu <jian.hu@amlogic.com>
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- Xianwei Zhao <xianwei.zhao@amlogic.com>
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properties:
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compatible:
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const: amlogic,a9-aoclkc
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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clocks:
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minItems: 5
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items:
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- description: input oscillator
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- description: input fclk div 3
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- description: input fclk div 4
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- description: input fclk div 5
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- description: input sys clk
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- description: external fixed 32k (optional)
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clock-names:
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minItems: 5
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items:
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- const: xtal
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- const: fdiv3
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- const: fdiv4
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- const: fdiv5
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- const: sys
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- const: ext_32k
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required:
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- compatible
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- reg
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- '#clock-cells'
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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clock-controller@0 {
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compatible = "amlogic,a9-aoclkc";
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reg = <0x0 0x0 0x0 0x58>;
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#clock-cells = <1>;
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clocks = <&xtal>,
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<&scmi_clk 14>,
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<&scmi_clk 16>,
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<&scmi_clk 18>,
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<&scmi_clk 21>;
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clock-names = "xtal",
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"fdiv3",
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"fdiv4",
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"fdiv5",
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"sys";
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};
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};
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76
include/dt-bindings/clock/amlogic,a9-aoclkc.h
Normal file
76
include/dt-bindings/clock/amlogic,a9-aoclkc.h
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (C) 2026 Amlogic, Inc. All rights reserved.
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*/
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#ifndef __AMLOGIC_A9_AO_CLKC_H
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#define __AMLOGIC_A9_AO_CLKC_H
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#define CLKID_AO_XTAL_IN 0
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#define CLKID_AO_XTAL 1
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#define CLKID_AO_SYS 2
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#define CLKID_AO_SYS_I3C 3
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#define CLKID_AO_SYS_RTC_REG 4
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#define CLKID_AO_SYS_CLKTREE 5
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#define CLKID_AO_SYS_RST_CTRL 6
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#define CLKID_AO_SYS_PAD 7
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#define CLKID_AO_SYS_RTC_DIG 8
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#define CLKID_AO_SYS_IRQ 9
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#define CLKID_AO_SYS_PWRCTRL 10
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#define CLKID_AO_SYS_PWM_A 11
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#define CLKID_AO_SYS_PWM_B 12
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#define CLKID_AO_SYS_PWM_C 13
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#define CLKID_AO_SYS_PWM_D 14
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#define CLKID_AO_SYS_PWM_E 15
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#define CLKID_AO_SYS_PWM_F 16
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#define CLKID_AO_SYS_PWM_G 17
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#define CLKID_AO_SYS_I2C_A 18
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#define CLKID_AO_SYS_I2C_B 19
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#define CLKID_AO_SYS_I2C_C 20
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#define CLKID_AO_SYS_I2C_D 21
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#define CLKID_AO_SYS_SED 22
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#define CLKID_AO_SYS_IR_CTRL 23
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#define CLKID_AO_SYS_UART_B 24
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#define CLKID_AO_SYS_UART_C 25
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#define CLKID_AO_SYS_UART_D 26
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#define CLKID_AO_SYS_UART_E 27
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#define CLKID_AO_SYS_SPISG_0 28
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#define CLKID_AO_SYS_RTC_SECURE 29
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#define CLKID_AO_SYS_CEC 30
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#define CLKID_AO_SYS_AOCPU 31
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#define CLKID_AO_SYS_SRAM 32
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#define CLKID_AO_SYS_SPISG_1 33
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#define CLKID_AO_SYS_SPISG_2 34
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#define CLKID_AO_PWM_A_SEL 35
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#define CLKID_AO_PWM_A_DIV 36
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#define CLKID_AO_PWM_A 37
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#define CLKID_AO_PWM_B_SEL 38
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#define CLKID_AO_PWM_B_DIV 39
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#define CLKID_AO_PWM_B 40
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#define CLKID_AO_PWM_C_SEL 41
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#define CLKID_AO_PWM_C_DIV 42
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#define CLKID_AO_PWM_C 43
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#define CLKID_AO_PWM_D_SEL 44
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#define CLKID_AO_PWM_D_DIV 45
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#define CLKID_AO_PWM_D 46
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#define CLKID_AO_PWM_E_SEL 47
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#define CLKID_AO_PWM_E_DIV 48
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#define CLKID_AO_PWM_E 49
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#define CLKID_AO_PWM_F_SEL 50
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#define CLKID_AO_PWM_F_DIV 51
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#define CLKID_AO_PWM_F 52
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#define CLKID_AO_PWM_G_SEL 53
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#define CLKID_AO_PWM_G_DIV 54
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#define CLKID_AO_PWM_G 55
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#define CLKID_AO_RTC_DUALDIV_IN 56
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#define CLKID_AO_RTC_DUALDIV_DIV 57
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#define CLKID_AO_RTC_DUALDIV_SEL 58
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#define CLKID_AO_RTC_DUALDIV 59
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#define CLKID_AO_RTC 60
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#define CLKID_AO_CEC_DUALDIV_IN 61
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#define CLKID_AO_CEC_DUALDIV_DIV 62
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#define CLKID_AO_CEC_DUALDIV_SEL 63
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#define CLKID_AO_CEC_DUALDIV 64
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#define CLKID_AO_CEC 65
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#endif /* __AMLOGIC_A9_AO_CLKC_H */
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