Commit Graph

1445723 Commits

Author SHA1 Message Date
Pratik Vishwakarma
6a7dbff325 drm/amdgpu: add support for IH IP version 6.4.0
This initializes IH IP version 6.4.0.

Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:50:24 -04:00
Pratik Vishwakarma
5d2ce32351 drm/amdgpu: add support for NBIO IP version 7.11.5
This initializes NBIO IP version 7.11.5.

Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:50:21 -04:00
Pratik Vishwakarma
6db5cbbaa6 drm/amdgpu: add support for SDMA IP version 6.4.0
This initializes SDMA IP version 6.4.0.

Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:50:19 -04:00
Pratik Vishwakarma
51f6a4c758 drm/amdgpu: Add support for GC IP version 11.5.6
Initialize GC IP 11_5_6

Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:50:15 -04:00
Timur Kristóf
003851b532 drm/amdgpu: Use gmc->noretry instead of amdgpu_noretry directly
Whether retry faults are actually enabled, is determined by
the amdgpu_gmc_noretry_set() function. The rest of the code
base should use gmc->noretry instead of the module parameter.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:50:10 -04:00
Timur Kristóf
629279e2e7 drm/amdgpu: Align amdgpu_gtt_mgr entries to TLB size on all SI
It seems that Pitcairn has the same issues as Tahiti
with regards to the TLB size. This commit fixes a
VCE1 FW validation timeout on suspend/resume on Pitcairn.

Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5336
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:49:51 -04:00
Stanley.Yang
d7a5e06937 drm/amd/ras: Return RAS TA injection result to userspace
Return RAS TA injection result to userspace that avoid
app continue to load work once injection failed.

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: YiPeng Chai <YiPeng.Chai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:49:48 -04:00
Prike Liang
d87c9d8672 drm/amdgpu: unmap userq for evicting user queue
If the driver only preempts queues, there can still be inflight waves,
pending dispatch state, or resume/redispatch possibility tied to the
same queue. Then the VM/TTM side may proceed to move/unmap queue related
BOs during evicting userq objects while shader TCP clients still need to
access them.

So for eviction, unmap is safer because it makes the queue nonrunnable
before memory backing is invalidated. Meanwhile, for a idle queue it's
more sutiable for unmapping it rather preempt and unmapping also can
save more processing time than preempt.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:49:41 -04:00
Prike Liang
113fa3ca61 drm/amdgpu: reserve TTM move fences slot for rearming eviction fences
The eviction rearming does not cover possible TTM move fences. If TTM
moves the BO and consumes move fence slots, the later eviction fence
add can hit the dma_resv_add_fence() BUG.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:49:29 -04:00
Feifei Xu
c04b0430a9 drm/amdgpu: fix shift-out-bounds warning of number_instance
Clamp number_instance using BIT/BIT_ULL with the <32 check to avoid the
shift-out-bounds warning.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:49:24 -04:00
Alex Deucher
e0a3aa8a67 drm/amdgpu/sdma7.1: fix support for disable_kq
Set the flag in the ring structure.

Fixes: 80d4d3a45b ("drm/amdgpu/sdma7.1: add support for disable_kq")
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:48:44 -04:00
Feifei Xu
5ac01ec854 drm/amdgpu: Add size guard before copy discovery binary
Fix the firmware blob copied into fixed-size buffer without length check.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:48:40 -04:00
Alysa Liu
ac081deaf1 drm/amdkfd: fix UAF race in destroy_queue_cpsch
wait_on_destroy_queue() drops locks to wait for queue resume, allowing
a concurrent destroy to free the queue. Use is_being_destroyed flag to
serialize destruction.

Reviewed-by: Amir Shetaia <Amir.Shetaia@amd.com>
Signed-off-by: Alysa Liu <Alysa.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:48:33 -04:00
Mario Limonciello
fbace613a5 drm/amd: Fix amdgpu_device_find_parent()
commit eb53125a7a ("drm/amd: Add dedicated helper for
amdgpu_device_find_parent()") created a dedicated helper to find
the parent device outside of the dGPU but it had a logic error
that caused it to walk all the way up the topology and return
the wrong device.

Break out of the loop when the device is found.

Reviewed-by: Alexander Deucher <alexander.deucher@amd.com>
Fixes: eb53125a7a ("drm/amd: Add dedicated helper for amdgpu_device_find_parent()")
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:47:12 -04:00
Ivan Lipski
ee911514a9 drm/amd/display: Rename hdmi_frl_borrow_mode
[Why&How]
Rename enum hdmi_frl_borrow_mode to HDMI_FRL_BORROW_MODE_* since the same
enum is already defined and used by dml2.

This resolves DKMS compilation fail.

Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:47:01 -04:00
Srinivasan Shanmugam
d4c6ec729f drm/amd/display: Add missing kdoc for ALLM parameters
Add descriptions for the missing parameters for ALLMEnabled and
ALLMValue  to keep the function documentation synchronized with the
function prototype mod_build_hf_vsif_infopacket().

Fixes the below with gcc W=1:
../display/modules/info_packet/info_packet.c:507 function parameter 'ALLMEnabled' not described in 'mod_build_hf_vsif_infopacket'
../display/modules/info_packet/info_packet.c:507 function parameter 'ALLMValue' not described in 'mod_build_hf_vsif_infopacket'

Fixes: 3c2381b92c ("drm/amd/display: add support for VSIP info packet")
Cc: Roman Li <roman.li@amd.com>
Cc: Alex Hung <alex.hung@amd.com>
Cc: Tom Chung <chiahsuan.chung@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Wayne Lin <Wayne.Lin@amd.com>
Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:45:53 -04:00
Srinivasan Shanmugam
fed376e1f2 drm/amd/display: Fix kdoc parameter names for DSC padding helper
Replace incorrect kdoc parameter names with the actual function
parameter names used by
dc_update_modified_pix_clock_for_dsc_with_padding().

Fixes the below with gcc W=1:
../display/dc/core/dc_resource.c:4616 function parameter 'stream' not described in 'dc_update_modified_pix_clock_for_dsc_with_padding'
../display/dc/core/dc_resource.c:4616 function parameter 'timing' not described in 'dc_update_modified_pix_clock_for_dsc_with_padding'
../display/dc/core/dc_resource.c:4616 function parameter 'stream' not described in 'dc_update_modified_pix_clock_for_dsc_with_padding'
../display/dc/core/dc_resource.c:4616 function parameter 'timing' not described in 'dc_update_modified_pix_clock_for_dsc_with_padding'

Fixes: 547cc004c3 ("drm/amd/display: add HDMI 2.1 DSC over FRL support")
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Fangzhi Zuo <Jerry.Zuo@amd.com>
Cc: Dan Wheeler <daniel.wheeler@amd.com>
Cc: Roman Li <roman.li@amd.com>
Cc: Alex Hung <alex.hung@amd.com>
Cc: Tom Chung <chiahsuan.chung@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:45:03 -04:00
Fangzhi Zuo
c3778921bf drm/amd/display: Disable FRL and add module param to enable it
FRL links don't yet support VRR. If we enable it by default
users will see a functional regression when connected to an FRL
capable display as the driver will now default to FRL and not
allow VRR.

VRR support will come soon, so instead of making an elaborate
TMDS fallback mechanism simply default FRL to disabled, but
provide a dcfeaturemask of 0x400 to enable it if anyone wants
to already try it out.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:45:01 -04:00
Harry Wentland
547cc004c3 drm/amd/display: add HDMI 2.1 DSC over FRL support
Add all the bits to enable DSC over FRL.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:59 -04:00
Fangzhi Zuo
7e5760f084 drm/amd/display: add HDMI 2.1 Compliance Support
Add force yuv format from igt for compliance test.

Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:56 -04:00
Harry Wentland
5c9b8b27a8 drm/amd/display: Tie FRL support into amdgpu_dm
Tie FRL support into amdgpu_dm, including the FRL status
polling workqueue.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:54 -04:00
Harry Wentland
952df08d5b drm/amd/display: Update HDCP and info_packet modules for FRL
The HDCP module has a minor update for FRL, and info_packet is
updated for ALLM.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:49 -04:00
Harry Wentland
fdaf63d9a8 drm/amd/display: Add support for FRL to DC core
Here we add support for reading BIOS caps and tie FRL bits
into the rest of DC core.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:46 -04:00
Harry Wentland
cbb8e2044b drm/amd/display: Add DC link support for FRL
Start bringing in the protocol layer for FRL in DC link.
This includes FRL training, timing validation, and other
protocol bits.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:44 -04:00
Harry Wentland
70ed4679c5 drm/amd/display: Add DC resource support for FRL
Add support for FRL in DC resources. This is mostly the register
macros, encoder creation, and HW capabilities.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:41 -04:00
Harry Wentland
6cb4931579 drm/amd/display: Tie FRL programming together in HWSS
This patch adds HW Sequencer support for FRL programming, which
ties the HW programming for the different blocks together for
FRL.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:37 -04:00
Harry Wentland
76a2db58e9 drm/amd/display: Add FRL support to clk_mgr, dsc, hdcp
This adds a few, relatively minor, changes for FRL to
clk_mgr, DSC, and HDCP blocks.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:35 -04:00
Harry Wentland
d36771a034 drm/amd/display: Add DCCG DIO, HPO, OPP, and OPTC support for FRL
This adds support to HW block programming for the core blocks
for HDMI FRL:
- DIO
- HPO
- OPP
- OPTC

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:31 -04:00
Harry Wentland
8812fae129 drm/amd/display: add HDMI 2.1 FRL base support to DML 2.0
Add HDMI FRL bits to DML 2.0

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:28 -04:00
Harry Wentland
a7c7b927c8 drm/amd/display: Add DML changes to support HDMI FRL
This adds DML support for HDMI FRL.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:26 -04:00
Harry Wentland
08d4acb07f drm/amd/display: Add HDMI FRL definitions to includes
This patch adds all relevant includes in DC that are
used by the HDMI FRL implementation in DC.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:21 -04:00
Taimur Hassan
8cd9c5b1cc drm/amd/display: Promote DC to 3.2.384
This version brings along the following updates:

 - Enable DCN 4.2.1:
   * Add register header files for DCN42B
   * Add DCN42B DC resource files
   * Add DCN42B DMUB support
   * Add DCN42B code to DC and dcn42b_soc_bb to DML2
   * Add DCN42 PMO init_for_pstate_support
   * Enable DCN42 PMO policy and pstate pmo
   * Enable DCN 4.2.1 in amdgpu_dm
   * Enable DM for DCN 4.2.1
 - Add no_native_i2c codepath
 - Add amdgpu_dm KUnit tests for:
   * amdgpu_dm_psr_set_event
   * dm_ism_dispatch_next_event and additional ISM functions
   * amdgpu_dm_colorop
   * color LUT functions and transfer function helpers
 - Enable gcov coverage for amdgpu_dm KUnit builds
 - Extract dm_ism_dispatch_next_event and transfer function helpers
 - Refactor amdgpu_dm_initialize_default_pipeline
 - Clean up PSR helper functions
 - Fix gamma 2.2 colorop TF direction in tests
 - Handle aux_inst for connectors without DDC pin
 - Fix DP_PIXEL_FORMAT fields & update clk_src for DCN4x
 - Avoid DPMS-on for phantom stream
 - Change default driver setting for "Force ODM2:1 for eDP" policy
 - Add DC_VALIDATE_MODE_AND_PROGRAMMING condition check for force odm2:1
 - Check for sharpening case when calculating max vtaps for scaler
 - Add DRAM table fields to clk_mgr_internal
 - Enable frame skipping in 0x37B
 - Bound VBIOS record-chain walk loops
 - Clamp HDMI HDCP2 rx_id_list read to buffer size
 - Clamp VBIOS HDMI retimer register count to array size
 - Reject gpio_bitshift >= 32 in bios_parser_get_gpio_pin_info()
 - Use krealloc_array() in dal_vector_reserve()
 - Fix NULL deref and buffer over-read in SDP debugfs
 - Fix out-of-bounds read in dp_get_eq_aux_rd_interval()
 - FW Release 0.1.61.0

Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:17 -04:00
Taimur Hassan
e81a4c508e ddrm/amd/display: [FW Promotion] Release 0.1.61.0
[Why & How]
Update DMUB related command structure.

Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:15 -04:00
Matthew Stewart
c2630fdd65 drm/amd/display: Enable DM for DCN 4.2.1
[Why & How]
Add DM IP block to amdgpu_discovery

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:12 -04:00
Matthew Stewart
14b7d1291d drm/amd/display: Enable DCN 4.2.1 in amdgpu_dm
[Why & How]
Add checks for IP version 4.2.1.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:09 -04:00
Matthew Stewart
827d94e613 drm/amd/display: Add DCN42B DMUB support
[Why & How]
Add DMUB support for DCN42B

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:05 -04:00
Matthew Stewart
0a5e0416e1 drm/amd/display: Add DCN42B code to DC
[Why & How]
Add DCN42B code to DC

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:44:02 -04:00
Matthew Stewart
eb778d928b drm/amd/display: Add dcn42b_soc_bb to DML2
[Why & How]
Add bounding box for dcn42b

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:43:57 -04:00
Matthew Stewart
a3d3758b2e drm/amd/display: Add DCN42B DC resource files
[Why & How]
Add DC resource files for DCN42B.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:43:52 -04:00
Matthew Stewart
1a1751507e drm/amd: Add register header files for DCN42B
[Why & How]
Add register headers for:

- clk 15.0.5
- dcn 4.2.1
- dpcs 4.0.1
- nbio 7.15.5

v2: add in missing license (Alex)

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:43:48 -04:00
Gabe Teeger
7d44737067 drm/amd/display: Handle aux_inst for connectors without DDC pin
[Why & How]
Must use an alternative codepath to access AUX channel when
link->no_ddc_pin is set.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Gabe Teeger <gabe.teeger@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:43:42 -04:00
Matthew Stewart
6750a2316f drm/amd/display: Add no_native_i2c codepath
[Why]
ASICs which do not have native DDC capability must use a different
codepath to access the AUX channel.

[How]
- BIOS cap NO_DDC_PIN is set to 1 for links which do not have the DDC pin.
- dp_connector_no_native_i2c in dc_config must also be set to true to
  use this codepath.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:43:29 -04:00
Alex Hung
9aef3d167a drm/amd/display: Clean up PSR helper functions
[Why & How]
Use the existing local dc variable in amdgpu_dm_set_psr_caps() instead
of redundantly dereferencing link->ctx->dc.

Simplify amdgpu_dm_psr_is_active_allowed() by replacing with early
return and inlining the intermediate stream variable.

No functional changes.

Assisted-by: Copilot:Claude-Sonnet-4.6
Reviewed-by: Ray Wu <ray.wu@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:43:23 -04:00
Alex Hung
bb3ab95ac7 drm/amd/display: Export symbols for KUnit test modules
Add missing EXPORT_IF_KUNIT() calls for amdgpu_dm_psr_set_event,
amdgpu_dm_ism_init, and amdgpu_dm_ism_fini so that the KUnit test
modules can resolve these symbols when built as modules, i.e.,
CONFIG_DRM_AMD_DC_KUNIT_TEST=m.

Fixes: 34f2814899 ("drm/amd/display: Add KUnit tests for amdgpu_dm_psr_set_event")
Fixes: a3142b13fe ("drm/amd/display: Add more KUnit tests for amdgpu_dm_ism")
Assisted-by: Copilot:Claude-Opus-4.6
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:42:01 -04:00
Alex Hung
34f2814899 drm/amd/display: Add KUnit tests for amdgpu_dm_psr_set_event
[Why & How]
Add three KUnit tests covering the early-exit validation guard in
amdgpu_dm_psr_set_event():

  - NULL stream argument returns false immediately
  - Valid stream with NULL link returns false
  - Valid stream/link with psr_feature_enabled == false returns false

Assisted-by: Copilot:Claude-Sonnet-4.6
Reviewed-by: Ray Wu <ray.wu@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:41:56 -04:00
Alex Hung
64aa07084a drm/amd/display: Add KUnit tests for dm_ism_dispatch_next_event
[Why & How]
Add 6 KUnit test cases exercising the new helper:

- hyst_wait_no_delay: HYSTERESIS_WAITING + delay_ns==0
  returns IMMEDIATE (covers null stream / no hysteresis config).
- hyst_wait_with_delay: HYSTERESIS_WAITING + delay_ns>0
  returns DM_ISM_NUM_EVENTS (timer scheduled, no immediate event).
- opt_idle_no_sso_delay: OPTIMIZED_IDLE + sso_delay_ns==0
  returns IMMEDIATE (skip SSO, transition immediately).
- opt_idle_with_sso_delay: OPTIMIZED_IDLE + sso_delay_ns>0
  returns DM_ISM_NUM_EVENTS (SSO timer scheduled).
- timer_aborted: TIMER_ABORTED always returns IMMEDIATE
  regardless of delay values.
- no_action_state: all other states return DM_ISM_NUM_EVENTS.

Assisted-by: Copilot:Claude-Sonnet-4.6
Reviewed-by: Ray Wu <ray.wu@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:41:50 -04:00
Alex Hung
f84c48048b drm/amd/display: Extract dm_ism_dispatch_next_event
[Why & How]
Separate the "should we emit IMMEDIATE?" decision into a pure,
side-effect-free helper so it can be tested in isolation without a
full DRM context.

- dm_ism_dispatch_next_event(current_state, delay_ns, sso_delay_ns)
  returns DM_ISM_EVENT_IMMEDIATE when the state requires an immediate
  follow-up (HYSTERESIS_WAITING with zero delay, OPTIMIZED_IDLE with
  zero SSO delay, or TIMER_ABORTED), and DM_ISM_NUM_EVENTS otherwise.

- Removes the passthrough event parameter that was always
  DM_ISM_NUM_EVENTS at the call site, making the sentinel explicit.

- Drops the now-unused event parameter from dm_ism_dispatch_power_state.

Assisted-by: Copilot:Claude-Sonnet-4.6
Reviewed-by: Ray Wu <ray.wu@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:41:44 -04:00
Alex Hung
a3142b13fe drm/amd/display: Add more KUnit tests for amdgpu_dm_ism
[Why & How]
Add 8 more KUnit tests:

- dm_ism_get_idle_allow_delay: add a case where filter_entry_count
  exceeds filter_history_size, exercising the max() branch in the
  history_size calculation.
- amdgpu_dm_ism_init: verify all fields are initialised to
  expected values after construction.
- amdgpu_dm_ism_fini: smoke-test cancellation of never-scheduled
  delayed work items paired with a preceding init.
- dm_ism_set_last_idle_ts: verify last_idle_timestamp_ns is
  updated to at least the value captured before the call.
- dm_ism_insert_record: verify index increment and duration
  calculation; verify out-of-bounds index wraps to slot 0.
- dm_ism_trigger_event: verify current_state and previous_state
  are updated on a valid transition and left unchanged on an
  invalid one.

Assisted-by: Copilot:Claude-Sonnet-4.6
Reviewed-by: Ray Wu <ray.wu@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:41:38 -04:00
Alex Hung
2da6b0b28f drm/amd/display: Add KUnit tests for amdgpu_dm_colorop
[Why & How]
Add a KUnit pipeline test for amdgpu_dm_build_default_pipeline().

The pipeline test uses a mock drm_device (via DRM KUnit helpers),
calls amdgpu_dm_build_default_pipeline() with hw_3d_lut=true, then
walks the returned colorop chain asserting the correct type sequence
(degam_tf, mult, ctm, shaper_tf, shaper_lut, 3dlut, blnd_tf,
blnd_lut), that every op carries bypass_property, and that the
chain length is exactly eight. A kunit cleanup action calls
drm_colorop_pipeline_destroy() before the device is torn down.

Assisted-by: Copilot:Claude-Sonnet-4.6
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:41:32 -04:00
Alex Hung
533de2d4d5 drm/amd/display: Fix gamma 2.2 colorop TF direction in tests
[Why & How]
Correct the gamma 2.2 TF direction used in the supported-TF bitmask
tests. Degam and blnd use DRM_COLOROP_1D_CURVE_GAMMA22 (EOTF
direction); shaper uses DRM_COLOROP_1D_CURVE_GAMMA22_INV (inverse
EOTF direction).

This aligns the tests with commit d8f9f42eff
("drm/amd/display: Fix gamma 2.2 colorop TFs").

Assisted-by: Copilot:Claude-Sonnet-4.6
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:40:37 -04:00