Commit Graph

2399 Commits

Author SHA1 Message Date
Linus Torvalds
fc91b7d77d Devicetree fixes for v7.2-rc, part 1:
- Drop unnecessary type reference from khadas,mcu "fan-supply"
 
 - Fix clocks in Renesas R-Mobile APE6 example
 
 - Add missing Unisoc SC2730 PMIC regulators schema
 
 - Fix Amlogic thermal example
 
 - kernel-doc fix for of_map_id()
 
 - Handle negative index in of_fwnode_get_reference_args()
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Merge tag 'devicetree-fixes-for-7.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree fixes from Rob Herring:

 - Drop unnecessary type reference from khadas,mcu "fan-supply"

 - Fix clocks in Renesas R-Mobile APE6 example

 - Add missing Unisoc SC2730 PMIC regulators schema

 - Fix Amlogic thermal example

 - kernel-doc fix for of_map_id()

 - Handle negative index in of_fwnode_get_reference_args()

* tag 'devicetree-fixes-for-7.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  dt-bindings: mfd: khadas,mcu: Drop type reference from "fan-supply"
  dt-bindings: clock: renesas: div6: Use ZT/ZTR trace clock in R-Mobile APE6 example
  regulator: dt-bindings: Add Unisoc SC2730 PMIC
  dt-bindings: thermal: amlogic: Correct 'reg' in the example
  dt-bindings: thermal: amlogic: Fix missing header in the example
  of: Fix RST inline emphasis warnings in of_map_id() kernel-doc
  of: property: Fix of_fwnode_get_reference_args() with negative index
2026-06-26 09:14:52 -07:00
Linus Torvalds
8c04c1292d This is all clk driver updates. Mostly new SoC support for
various Qualcomm chips and Canaan K230. Otherwise there's
 non-critical fixes and updates to clk data such as adding missing
 clks to existing drivers or marking clks critical. Nothing looks
 especially exciting.
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This is all clk driver updates. Mostly new SoC support for various
  Qualcomm chips and Canaan K230. Otherwise there's non-critical fixes
  and updates to clk data such as adding missing clks to existing
  drivers or marking clks critical. Nothing looks especially exciting"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (106 commits)
  clk: qcom: regmap-phy-mux: Rework the implementation
  clk: qcom: a53: Corrected frequency multiplier for 1152MHz
  clk: qcom: camcc-milos: Declare icc path dependency for CAMSS_TOP_GDSC
  clk: qcom: gdsc: Support enabling interconnect path for power domain
  dt-bindings: clock: qcom,milos-camcc: Document interconnect path
  interconnect: Add devm_of_icc_get_by_index() as exported API for users
  clk: qcom: camcc-x1p42100: Add support for camera clock controller
  clk: qcom: camcc-x1e80100: Add support for camera QDSS debug clocks
  clk: qcom: videocc-x1p42100: Add support for video clock controller
  dt-bindings: clock: qcom: Add X1P42100 camera clock controller
  dt-bindings: clock: qcom: Add X1P42100 video clock controller
  clk: keystone: sci-clk: fix application of sizeof to pointer
  clk: keystone: don't cache clock rate
  clk: spacemit: k3: Add PCIe DBI clock
  dt-bindings: soc: spacemit: k3: Add PCIe DBI clock IDs
  clk: spacemit: k3: Fix PCIe clock register offset
  clk: spacemit: k3: Switch to pll2_d6 as parent for PCIe clock
  clk: at91: keep securam node alive while mapping it
  clk: samsung: exynos990: Fix PERIC0/1 USI clock types
  clk: renesas: r9a08g045: Drop unused pm_domain header file
  ...
2026-06-25 12:48:57 -07:00
Linus Torvalds
805185b7c7 Including fixes from netfilter and IPsec.
Current release - regressions:
 
  - net: do not acquire dev->tx_global_lock in netdev_watchdog_up()
 
  - net: ethtool: keep rtnl_lock for ops using ethtool_op_get_link()
 
  - net: fix deadlock in nested UP notifier events
 
 Current release - new code bugs:
 
  - eth: cn20k: fix subbank free list indexing for search order
 
  - eth: airoha: fix BQL underflow in shared QDMA TX ring
 
 Previous releases - regressions:
 
  - netfilter:
    - flowtable: fix offloaded ct timeout never being extended
    - nf_conncount: prevent connlimit drops for early confirmed ct
 
 Previous releases - always broken:
 
  - require CAP_NET_ADMIN in the originating netns when modifying
    cross-netns devices
 
  - report NAPI thread PID in the caller's pid namespace
 
  - mac802154: fix dirty frag in in-place crypto for IOT radios
 
  - sctp: hold socket lock when dumping endpoints in sctp_diag,
    avoid an overflow
 
  - eth: gve: fix header buffer corruption with header-split and HW-GRO
 
  - af_key: initialize alg_key_len for IPComp states, prevent OOB read
 
 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Merge tag 'net-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Pull networking fixes from Jakub Kicinski:
 "Including fixes from netfilter and IPsec.

  Current release - regressions:

   - do not acquire dev->tx_global_lock in netdev_watchdog_up()

   - ethtool: keep rtnl_lock for ops using ethtool_op_get_link()

   - fix deadlock in nested UP notifier events

  Current release - new code bugs:

   - eth:
      - cn20k: fix subbank free list indexing for search order
      - airoha: fix BQL underflow in shared QDMA TX ring

  Previous releases - regressions:

   - netfilter:
     - flowtable: fix offloaded ct timeout never being extended
     - nf_conncount: prevent connlimit drops for early confirmed ct

  Previous releases - always broken:

   - require CAP_NET_ADMIN in the originating netns when modifying
     cross-netns devices

   - report NAPI thread PID in the caller's pid namespace

   - mac802154: fix dirty frag in in-place crypto for IOT radios

   - sctp: hold socket lock when dumping endpoints in sctp_diag, avoid
     an overflow

   - eth: gve: fix header buffer corruption with header-split and HW-GRO

   - af_key: initialize alg_key_len for IPComp states, prevent OOB read"

* tag 'net-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (213 commits)
  selftests: bonding: add a test for VLAN propagation over a bonded real device
  vlan: defer real device state propagation to netdev_work
  net: add the driver-facing netdev_work scheduling API
  net: turn the rx_mode work into a generic netdev_work facility
  net: ethtool: keep rtnl_lock for ops using ethtool_op_get_link()
  rxrpc: Fix rxrpc_rotate_tx_rotate() to check there's something to rotate
  rxrpc: Fix leak of released call in recvmsg(MSG_PEEK)
  rxrpc: Fix socket notification race
  rxrpc: Fix potential infinite loop in rxrpc_recvmsg()
  rxrpc: Fix oob challenge leak in cleanup after notification failure
  rxrpc: Fix the reception of a reply packet before data transmission
  afs: Fix uncancelled rxrpc OOB message handler
  afs: Fix further netns teardown to cancel the preallocation charger
  rxrpc: Fix double unlock in rxrpc_recvmsg()
  rxrpc: Fix leak of connection from OOB challenge
  rxrpc: Fix ACKALL packet handling
  net: hns3: differentiate autoneg default values between copper and fiber
  net: hns3: fix permanent link down deadlock after reset
  net: hns3: refactor MAC autoneg and speed configuration
  net: hns3: unify copper port ksettings configuration path
  ...
2026-06-25 12:25:36 -07:00
Krzysztof Kozlowski
efd7fb21ba net: ethernet: qualcomm: ppe: Demote from supported and fix maintainer addresses
Emails to the maintainer of Qualcomm PPE Ethernet driver (Luo Jie
<quic_luoj@quicinc.com>) bounce permanently (full mailbox), because the
"quicinc.com" addresses were deprecated for public work.  All Qualcomm
contributors are aware of that and were asked to fix their addresses.

Driver is not supported - in terms of how netdev understands supported
commitment - if maintainer does not care to receive the patches for its
code, so demote it to "maintained" to reflect true status.

Fix all occurences of Luo Jie email address to preferred and working
domain.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Luo Jie <jie.luo@oss.qualcomm.com>
Link: https://patch.msgid.link/20260623073307.36483-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-25 08:46:29 -07:00
Stephen Boyd
92010229c4
Merge branches 'clk-microchip' and 'clk-qcom' into clk-next
* clk-microchip:
  clk: at91: keep securam node alive while mapping it
  clk: at91: sama7d65: add peripheral clock for I3C
  clk: microchip: mpfs-ccc: fix peripheral driver registration failures after oob fix
  clk: at91: sam9x7: Fix gmac_gclk clock definition
  clk: at91: sam9x7: Rename macb0_clk to gmac_clk
  clk: at91: sam9x7: Remove gmac peripheral clock with ID 67
  clk: microchip: rename clk-core to clk-pic32

* clk-qcom: (32 commits)
  clk: qcom: regmap-phy-mux: Rework the implementation
  clk: qcom: a53: Corrected frequency multiplier for 1152MHz
  clk: qcom: camcc-milos: Declare icc path dependency for CAMSS_TOP_GDSC
  clk: qcom: gdsc: Support enabling interconnect path for power domain
  dt-bindings: clock: qcom,milos-camcc: Document interconnect path
  interconnect: Add devm_of_icc_get_by_index() as exported API for users
  clk: qcom: camcc-x1p42100: Add support for camera clock controller
  clk: qcom: camcc-x1e80100: Add support for camera QDSS debug clocks
  clk: qcom: videocc-x1p42100: Add support for video clock controller
  dt-bindings: clock: qcom: Add X1P42100 camera clock controller
  dt-bindings: clock: qcom: Add X1P42100 video clock controller
  clk: qcom: nord: negcc: add support for the USB2 PHY reset
  dt-bindings: clock: qcom: add the definition for the USB2 PHY reset
  clk: qcom: clk-rpmh: Make all VRMs optional
  clk: qcom: Add support for global clock controller on Hawi
  clk: qcom: clk-alpha-pll: Add support for Taycan EHA_T PLL
  clk: qcom: Add Hawi TCSR clock controller driver
  clk: qcom: rpmh: Add support for Hawi RPMH clocks
  dt-bindings: clock: qcom: Add Hawi global clock controller
  dt-bindings: clock: qcom: Add Hawi TCSR clock controller
  ...
2026-06-25 07:55:47 -07:00
Stephen Boyd
e08f2083dd
Merge branches 'clk-renesas', 'clk-socfpga', 'clk-amlogic' and 'clk-canaan' into clk-next
* clk-renesas: (36 commits)
  clk: renesas: r9a08g045: Drop unused pm_domain header file
  clk: renesas: r8a779g0: Add DSC clock
  clk: renesas: rzg2l: Rename iterator in for_each_mod_clock() to avoid shadowing
  clk: renesas: r9a08g045: Drop unused DEF_G3S_MUX macro
  clk: renesas: rzg2l: Rename RZG3L-prefixed PLL macros to CPG-prefixed ones
  clk: renesas: rzg3s/rzg3l: Simplify PLL configuration macro
  clk: renesas: rzg2l: Simplify SAM PLL configuration macro
  clk: renesas: r8a73a4: Add ZT/ZTR trace clocks
  dt-bindings: clock: renesas,cpg-clocks: Document ZT/ZTR trace clock on R-Mobile APE6
  clk: renesas: r9a08g046: Add RSPI clocks and resets
  clk: renesas: r9a08g046: Add SSIF-2 clocks and resets
  clk: renesas: r9a08g046: Add RSCI clocks and resets
  clk: renesas: cpg-mssr: Add number of clock cells check
  clk: renesas: rzg2l: Refactor rzg3l_cpg_pll_clk_endisable()
  clk: renesas: rzg2l: Consolidate DEF_MUX() and DEF_MUX_FLAGS()
  clk: renesas: r9a08g046: Add IA55_PCLK to critical module clocks
  clk: renesas: r9a09g047: Add support for LCDC{0,1} clocks and resets
  clk: renesas: r9a09g047: Add support for DSI clocks and resets
  clk: renesas: r9a09g047: Add support for SMUX2_DSI{0,1}_CLK
  clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1}_CSDIV clocks
  ...

* clk-socfpga:
  clk: socfpga: agilex: implement l3_main_free_clk

* clk-amlogic:
  dt-bindings: clock: amlogic: t7: Add missing mpll3 parent clock
  dt-bindings: clock: amlogic: Fix redundant hyphen in "amlogic,t7-gp1--pll" string.

* clk-canaan:
  clk: canaan: Add clock driver for Canaan K230
  dt-bindings: clock: Add Canaan K230 clock controller
2026-06-25 07:55:26 -07:00
Marek Vasut
38b1d6ed23 dt-bindings: clock: renesas: div6: Use ZT/ZTR trace clock in R-Mobile APE6 example
Since commit 2abdc3dcf9 ("dt-bindings: clock: renesas,cpg-clocks:
Document ZT/ZTR trace clock on R-Mobile APE6"), the APE6 clock node
expects two additional "clock-output-names" entries, "zt" and "ztr".
Update the example accordingly.

Fixes: 2abdc3dcf9 ("dt-bindings: clock: renesas,cpg-clocks: Document ZT/ZTR trace clock on R-Mobile APE6")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260523192622.56605-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-24 08:09:43 -05:00
Krzysztof Kozlowski
91ee0f80cf Renesas DTS updates for v7.2 (take two)
- Add timer (MTU3) and xSPI FLASH support for the RZ/T2H and RZ/N2H
     SoCs and their EVK boards,
   - Add PCIe support for the RZ/V2N SoC and the RZ/V2N EVK board,
   - Add support for the R-Car M3Le SoC and the Geist development board,
   - Specify ethernet PHY reset timings on various R-Car boards,
   - Add (more) serial, I2C, DMA, and sound support for the RZ/G3L SoC,
   - Add PSCI, Multifunctional Interface (MFIS), and SCMI support for the
     R-Car X5H SoC and Ironhide development board,
   - Add serial DMA support for the RZ/G2L SoC,
   - Add keyboard, I2C, Versa clock, and audio support for the RZ/G3L
     SMARC SoM and EVK boards,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-dts-for-v7.2-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v7.2 (take two)

  - Add timer (MTU3) and xSPI FLASH support for the RZ/T2H and RZ/N2H
    SoCs and their EVK boards,
  - Add PCIe support for the RZ/V2N SoC and the RZ/V2N EVK board,
  - Add support for the R-Car M3Le SoC and the Geist development board,
  - Specify ethernet PHY reset timings on various R-Car boards,
  - Add (more) serial, I2C, DMA, and sound support for the RZ/G3L SoC,
  - Add PSCI, Multifunctional Interface (MFIS), and SCMI support for the
    R-Car X5H SoC and Ironhide development board,
  - Add serial DMA support for the RZ/G2L SoC,
  - Add keyboard, I2C, Versa clock, and audio support for the RZ/G3L
    SMARC SoM and EVK boards,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v7.2-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (56 commits)
  arm64: dts: renesas: r9a08g046l48-smarc: Enable audio
  arm64: dts: renesas: rzg3l-smarc-som: Enable Versa clock generator
  arm64: dts: renesas: r9a08g046l48-smarc: Enable I2C{2,3} devices
  arm64: dts: renesas: r9a08g046l48-smarc: Add gpio keys
  arm64: dts: renesas: rzt2h-n2h-evk: Enable xSPI nodes
  arm64: dts: renesas: r9a09g087: Add xSPI nodes
  arm64: dts: renesas: r9a09g077: Add xSPI nodes
  arm64: dts: renesas: rzg3e-smarc-som: Sort GMAC pinmux entries
  arm64: dts: renesas: r8a779md: Add support for R-Car M3Le R8A779MD Geist
  arm64: dts: renesas: r9a07g044: Add DMA properties to serial nodes
  arm64: dts: renesas: r9a07g054: Add max-frequency to SDHI nodes
  arm64: dts: renesas: r9a07g044: Add max-frequency to SDHI nodes
  arm64: dts: renesas: r9a07g043: Add max-frequency to SDHI nodes
  arm64: dts: renesas: r9a08g046: Add rsci{0..3} device nodes
  arm64: dts: renesas: ironhide: Enable to use SCMI
  arm64: dts: renesas: r8a78000: Add MFIS, MFIS-SCP, and transport nodes
  arm64: dts: renesas: ironhide: Describe all reserved memory
  arm64: dts: renesas: rzt2h-n2h-evk: Configure eMMC/SDHI pins
  arm64: dts: renesas: r8a78000: Fix GIC-720AE View 1 Redistributor description
  arm64: dts: renesas: r8a78000: Add PSCI node
  ...

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-06-09 12:55:38 +02:00
Luca Weiss
7e622e74d2 dt-bindings: clock: qcom,milos-camcc: Document interconnect path
Document an interconnect path for camcc which needs to be enabled so
that the CAMSS_TOP_GDSC power domain can turn on successfully.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260501-milos-camcc-icc-v2-2-bb83c1256cc3@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-06-06 19:51:15 -05:00
Jagadeesh Kona
97a5e120be dt-bindings: clock: qcom: Add X1P42100 camera clock controller
Add X1P42100 camera clock controller support and clock bindings
for camera QDSS debug clocks which are applicable for both X1E80100
and X1P42100 platforms.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260507-purwa-videocc-camcc-v5-2-fc3af4130282@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-06-06 19:50:15 -05:00
Jagadeesh Kona
9ae38c6919 dt-bindings: clock: qcom: Add X1P42100 video clock controller
Add device tree bindings for the video clock controller on Qualcomm
X1P42100 (Purwa) SoC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260507-purwa-videocc-camcc-v5-1-fc3af4130282@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-06-06 19:50:15 -05:00
Linus Walleij
6a469016b8 Qualcomm Arm64 DeviceTree updates for v7.2
Introduce the Qualcomm IPQ9650 router/gateway platform and the RDP488
 board. Add support for the Motorola Edge 30 and the Nothing Phone.
 
 Describe the IPA block on the Agatti platform and missing OPP-levels for
 the video encoder/decoder.
 
 For Eliza, describe the QUP Serial Engines, GPI DMA, SDHCI, LLCC, IMEM,
 QCE crypto, ADSP remoteproc and USB nodes. Enable DSI panel,
 DisplayPort, USB, and ADSP support on the Eliza MTP.
 
 On Glymur enable ADSP and CDSP remoteprocs, FastRPC, crypto hardware,
 CPUfreq cooling devices, and coresight nodes. Enable the remoteprocs and
 the LID sensor on the Glymur CRD.
 
 Describe the CAN-FD controller found on the Hamoa EVK. Correct the
 DisplayPort controller OPP tables.
 
 Describe the watchdog on IPQ5210 and IPQ9650.
 
 Describe USB controller and PHYs for the Kaanapali platform and enable
 basic USB support on the MTP and QRD devices.
 
 Enable the second display subsystem on Lemans and use this to enable
 additional DisplayPort outputs on the Lemans Ride board, and IFP
 mezzanine for the EVK. Also enable the GPIO expander on the Lemans EVK
 to get the CAN signals out.
 
 Add crypto hardware and qfprom nodes on Milos. Reduce the remotefs
 shared memory size to avoid sanity checks in the modem firmware
 rejecting the region.
 Enable the vibrator on FairPhone FP6.
 
 Add GPSDP FastRPC support on Monaco, and describe the Bluetooth
 controller on the Arduino VENTUNO Q board.
 
 Introduce an EL2 overlay for the Purwa IoT EVK.
 
 Enable CAN bus controller on QCS6490 RB3gen2 and add a remotefs node.
 
 Enable FastRPC on the SC8280XP ADSP.
 
 Correct SDM630 and SDM660 ADSP FastRPC channel ids. Also add the ADSP
 memory region on SDM630.
 
 On SDM845 devices, enable NFC on Google Pixel 3, OnePlus 6, OnePlus 6T,
 and SHIFT SHIFT6mq. Enable camera flash on LG devices. Rework the
 framebuffer description on Samsung, SHIFT and Xiaomi devices. Enable
 camera flash on LG devices. Fix Bluetooth and WiFi on LG and Xiaomi
 devices.
 
 Enable MDSS and the display panel on Xiaomi Mi A3.
 
 Scale L3 and DDR clock votes based on CPUfreq selection.
 
 Enable camera clock controller, cpufreq cooling devices, and correct the
 DSI1 reference clock on SM8750.
 
 On the Talos platform, describe the QSPI support, GPR and audio
 services, and enable sound on the EVK target. Enable QSPI and describe
 the SPINOR on this bus, on the QCS615 Ride.
 
 Describe power-domain and iface clock for the Inline Crypto Engine (ICE)
 across various platforms.
 
 Fix the Bluetooth RFA supply name across a variety of devices.
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Merge tag 'qcom-arm64-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm Arm64 DeviceTree updates for v7.2

Introduce the Qualcomm IPQ9650 router/gateway platform and the RDP488
board. Add support for the Motorola Edge 30 and the Nothing Phone.

Describe the IPA block on the Agatti platform and missing OPP-levels for
the video encoder/decoder.

For Eliza, describe the QUP Serial Engines, GPI DMA, SDHCI, LLCC, IMEM,
QCE crypto, ADSP remoteproc and USB nodes. Enable DSI panel,
DisplayPort, USB, and ADSP support on the Eliza MTP.

On Glymur enable ADSP and CDSP remoteprocs, FastRPC, crypto hardware,
CPUfreq cooling devices, and coresight nodes. Enable the remoteprocs and
the LID sensor on the Glymur CRD.

Describe the CAN-FD controller found on the Hamoa EVK. Correct the
DisplayPort controller OPP tables.

Describe the watchdog on IPQ5210 and IPQ9650.

Describe USB controller and PHYs for the Kaanapali platform and enable
basic USB support on the MTP and QRD devices.

Enable the second display subsystem on Lemans and use this to enable
additional DisplayPort outputs on the Lemans Ride board, and IFP
mezzanine for the EVK. Also enable the GPIO expander on the Lemans EVK
to get the CAN signals out.

Add crypto hardware and qfprom nodes on Milos. Reduce the remotefs
shared memory size to avoid sanity checks in the modem firmware
rejecting the region.
Enable the vibrator on FairPhone FP6.

Add GPSDP FastRPC support on Monaco, and describe the Bluetooth
controller on the Arduino VENTUNO Q board.

Introduce an EL2 overlay for the Purwa IoT EVK.

Enable CAN bus controller on QCS6490 RB3gen2 and add a remotefs node.

Enable FastRPC on the SC8280XP ADSP.

Correct SDM630 and SDM660 ADSP FastRPC channel ids. Also add the ADSP
memory region on SDM630.

On SDM845 devices, enable NFC on Google Pixel 3, OnePlus 6, OnePlus 6T,
and SHIFT SHIFT6mq. Enable camera flash on LG devices. Rework the
framebuffer description on Samsung, SHIFT and Xiaomi devices. Enable
camera flash on LG devices. Fix Bluetooth and WiFi on LG and Xiaomi
devices.

Enable MDSS and the display panel on Xiaomi Mi A3.

Scale L3 and DDR clock votes based on CPUfreq selection.

Enable camera clock controller, cpufreq cooling devices, and correct the
DSI1 reference clock on SM8750.

On the Talos platform, describe the QSPI support, GPR and audio
services, and enable sound on the EVK target. Enable QSPI and describe
the SPINOR on this bus, on the QCS615 Ride.

Describe power-domain and iface clock for the Inline Crypto Engine (ICE)
across various platforms.

Fix the Bluetooth RFA supply name across a variety of devices.

* tag 'qcom-arm64-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (131 commits)
  arm64: dts: qcom: add support for pixel 3a xl with the tianma panel
  arm64: dts: qcom: sdm670-google: add common device tree include
  arm64: dts: qcom: hamoa-iot-evk: add MCP2518FD CAN on spi18
  arm64: dts: qcom: sm8750: allow mode-switch events to reach the QMP Combo PHY
  arm64: dts: qcom: sc8280xp: drop unused polling-delay-passive properties
  arm64: dts: qcom: ipq5210: add watchdog node
  arm64: dts: qcom: sdm845-xiaomi-beryllium: Correct IPA FW path
  arm64: dts: qcom: monaco-arduino-monza: Add Bluetooth UART node
  arm64: dts: qcom: glymur: Add qfprom efuse node
  arm64: dts: qcom: milos: Add qfprom efuse node
  arm64: dts: qcom: glymur: add coresight nodes
  arm64: dts: qcom: qcs6490-rb3gen2: add rmtfs node
  arm64: dts: qcom: lemans-evk: Enable CAN RX via I2C GPIO expander
  arm64: dts: qcom: glymur: Fix wrong interrupt number for i2c19
  arm64: dts: qcom: Drop unused remoteproc_adsp_glink label
  arm64: dts: qcom: lemans: Add eDP ref clock for eDP PHYs
  arm64: dts: qcom: sm8750: Add power-domain and iface clk for ice node
  arm64: dts: qcom: sm8650: Add power-domain and iface clk for ice node
  arm64: dts: qcom: sm8550: Add power-domain and iface clk for ice node
  arm64: dts: qcom: sm8450: Add power-domain and iface clk for ice node
  ...

Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-06-02 10:53:32 +02:00
Marek Vasut
e8a97edd67 dt-bindings: clock: cirrus,cs2000-cp: Document CS2500
Document backward compatibility support for the CS2500 chip, which is a
drop-in replacement for the CS2000 chip.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260504144534.43745-4-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-31 10:40:42 +02:00
Xukai Wang
44730eac17 dt-bindings: clock: Add Canaan K230 clock controller
This patch adds the Device Tree binding for the clock controller
on Canaan k230. The binding defines the clocks and the required
properties to configure them correctly.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xukai Wang <kingxukai@zohomail.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2026-05-21 10:55:12 +01:00
Marek Vasut
2abdc3dcf9 dt-bindings: clock: renesas,cpg-clocks: Document ZT/ZTR trace clock on R-Mobile APE6
Document the ZT trace bus and ZTR trace clocks on R-Mobile APE6.  These
clocks supply the coresight tracing modules, PTM, TPIU, ETB and
replicator.  Without these clocks, coresight tracing can not be
operated.  While this does change the ABI, it does so by extending the
existing clock-output-names, therefore if old software is used with new
DT, the coresight tracing parts will likely fail to probe, otherwise if
new software is used with an old DT, there is no impact.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260502185557.93061-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-15 11:26:26 +02:00
Vivek Aknurwar
d6cd9d5692 dt-bindings: clock: qcom: Add Hawi global clock controller
Add device tree bindings for the global clock controller on the
Qualcomm Hawi SoC.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Mike Tipton <mike.tipton@oss.qualcomm.com>
Signed-off-by: Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260506-clk-hawi-v3-3-530b538679f1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-13 11:52:46 -05:00
Vivek Aknurwar
eb340b092d dt-bindings: clock: qcom: Add Hawi TCSR clock controller
Add bindings documentation for TCSR clock controller on the
Qualcomm Hawi SoC.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Mike Tipton <mike.tipton@oss.qualcomm.com>
Signed-off-by: Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260506-clk-hawi-v3-2-530b538679f1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-13 11:52:46 -05:00
Vivek Aknurwar
bc98435652 dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for Hawi
Update documentation for the RPMH clock controller on the
Qualcomm Hawi SoC.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Mike Tipton <mike.tipton@oss.qualcomm.com>
Signed-off-by: Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260506-clk-hawi-v3-1-530b538679f1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-13 11:52:46 -05:00
Biswapriyo Nath
dbabf6a32f dt-bindings: clock: qcom,sm6125-dispcc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding. This
also adds the '#reset-cells' property which is permitted for the
SM6125 SoC clock controllers, but not listed as a valid property.

Fixes: bb4d28e377 ("arm64: dts: qcom: sm6125: Add missing MDSS core reset")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202603150629.GYoouFwZ-lkp@intel.com/
Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260330-ginkgo-add-usb-ir-vib-v3-2-c4b778b0d7f8@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-12 15:45:09 -05:00
Bjorn Andersson
0e5f38b892 Merge branch '20260106-qcom_ipq5332_cmnpll-v2-2-f9f7e4efbd79@oss.qualcomm.com' into clk-for-7.2
Merge the introduction of qcom,ipq5332-cmn-pll DeviceTree binding
through a topic branch, to make it available to DeviceTree source tree
as well.
2026-05-12 15:31:33 -05:00
Luo Jie
35e3509b63 dt-bindings: clock: qcom: Add CMN PLL support for IPQ5332 SoC
Add device tree bindings for the CMN PLL block in IPQ5332 SoC, which shares
similarities with IPQ9574 but has different output clock frequencies.

Add a new header file to export CMN PLL output clock specifiers for IPQ5332
SoC.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Luo Jie <jie.luo@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260106-qcom_ipq5332_cmnpll-v2-2-f9f7e4efbd79@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-12 15:31:20 -05:00
Krzysztof Kozlowski
3357509593 dt-bindings: clock: qcom,kaanapali-gxclkctl: Correctly use additionalProperties
The binding does not reference any other schema, thus should use
"additionalProperties: false" to disallow any undocumented properties.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260404105436.138110-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-12 14:58:27 -05:00
Bjorn Andersson
71ec20af5c Merge branch '20260507-ipq9650_boot_to_shell-v3-1-62742b49c991@oss.qualcomm.com' into clk-for-7.2
Merge the IPQ9650 GCC DeviceTree binding, to allow constants to be made
available to DeviceTree source tree as well.
2026-05-11 18:13:32 -05:00
Kathiravan Thirumoorthy
f92b778251 dt-bindings: clock: add Qualcomm IPQ9650 GCC
Add binding for the Qualcomm IPQ9650 Global Clock Controller.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260507-ipq9650_boot_to_shell-v3-1-62742b49c991@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-11 18:13:21 -05:00
Duje Mihanović
85ad455f5f
dt-bindings: clock: marvell,pxa1908: Add #reset-cells
The APBC and APBCP controllers have reset lines exposed. Give them
a #reset-cells so that they may be used as reset controllers.

Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-04-28 19:07:48 -07:00
Jian Hu
ca89c88bcf dt-bindings: clock: amlogic: t7: Add missing mpll3 parent clock
The mpll3 clock is one parent clock of the sd_emmc and mipi_isp clocks
on the Amlogic T7 SoC, but was missing from t7-peripherals-clkc.yaml
bindings. Add the mpll3 clock source to the T7 peripherals clock
controller input clock list, so that sd_emmc and mipi_isp can use it.

For logical consistency, place the required mpll3 entry before the
optional entry.

This change breaks the ABI, but while the amlogic,t7-peripherals-clkc
bindings have been merged upstream, the corresponding DT has not been
merged yet. Thus, no real users or systems are affected.

Fixes: b4156204e0 ("dt-bindings: clock: add Amlogic T7 peripherals clock controller")
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260326092645.1053261-3-jian.hu@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2026-04-28 10:42:47 +02:00
Jian Hu
404f80bd09 dt-bindings: clock: amlogic: Fix redundant hyphen in "amlogic,t7-gp1--pll" string.
Fix redundant hyphen in "amlogic,t7-gp1--pll" string.

Fixes: 5437753728 ("dt-bindings: clock: add Amlogic T7 PLL clock controller")
Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260326092645.1053261-2-jian.hu@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2026-04-28 10:42:47 +02:00
Luca Weiss
e628f6a6c3 dt-bindings: clock: qcom: document the Milos GX clock controller
Qualcomm GX(graphics) is a clock controller which has PLLs, clocks and
Power domains (GDSC), but the requirement from the SW driver is to use
the GDSC power domain from the clock controller to recover the GPU
firmware in case of any failure/hangs. The rest of the resources of the
clock controller are being used by the firmware of GPU. This module
exposes the GDSC power domains which helps the recovery of Graphics
subsystem.

Milos can reuse the qcom,kaanapali-gxclkctl.h header due to similarity
of the hardware block, and also reuse of the Linux driver.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20260417-milos-gxclkctl-v3-1-08f5988c43a2@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-04-27 14:31:34 -05:00
Marek Vasut
c9c008754a dt-bindings: clock: renesas,cpg-clocks: Document ZT/ZTR trace clock on R-Mobile A1
Document the ZT trace bus and ZTR trace clocks on R-Mobile A1.  These
clocks supply the coresight tracing modules, PTM, TPIU, ETB and
replicator.  Without these clocks, coresight tracing can not be
operated.  While this does change the ABI, it does so by extending the
existing clock-output-names, therefore if old software is used with new
DT, the coresight tracing parts will likely fail to probe, otherwise if
new software is used with an old DT, there is no impact.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260422233744.149872-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-04-27 11:46:44 +02:00
Linus Torvalds
4ee64205ff We've finally gotten rid of the struct clk_ops::round_rate() code after months
of effort from Brian Masney. Now the only option is to use determine_rate(),
 which is good because that takes a struct argument instead of just a couple
 unsigned longs, allowing us to easily modify the way we determine and set rates
 in the clk tree.
 
 Beyond that core framework change we've got the typical pile of new SoC clk
 driver additions, fixes for clk data and/or adding missing clks because the
 consumer driver using those clks wasn't ready, etc. The usual suspects are all
 here: Qualcomm, Samsung, Mediatek, and Rockchip along with some newcomers
 making RISC-V SoCs like ESWIN's eic700 and Tenstorrent's Atlantis. The clk
 driver side of this looks pretty normal.
 
 Core:
  - Remove the round_rate() clk op (yay!)
 
 New Drivers:
  - ESWIN eic700 SoC clk support
  - Econet EN751221 SoC clock/reset support
  - Global TCSR, RPMh, and display clock controller support for
    the Qualcomm Eliza platform
  - TCSR, the multiple global, and the RPMh clock controller
    support for the Qualcomm Nord platform
  - GPU clock controller support for Qualcomm SM8750
  - Video and GPU clock controller support for Qualcomm Glymur
  - Global clock controller support for Qualcomm IPQ5210
  - Axis ARTPEC-9: Add new PLL clocks and new drivers for eight clock
    controllers on the SoC
  - ExynosAutov920: Add G3D (GPU) clock controller
  - Clock driver for the Rockchip RV1103B SoC
  - Initial support for the Renesas RZ/G3L (R9A08G046) SoC
  - Clock and reset controllers (e.g. PRCM) in the Tenstorrent Atlantis SoC
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "We've finally gotten rid of the struct clk_ops::round_rate() code
  after months of effort from Brian Masney. Now the only option is to
  use determine_rate(), which is good because that takes a struct
  argument instead of just a couple unsigned longs, allowing us to
  easily modify the way we determine and set rates in the clk tree.

  Beyond that core framework change we've got the typical pile of new
  SoC clk driver additions, fixes for clk data and/or adding missing
  clks because the consumer driver using those clks wasn't ready, etc.
  The usual suspects are all here: Qualcomm, Samsung, Mediatek, and
  Rockchip along with some newcomers making RISC-V SoCs like ESWIN's
  eic700 and Tenstorrent's Atlantis. The clk driver side of this looks
  pretty normal.

  Core:
   - Remove the round_rate() clk op (yay!)

  New Drivers:
   - ESWIN eic700 SoC clk support
   - Econet EN751221 SoC clock/reset support
   - Global TCSR, RPMh, and display clock controller support for the
     Qualcomm Eliza platform
   - TCSR, the multiple global, and the RPMh clock controller support
     for the Qualcomm Nord platform
   - GPU clock controller support for Qualcomm SM8750
   - Video and GPU clock controller support for Qualcomm Glymur
   - Global clock controller support for Qualcomm IPQ5210
   - Axis ARTPEC-9: Add new PLL clocks and new drivers for eight clock
     controllers on the SoC
   - ExynosAutov920: Add G3D (GPU) clock controller
   - Clock driver for the Rockchip RV1103B SoC
   - Initial support for the Renesas RZ/G3L (R9A08G046) SoC
   - Clock and reset controllers (e.g. PRCM) in the Tenstorrent Atlantis SoC"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (132 commits)
  clk: visconti: pll: initialize clk_init_data to zero
  clk: fsl-sai: Add MCLK generation support
  clk: fsl-sai: Extract clock setup into fsl_sai_clk_register()
  dt-bindings: clock: fsl-sai: Document clock-cells = <1> support
  clk: fsl-sai: Add i.MX8M support with 8 byte register offset
  clk: fsl-sai: Sort the headers
  dt-bindings: clock: fsl-sai: Document i.MX8M support
  clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC
  clk: qcom: rpmh: Add support for Nord rpmh clocks
  clk: qcom: Add TCSR clock driver for Nord SoC
  dt-bindings: clock: qcom: Add Nord Global Clock Controller
  dt-bindings: clock: qcom-rpmhcc: Add support for Nord SoCs
  dt-bindings: clock: qcom: Document the Nord SoC TCSR Clock Controller
  clk: qcom: gcc-x1e80100: Keep GCC USB QTB clock always ON
  clk: qcom: Constify list of critical CBCR registers
  clk: qcom: Constify qcom_cc_driver_data
  clk: qcom: videocc-glymur: Constify qcom_cc_desc
  clk: qcom: Add a driver for SM8750 GPU clocks
  dt-bindings: clock: qcom: Add SM8750 GPU clocks
  clk: qcom: ipq-cmn-pll: Add IPQ8074 SoC support
  ...
2026-04-21 08:33:26 -07:00
Linus Torvalds
31b43c079f soc: drivers for 7.1
The driver updates again are all over the place with many minor fixes
 going into platform specific code. The most notable changes are:
 
  - Support for Microchip pic64gx system controllers
  - Work on cleaning up devicetree bindings for SoC drivers, and
    converting them into the new format
  - Lots of smaller changes for Qualcomm SoC drivers, including support
    for a number of newly supported chips
  - reset controller API cleanups and a new driver for Cix Sky1
  - Reworks of the Tegra PMC and CBB drivers, along with a change
    to how individual Tegra SoCs get selected in Kconfig and
    BPMP firmware driver updates including a refresh of the ABI
    header to match the version used by firmware
  - STM32 updates to the firewall bus driver and support for
    the debug bus through OP-TEE
  - SCMI firmware driver improvements for reliability, in particular
    for dealing with broken firmware interrupts
  - Memory driver updates for Tegra, and a patch to remove the
    unused Baikal T1 driver
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Merge tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
 "The driver updates again are all over the place with many minor fixes
  going into platform specific code. The most notable changes are:

   - Support for Microchip pic64gx system controllers
   - Work on cleaning up devicetree bindings for SoC drivers, and
     converting them into the new format
   - Lots of smaller changes for Qualcomm SoC drivers, including support
     for a number of newly supported chips
   - reset controller API cleanups and a new driver for Cix Sky1
   - Reworks of the Tegra PMC and CBB drivers, along with a change to
     how individual Tegra SoCs get selected in Kconfig and BPMP firmware
     driver updates including a refresh of the ABI header to match the
     version used by firmware
   - STM32 updates to the firewall bus driver and support for the debug
     bus through OP-TEE
   - SCMI firmware driver improvements for reliability, in particular
     for dealing with broken firmware interrupts
   - Memory driver updates for Tegra, and a patch to remove the unused
     Baikal T1 driver"

* tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (193 commits)
  firmware: arm_ffa: Use the correct buffer size during RXTX_MAP
  firmware: qcom: scm: Allow QSEECOM on Lenovo IdeaCentre Mini X
  clk: spear: fix resource leak in clk_register_vco_pll()
  reset: rzv2h-usb2phy: Add support for VBUS mux controller registration
  reset: rzv2h-usb2phy: Convert to regmap API
  dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/G3E USB2PHY reset
  dt-bindings: reset: renesas,rzv2h-usb2phy: Add '#mux-state-cells' property
  soc: microchip: add mpfs gpio interrupt mux driver
  dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux
  gpio: mpfs: Add interrupt support
  soc: qcom: ubwc: add helpers to get programmable values
  soc: qcom: ubwc: add helper to get min_acc length
  firmware: qcom: scm: Register gunyah watchdog device
  soc: qcom: socinfo: Add SoC ID for SA8650P
  dt-bindings: arm: qcom,ids: Add SoC ID for SA8650P
  firmware: qcom: scm: Allow QSEECOM on Mahua CRD
  soc: qcom: wcnss: simplify allocation of req
  soc: qcom: pd-mapper: Add support for Eliza
  soc: qcom: aoss: compare against normalized cooling state
  soc: qcom: llcc: fix v1 SB syndrome register offset
  ...
2026-04-16 20:34:34 -07:00
Stephen Boyd
6b701fde9b
Merge branches 'clk-samsung', 'clk-qcom', 'clk-round', 'clk-sai' and 'clk-cleanup' into clk-next
* clk-samsung:
  clk: samsung: exynos850: Add APM-to-AP mailbox clock
  dt-bindings: clock: exynos850: Add APM_AP MAILBOX clock
  clk: samsung: Use %pe format to simplify
  clk: samsung: pll: Fix possible truncation in a9fraco recalc rate
  clk: samsung: exynosautov920: add block G3D clock support
  dt-bindings: clock: exynosautov920: add G3D clock definitions
  clk: samsung: gs101: harmonise symbol names (clock arrays)
  clk: samsung: artpec-9: Add initial clock support for ARTPEC-9 SoC
  clk: samsung: Add clock PLL support for ARTPEC-9 SoC
  dt-bindings: clock: Add ARTPEC-9 clock controller

* clk-qcom: (67 commits)
  clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC
  clk: qcom: rpmh: Add support for Nord rpmh clocks
  clk: qcom: Add TCSR clock driver for Nord SoC
  dt-bindings: clock: qcom: Add Nord Global Clock Controller
  dt-bindings: clock: qcom-rpmhcc: Add support for Nord SoCs
  dt-bindings: clock: qcom: Document the Nord SoC TCSR Clock Controller
  clk: qcom: gcc-x1e80100: Keep GCC USB QTB clock always ON
  clk: qcom: Constify list of critical CBCR registers
  clk: qcom: Constify qcom_cc_driver_data
  clk: qcom: videocc-glymur: Constify qcom_cc_desc
  clk: qcom: Add a driver for SM8750 GPU clocks
  dt-bindings: clock: qcom: Add SM8750 GPU clocks
  clk: qcom: ipq-cmn-pll: Add IPQ8074 SoC support
  dt-bindings: clock: qcom: Add CMN PLL support for IPQ8074
  clk: qcom: ipq-cmn-pll: Add IPQ6018 SoC support
  dt-bindings: clock: qcom: Add CMN PLL support for IPQ6018
  clk: qcom: gdsc: Fix error path on registration of multiple pm subdomains
  dt-bindings: clock: qcom: Add missing power-domains property
  clk: qcom: gcc-eliza: Enable FORCE_MEM_CORE_ON for UFS AXI PHY clock
  clk: qcom: dispcc-sc7180: Add missing MDSS resets
  ...

* clk-round:
  clk: divider: remove divider_round_rate() and divider_round_rate_parent()
  clk: divider: remove divider_ro_round_rate_parent()
  clk: remove round_rate() clk ops
  clk: composite: convert from round_rate() to determine_rate()
  clk: test: remove references to clk_ops.round_rate

* clk-sai:
  clk: fsl-sai: Add MCLK generation support
  clk: fsl-sai: Extract clock setup into fsl_sai_clk_register()
  dt-bindings: clock: fsl-sai: Document clock-cells = <1> support
  clk: fsl-sai: Add i.MX8M support with 8 byte register offset
  clk: fsl-sai: Sort the headers
  dt-bindings: clock: fsl-sai: Document i.MX8M support

* clk-cleanup:
  clk: visconti: pll: initialize clk_init_data to zero
  clk: xgene: Fix mapping leak in xgene_pllclk_init()
  clk: Simplify clk_is_match()
  clk: baikal-t1: Remove not-going-to-be-supported code for Baikal SoC
  clk: mvebu: armada-37xx-periph: fix __iomem casts in structure init
  clk: qoriq: avoid format string warning
2026-04-16 10:12:43 -07:00
Stephen Boyd
522a83abc3
Merge branches 'clk-tenstorrent', 'clk-rockchip', 'clk-imx' and 'clk-allwinner' into clk-next
* clk-tenstorrent:
  clk: tenstorrent: Add Atlantis clock controller driver
  reset: tenstorrent: Add reset controller for Atlantis
  dt-bindings: clk: tenstorrent: Add tenstorrent,atlantis-prcm-rcpu

* clk-rockchip:
  clk: rockchip: rk3568: Add PCIe pipe clock gates
  clk: rockchip: Add clock controller for the RV1103B
  dt-bindings: clock: rockchip: Add RV1103B CRU support

* clk-imx:
  clk: imx8mq: Correct the CSI PHY sels
  clk: vf610: Add support for the Ethernet switch clocks
  dt-bindings: clock: vf610: Add definitions for MTIP L2 switch
  dt-bindings: clock: vf610: Drop VF610_CLK_END define
  clk: vf610: Move VF610_CLK_END define to clk-vf610 driver
  clk: imx: imx8-acm: fix flags for acm clocks
  clk: imx: imx6q: Fix device node reference leak in of_assigned_ldb_sels()
  clk: imx: imx6q: Fix device node reference leak in pll6_bypassed()
  clk: imx: fracn-gppll: Add 477.4MHz support
  clk: imx: fracn-gppll: Add 333.333333 MHz support
  clk: imx: pll14xx: Use unsigned format specifier
  dt-bindings: clock: imx6q[ul]-clock: add optional clock enet[1]_ref_pad

* clk-allwinner:
  clk: sunxi-ng: sun55i-a523-r: Add missing r-spi module clock
2026-04-16 10:12:33 -07:00
Stephen Boyd
699646e684
Merge branches 'clk-fixes', 'clk-renesas', 'clk-rpi', 'clk-eswin' and 'clk-mediatek' into clk-next
- ESWIN eic700 SoC clk support
 - Econet EN751221 SoC clock/reset support

* clk-fixes:
  clk: spacemit: ccu_mix: fix inverted condition in ccu_mix_trigger_fc()
  clk: microchip: mpfs-ccc: fix out of bounds access during output registration
  clk: qcom: dispcc-sm8450: use RCG2 ops for DPTX1 AUX clock source

* clk-renesas:
  clk: renesas: Add support for RZ/G3L SoC
  dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC
  clk: renesas: rzg2l: Re-enable critical module clocks during resume
  clk: renesas: rzg2l: Add rzg2l_mod_clock_init_mstop_helper()
  clk: renesas: rzg2l: Add helper for mod clock enable/disable
  clk: renesas: r9a0{7g04[34],8g045}: Add critical reset entries
  clk: renesas: rzg2l: Add support for critical resets
  clk: renesas: r9a09g056: Remove entries for WDT{0,2,3}
  clk: renesas: r9a06g032: Enable watchdog reset sources
  clk: renesas: cpg-mssr: Use struct_size() helper
  clk: renesas: r9a09g047: Add PCIe clocks and reset
  clk: renesas: r9a09g057: Add PCIe clocks and reset
  clk: renesas: r9a09g056: Add PCIe clocks and reset
  clk: renesas: r9a09g047: Add entries for the RSPIs
  clk: renesas: r9a09g056: Add clock and reset entries for RTC
  clk: renesas: r9a09g057: Remove entries for WDT{0,2,3}
  clk: renesas: r9a09g056: Fix ordering of module clocks array
  clk: renesas: r9a09g057: Fix ordering of module clocks array

* clk-rpi:
  clk: bcm: rpi: Manage clock rate in prepare/unprepare callbacks

* clk-eswin:
  MAINTAINERS: Add entry for ESWIN EIC7700 clock driver
  clk: eswin: Add eic7700 clock driver
  clk: divider: Add devm_clk_hw_register_divider_parent_data
  dt-bindings: clock: eswin: Documentation for eic7700 SoC

* clk-mediatek:
  clk: airoha: Add econet EN751221 clock/reset support to en7523-scu
  dt-bindings: clock, reset: Add econet EN751221
2026-04-16 10:07:47 -07:00
Marek Vasut
f293f885c4
dt-bindings: clock: fsl-sai: Document clock-cells = <1> support
The driver now supports generation of both BCLK and MCLK, document
support for #clock-cells = <0> for legacy case and #clock-cells = <1>
for the new case which can differentiate between BCLK and MCLK.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Marek Vasut <marex@nabladev.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-04-11 17:32:38 -07:00
Marek Vasut
29e64a3708
dt-bindings: clock: fsl-sai: Document i.MX8M support
The i.MX8M/Mini/Nano/Plus variant of the SAI IP has control registers
shifted by +8 bytes and requires additional bus clock. Document support
for the i.MX8M variant of the IP with this register shift and additional
clock. Update the description slightly.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Marek Vasut <marex@nabladev.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-04-11 17:32:23 -07:00
Krzysztof Kozlowski
4177ec9d58 Support for the RV1103B SoC and the Onion Omega4 board using it.
While the RV1103B only got a B-extension to its name, the SoC internals
 were reworked heavily. So likely it's mainly pin compatible to the
 non-B variant.
 
 The dt-binding for the RV1103B clock driver is shared with the clock-
 driver branch going into the clock-tree.
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Merge tag 'v7.1-rockchip-dts32-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

Support for the RV1103B SoC and the Onion Omega4 board using it.
While the RV1103B only got a B-extension to its name, the SoC internals
were reworked heavily. So likely it's mainly pin compatible to the
non-B variant.

The dt-binding for the RV1103B clock driver is shared with the clock-
driver branch going into the clock-tree.

* tag 'v7.1-rockchip-dts32-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Add Onion Omega4 Evaluation Board
  dt-bindings: arm: rockchip: Add Omega4 Evaluation board
  ARM: dts: rockchip: Add support for RV1103B
  dt-bindings: soc: rockchip: grf: Add RV1103B compatibles
  dt-bindings: clock: rockchip: Add RV1103B CRU support

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-04-11 10:09:33 +02:00
Taniya Das
06498d59bb dt-bindings: clock: qcom: Add Nord Global Clock Controller
Add device tree bindings for the global clock controller on Qualcomm
Nord platform. The global clock controller on Nord SoC is divided into
multiple clock controllers (GCC,SE_GCC,NE_GCC and NW_GCC). Add each of
the bindings to define the clock controllers.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260403-nord-clks-v1-3-018af14979fd@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-04-08 20:57:01 -05:00
Taniya Das
8a10804724 dt-bindings: clock: qcom-rpmhcc: Add support for Nord SoCs
Add bindings and update documentation compatible for RPMh clock
controller on Nord SoC.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260403-nord-clks-v1-2-018af14979fd@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-04-08 20:57:01 -05:00
Taniya Das
31fcf6995e dt-bindings: clock: qcom: Document the Nord SoC TCSR Clock Controller
The Nord SoC TCSR block provides CLKREF clocks for DP, PCIe, UFS, SGMII
and USB.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
[Shawn: Use compatible qcom,nord-tcsrcc rather than qcom,nord-tcsr]
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260403-nord-clks-v1-1-018af14979fd@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-04-08 20:57:01 -05:00
Arnd Bergmann
8366b60cbe Qualcomm Arm64 DeviceTree updates for v7.1
Introduce the Eliza, Glymur, Mahua, and IPQ5210 Qualcomm SoCs.
 
 Introduce the Redmi 4A, Redmi Go, Arduino Monza (VENTUNO Q), Redmi Note
 8T, Purwa EVK, ECS Liva QCS710, additional variants of the DB820c,
 Ayaneo Pocket S2, Thundercomm AI Mini PC G1, Samsung Galaxy Core Prime
 LTE Verizon Wireless, Wiko Pulp 4G, the Purwa-variant of ASUS Vivobook
 S15, the Eliza MTP, and the Glymur and Mahua CRDs.
 
 Introduce UFS support and flatten the DWC3 node on Hamoa. Enable UFS,
 SDC, DisplayPort audio playback, and an EL2 overlay for the Hamoa IoT
 EVK. Enable DisplayPort audio on the Hamoa CRD and add HDMI support on
 the ASUS Zenbook A14. Reduce the duplication of thermal sensors across
 Purwa and Hamoa.
 
 Add the QPIC SPI NAND controller on IPQ5332 and IPQ9574. Describe and
 enable the eMMC controller on IPQ9574.
 
 Add display, audio/compute remoteprocs, QUP devices, thermal sensors,
 display, and CoreSight on the Kaanapali platform. Enable audio, compute
 display, PMIC, Bluetooth, and WiFi on the MTP. Describe PMIC, audio and
 compute remoteprocs on QRD.
 
 Add role-switching support for the tertiary USB controller on Lemans.
 Enable the tertiary USB controller and the GPIO expander on the Lemans
 EVK, and add an overlay for the IFP Mezzanine.
 
 Add UFS, camera control interface, audio GPR, and FastRPC support on
 Milos. Enable UFS, camera EEPROMs, and hall effect sensor on the
 Fairphone FP6.
 
 Add camera control interface and fix a variety of things on the Monaco
 platform, add missing FastRPC compute banks. Add eMMC support, describe
 the DisplayPort bridge and GPIO expander on the Monaco EVK. Add overlay
 for EVK camera and the IFP mezzanine.
 
 Add touchscreen to the Xiaomi Redmi 4A, 5A, and Go, and fix the board-id
 on the 4A.
 
 Add the ambient light and proximity sensor on the Asus ZenFone 2
 Laser/Selfie.
 
 On Kodiak-based boards, enable the ethernet and USB Type-A ports on the
 Rb3Gen2, correct the LT9611 routing on the RubikPi3, add Bluetooth on
 the IDP, and add front camera support on the Fairphone FP5.
 Introduce an overlay for the Rb3Gen2 Industrial Mezzanine.
 
 Describe DSI on the Monaco SoC and enable Bluetooth, WiFi and DSI/DP
 bridge on the Ride board.
 
 Describe the WiFi/BT combo chip properly on the QRB2210 RB1 and QRB4210.
 The describe the DSI/DP bringde on the Arduino UnoQ.
 
 01022af2d2 arm64: dts: qcom: sc7280-chrome-common: disable Venus
 
 Introduce DSI display support on SC8280XP.
 
 Add LLCC on SDM670 and another SPI controller on SDM630.
 
 Properly describe the WiFi/BT chip on a variety of SDM845-based
 devices. Introduce the "alert slider" on the OnePlus 6 and OnePlus 6T
 devices.
 
 Introduce the PRNG, describe the debug UART, and add the MDSS core reset
 on SM6125. Enable the debug UART and fix various issues on the Xiaomi
 Redmi Note 8. Describe the touchscreen on the Xiaomi Mi A3.
 
 Properly describe the WiFi/BT combo chip in SM8150 HDK.
 
 Improve the EAS properties on SM8550, in addition to various other
 fixes. Introduce a new overlay for the HDK display card.
 
 Introduce various smaller fixes across SM8450 and SM8650.
 
 Add display support on SM8750 and enable DSI and DisplayPort on the MTP.
 Also add tsens and thermal-zones.
 
 Add ETR devices, flatten the USB controller node, and mark USB
 controllers as wakeup-capable devices, on Talos.
 
 Properly describe the IPA IMEM slice on a variety of platforms.
 
 Drop redundant non-controllable regulator definitions from a variety of
 boards.
 
 Drop redundant VSYNC pin state definition from various platforms.
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Merge tag 'qcom-arm64-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm Arm64 DeviceTree updates for v7.1

Introduce the Eliza, Glymur, Mahua, and IPQ5210 Qualcomm SoCs.

Introduce the Redmi 4A, Redmi Go, Arduino Monza (VENTUNO Q), Redmi Note
8T, Purwa EVK, ECS Liva QCS710, additional variants of the DB820c,
Ayaneo Pocket S2, Thundercomm AI Mini PC G1, Samsung Galaxy Core Prime
LTE Verizon Wireless, Wiko Pulp 4G, the Purwa-variant of ASUS Vivobook
S15, the Eliza MTP, and the Glymur and Mahua CRDs.

Introduce UFS support and flatten the DWC3 node on Hamoa. Enable UFS,
SDC, DisplayPort audio playback, and an EL2 overlay for the Hamoa IoT
EVK. Enable DisplayPort audio on the Hamoa CRD and add HDMI support on
the ASUS Zenbook A14. Reduce the duplication of thermal sensors across
Purwa and Hamoa.

Add the QPIC SPI NAND controller on IPQ5332 and IPQ9574. Describe and
enable the eMMC controller on IPQ9574.

Add display, audio/compute remoteprocs, QUP devices, thermal sensors,
display, and CoreSight on the Kaanapali platform. Enable audio, compute
display, PMIC, Bluetooth, and WiFi on the MTP. Describe PMIC, audio and
compute remoteprocs on QRD.

Add role-switching support for the tertiary USB controller on Lemans.
Enable the tertiary USB controller and the GPIO expander on the Lemans
EVK, and add an overlay for the IFP Mezzanine.

Add UFS, camera control interface, audio GPR, and FastRPC support on
Milos. Enable UFS, camera EEPROMs, and hall effect sensor on the
Fairphone FP6.

Add camera control interface and fix a variety of things on the Monaco
platform, add missing FastRPC compute banks. Add eMMC support, describe
the DisplayPort bridge and GPIO expander on the Monaco EVK. Add overlay
for EVK camera and the IFP mezzanine.

Add touchscreen to the Xiaomi Redmi 4A, 5A, and Go, and fix the board-id
on the 4A.

Add the ambient light and proximity sensor on the Asus ZenFone 2
Laser/Selfie.

On Kodiak-based boards, enable the ethernet and USB Type-A ports on the
Rb3Gen2, correct the LT9611 routing on the RubikPi3, add Bluetooth on
the IDP, and add front camera support on the Fairphone FP5.
Introduce an overlay for the Rb3Gen2 Industrial Mezzanine.

Describe DSI on the Monaco SoC and enable Bluetooth, WiFi and DSI/DP
bridge on the Ride board.

Describe the WiFi/BT combo chip properly on the QRB2210 RB1 and QRB4210.
The describe the DSI/DP bringde on the Arduino UnoQ.

01022af2d2 arm64: dts: qcom: sc7280-chrome-common: disable Venus

Introduce DSI display support on SC8280XP.

Add LLCC on SDM670 and another SPI controller on SDM630.

Properly describe the WiFi/BT chip on a variety of SDM845-based
devices. Introduce the "alert slider" on the OnePlus 6 and OnePlus 6T
devices.

Introduce the PRNG, describe the debug UART, and add the MDSS core reset
on SM6125. Enable the debug UART and fix various issues on the Xiaomi
Redmi Note 8. Describe the touchscreen on the Xiaomi Mi A3.

Properly describe the WiFi/BT combo chip in SM8150 HDK.

Improve the EAS properties on SM8550, in addition to various other
fixes. Introduce a new overlay for the HDK display card.

Introduce various smaller fixes across SM8450 and SM8650.

Add display support on SM8750 and enable DSI and DisplayPort on the MTP.
Also add tsens and thermal-zones.

Add ETR devices, flatten the USB controller node, and mark USB
controllers as wakeup-capable devices, on Talos.

Properly describe the IPA IMEM slice on a variety of platforms.

Drop redundant non-controllable regulator definitions from a variety of
boards.

Drop redundant VSYNC pin state definition from various platforms.

* tag 'qcom-arm64-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (254 commits)
  arm64: dts: qcom: sm8250: Add missing CPU7 3.09GHz OPP
  arm64: dts: qcom: sm8550-hdk: add support for the Display Card overlay
  arm64: dts: qcom: msm8916-samsung-coreprimeltevzw: add device tree
  dt-bindings: qcom: Document samsung,coreprimeltevzw
  arm64: dts: qcom: msm8916-samsung-fortuna: Move SM5504 from rossa and refactor MUIC
  arm64: dts: qcom: sdm670: add llcc
  arm64: dts: qcom: qcm6490-fairphone-fp5: Add front camera support
  arm64: dts: qcom: qcm6490-fairphone-fp5: Sort pinctrl nodes by pins
  arm64: dts: qcom: milos-fairphone-fp6: Add camera EEPROMs on CCI busses
  arm64: dts: qcom: milos: Add CCI busses
  arm64: dts: qcom: purwa-iot-evk: Enable UFS
  arm64: dts: qcom: eliza: Add thermal sensors
  arm64: dts: qcom: sc8280xp: Add dsi nodes on SC8280XP
  arm64: dts: qcom: sdm845-oneplus: Describe Wi-Fi/BT properly
  arm64: dts: qcom: sdm845-google: Describe Wi-Fi/BT properly
  arm64: dts: qcom: drop redundant zap-shader memory-region
  arm64: dts: qcom: fix remaining gpu_zap_shader labels
  arm64: dts: qcom: msm8996: fix indentation in sdhc2 node
  arm64: dts: qcom: monaco-evk: enable UART6 for robot expansion board
  arm64: dts: qcom: lemans-evk: enable UART0 for robot expansion board
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-04-03 00:08:34 +02:00
Arnd Bergmann
cce3c4db86 Renesas DTS updates for v7.1 (take two)
- Add DT overlay support for the MayQueen PixPaper display on the
     Yuridenki-Shokai Kakip board,
   - Add Ethernet PHY interrupt support for the RZ/T2H and RZ/N2H EVK
     boards,
   - Add SPI and PCIe support for the RZ/G3E SoC and the RZ/G3E SMARC EVK
     board,
   - Add DT overlay support for the WaveShare 13.3" 1920x1080 DSI
     Capacitive Touch Display and the Olimex MIPI-HDMI adapter on the
     Retronix Sparrow Hawk board,
   - Drop several superfluous C22 Ethernet PHY compatible strings,
   - Remove WDT nodes meant for other CPU cores on the RZ/V2N SoC,
   - Remove unavailable LVDS panel support for the Beacon ReneSoM base
     board,
   - Add initial support for the RZ/G3L (R9A08G046) SoC, and the RZ/G3L
     SMARC SoM and EVK boards,
   - Add Versa3 clock generator support for the RZ/V2H EVK development
     board,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-dts-for-v7.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v7.1 (take two)

  - Add DT overlay support for the MayQueen PixPaper display on the
    Yuridenki-Shokai Kakip board,
  - Add Ethernet PHY interrupt support for the RZ/T2H and RZ/N2H EVK
    boards,
  - Add SPI and PCIe support for the RZ/G3E SoC and the RZ/G3E SMARC EVK
    board,
  - Add DT overlay support for the WaveShare 13.3" 1920x1080 DSI
    Capacitive Touch Display and the Olimex MIPI-HDMI adapter on the
    Retronix Sparrow Hawk board,
  - Drop several superfluous C22 Ethernet PHY compatible strings,
  - Remove WDT nodes meant for other CPU cores on the RZ/V2N SoC,
  - Remove unavailable LVDS panel support for the Beacon ReneSoM base
    board,
  - Add initial support for the RZ/G3L (R9A08G046) SoC, and the RZ/G3L
    SMARC SoM and EVK boards,
  - Add Versa3 clock generator support for the RZ/V2H EVK development
    board,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v7.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (29 commits)
  ARM: dts: renesas: Drop KSZ8041 PHY C22 compatible strings
  ARM: dts: renesas: rza2mevb: Drop RTL8201F PHY C22 compatible string
  ARM: dts: renesas: r8a7742-iwg21d-q7-dbcm-ca: Drop KSZ8081 PHY C22 compatible string
  arm64: dts: renesas: Add initial device tree for RZ/G3L SMARC EVK board
  arm64: dts: renesas: renesas-smarc2: Move usb3 nodes to board DTS
  arm64: dts: renesas: Add initial support for RZ/G3L SMARC SoM
  arm64: dts: renesas: Add initial DTSI for RZ/G3L SoC
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add versa3 clock generator node
  dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC
  arm64: dts: renesas: beacon-renesom: Remove LVDS Panel
  ARM: dts: r9a06g032: Add #address-cells to the GIC node
  arm64: dts: renesas: r9a09g056: Remove wdt{0,2,3} nodes
  arm64: dts: renesas: sparrow-hawk: Add overlay for Olimex MIPI-HDMI adapter
  arm64: dts: renesas: r9a09g047e57-smarc: Enable PCIe
  arm64: dts: renesas: r9a09g047e57-smarc-som: Add PCIe reference clock
  arm64: dts: renesas: r9a09g047: Add PCIe node
  arm64: dts: renesas: Fix KSZ9131 PHY bogus txdv-skew-psec properties
  arm64: dts: renesas: Drop KSZ9131 PHY C22 compatible strings
  arm64: dts: renesas: Drop RTL8211F PHY C22 compatible strings
  arm64: dts: renesas: Drop RTL8211E PHY C22 compatible strings
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-04-01 19:20:18 +02:00
Konrad Dybcio
4aeadf8a18 dt-bindings: clock: qcom: Add SM8750 GPU clocks
The SM8750 features a "traditional" GPU_CC block, much of which is
controlled through the GMU microcontroller. GPU_CC block requires the MX
and CX rail control and thus add the corresponding power-domains and
require-opps. Additionally, there's an separate GX_CC block, where
the GX GDSC is moved.

Update the bindings to accommodate for SM8750 SoC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260305-gpucc_sm8750_v2-v5-1-78292b40b053@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-30 09:08:53 -05:00
John Crispin
7156c65030 dt-bindings: clock: qcom: Add CMN PLL support for IPQ8074
The CMN PLL block in the IPQ8074 SoC takes 48 MHz as the reference
input clock. Its output clocks are the bias_pll_cc_clk (300 MHz) and
bias_pll_nss_noc_clk (416.5 MHz) clocks used by the networking
subsystem.

Add the related compatible for IPQ8074 to the ipq9574-cmn-pll
generic schema.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260311183942.10134-4-ansuelsmth@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-30 09:02:12 -05:00
John Crispin
a57666004f dt-bindings: clock: qcom: Add CMN PLL support for IPQ6018
The CMN PLL block in the IPQ6018 SoC takes 48 MHz as the reference
input clock. Its output clocks are the bias_pll_cc_clk (300 MHz) and
bias_pll_nss_noc_clk (416.5 MHz) clocks used by the networking
subsystem.

Add the related compatible for IPQ6018 to the ipq9574-cmn-pll
generic schema.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260311183942.10134-2-ansuelsmth@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-30 09:02:11 -05:00
Abel Vesa
c412c6b13e dt-bindings: clock: qcom: Add missing power-domains property
In order for the GCC votes on the GDSCs it provides to be propagated
to CX, CX needs to be declared as power domain of the GCC.

Document the missing power-domains property to that purpose.

Fixes: 95ba6820a6 ("dt-bindings: clock: qcom: document the Milos Global Clock Controller")
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260327-dt-fix-milos-eliza-gcc-power-domains-v1-1-f14a22c73fe9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-30 08:27:32 -05:00
Thierry Reding
6413bfc1f6 dt-bindings: clock: tegra124-dfll: Convert to json-schema
Convert the Tegra124 (and later) DFLL bindings from the free-form text
format to json-schema.

Co-developed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-27 16:25:44 +01:00
Biju Das
b822fb8250 dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC
Document the device tree bindings for the Renesas RZ/G3L SoC Clock Pulse
Generator (CPG). RZ/G3L CPG is similar to RZ/G2L CPG but has 5 clocks
compared to 1 clock on other SoCs.

Also define RZ/G3L (R9A08G046) Clock Pulse Generator Core Clocks, as
listed in section 4.4.4.1 ("Block Diagram of the Clock System"), module
clock outputs, as listed in section 4.4.2 ("Clock List r1.00") and add
Reset definitions referring to registers CPG_RST_* in Section 4.4.3
("Register") of the RZ/G3L Hardware User's Manual (Rev.1.00 Oct, 2025).

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260324114329.268249-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-26 19:44:48 +01:00
Bjorn Andersson
4d059454d3 Merge branch '20260318-ipq5210_boot_to_shell-v2-1-a87e27c37070@oss.qualcomm.com' into HEAD
Merge the IPQ5210 global clock controller DeviceTree binding, in order
to gain access to the constants.
2026-03-26 09:40:57 -05:00
Caleb James DeLisle
35af99f748
dt-bindings: clock, reset: Add econet EN751221
Add clock and reset bindings for EN751221 as well as a "chip-scu" which is
an additional regmap that is used by the clock driver as well as others.
This split of the SCU across two register areas is the same as the Airoha
AN758x family.

Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-03-24 21:55:41 -07:00