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dt-bindings: clock: fsl-sai: Document clock-cells = <1> support
The driver now supports generation of both BCLK and MCLK, document support for #clock-cells = <0> for legacy case and #clock-cells = <1> for the new case which can differentiate between BCLK and MCLK. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Marek Vasut <marex@nabladev.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -10,7 +10,7 @@ maintainers:
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- Michael Walle <michael@walle.cc>
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description: |
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It is possible to use the BCLK pin of a SAI module as a generic
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It is possible to use the BCLK or MCLK pin of a SAI module as a generic
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clock output. Some SoC are very constrained in their pin multiplexer
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configuration. E.g. pins can only be changed in groups. For example, on
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the LS1028A SoC you can only enable SAIs in pairs. If you use only one SAI,
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@ -47,7 +47,7 @@ properties:
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- const: mclk1
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'#clock-cells':
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const: 0
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maximum: 1
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allOf:
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- if:
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