dt-bindings: clock: fsl-sai: Document clock-cells = <1> support

The driver now supports generation of both BCLK and MCLK, document
support for #clock-cells = <0> for legacy case and #clock-cells = <1>
for the new case which can differentiate between BCLK and MCLK.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Marek Vasut <marex@nabladev.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Marek Vasut 2026-04-09 02:29:04 +02:00 committed by Stephen Boyd
parent c206085b26
commit f293f885c4
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@ -10,7 +10,7 @@ maintainers:
- Michael Walle <michael@walle.cc>
description: |
It is possible to use the BCLK pin of a SAI module as a generic
It is possible to use the BCLK or MCLK pin of a SAI module as a generic
clock output. Some SoC are very constrained in their pin multiplexer
configuration. E.g. pins can only be changed in groups. For example, on
the LS1028A SoC you can only enable SAIs in pairs. If you use only one SAI,
@ -47,7 +47,7 @@ properties:
- const: mclk1
'#clock-cells':
const: 0
maximum: 1
allOf:
- if: