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bindings: - Cleanup xilinx.txt - Update ZynqMP firmware and clock descriptions zynq: - Drop bias-high-impedance on SD zynqmp: - Drop bias-high-impedance on SD - Correct indentation versalnet: - Enable firmware interface including clock, power and reset -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSXAixArPbWpRanWW+rB/7wTvUR9QUCanSBggAKCRCrB/7wTvUR 9TNQAQCG3ozb+32rwqFL+3p19YMJjlwu7By2dxnEj0m+7WUgZwD+KrRdMdZNmMmJ /xXDFy+4zetk7wrI59/IcD94DW1nGQI= =fwxF -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmp5+PYACgkQmmx57+YA GNmNnQ//dZTekeOe+u0siBKPQiBMr62hgp9tQvvGlIA89jPBX8qNc0xs57/iFF1S UX6N21aDuvK1s6uycfll8P4EpQfCOM1Ut/A6fsPJa04zSGfwiYbMKYrevX+HRH/X fnsaL5BUOEEwehwNXSyRnKOMiaKtxnCPdTTit/cUmbT5zDKSthtYmcRhqnjxe4Fe Ssk4Fe/13PKi+8J4jFBLLvmoSLXpv9yTHMhRVzW6oYrqHb2w/nGD/f8QrhdH2b1U ex/VOXPORPlMBXrQz7ZwM+a6lPYCoAJ++HwRjY+o5sRXN6U3ssmtckp59xshDHDg swPr6vO3M10lNnGZXGaWbzbJRYArVB1l9FJeSbaPo7B1nLx9ApT1q86ibD86Hwxj kAkVGYT9GWd6M6BXG0795WmPZqHxTPdGa0Y54y+kjDp/kfO4TYycsw33yzIytJrd lprgFeZ8cpnTvnMpIucKaMxb2tjdsc3vOU8HAKwRsheJo32f45naScByOgiwGEOE ST8naRd2RruV2pJk5dZ6PbNBWyB7RTstx4imlCCgXldA7eujr46IntzZuJEOIc0J zgUXQCLoVXsPQq758LHWQi1XmaRkinnFc0mpUyqNE/t4FZ7N/1xfDQ2tzWtM8GA3 M3pUwPZgNHiTZ+uij0yshuIvV2rJpfio8Do+rBLqh5yx9rYCpRk= =qbgE -----END PGP SIGNATURE----- Merge tag 'zynqmp-dt-for-7.3' of https://github.com/Xilinx/linux-xlnx into soc/dt arm64: Xilinx DT changes for 7.3 bindings: - Cleanup xilinx.txt - Update ZynqMP firmware and clock descriptions zynq: - Drop bias-high-impedance on SD zynqmp: - Drop bias-high-impedance on SD - Correct indentation versalnet: - Enable firmware interface including clock, power and reset * tag 'zynqmp-dt-for-7.3' of https://github.com/Xilinx/linux-xlnx: arm64: versal-net: Switch Versal NET to firmware clock interface dt-bindings: clock: versal-clk: Fix Versal NET clock validation dt-bindings: clock: Move xlnx,zynqmp-clk to its own schema dt-bindings: clock: versal-clk: Fix mio_clk index range in clock-names pattern dt-bindings: firmware: xilinx: Add missing example for ZynqMP dt-bindings: xilinx: Remove EDK/Ethernet references arm64: dts: xilinx: zynqmp-sck: Correct indentation arm: dts: xilinx: drop bias-high-impedance on SDIO CD/WP pins arm64: dts: xilinx: drop bias-high-impedance on SDIO CD/WP pins Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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|---|---|---|
| .. | ||
| avnet-ultra96-rev1.dts | ||
| Makefile | ||
| versal-net-clk.dtsi | ||
| versal-net-vn-x-b2197-01-revA.dts | ||
| versal-net.dtsi | ||
| xlnx-versal-clk.h | ||
| xlnx-versal-net-clk.h | ||
| xlnx-versal-net-power.h | ||
| xlnx-versal-net-resets.h | ||
| xlnx-versal-power.h | ||
| xlnx-versal-resets.h | ||
| xlnx-zynqmp-clk.h | ||
| zynqmp-clk-ccf.dtsi | ||
| zynqmp-sck-kd-g-revA.dtso | ||
| zynqmp-sck-kr-g-revA.dtso | ||
| zynqmp-sck-kr-g-revB.dtso | ||
| zynqmp-sck-kv-g-revA.dtso | ||
| zynqmp-sck-kv-g-revB.dtso | ||
| zynqmp-sm-k24-revA.dts | ||
| zynqmp-sm-k26-revA.dts | ||
| zynqmp-smk-k24-revA.dts | ||
| zynqmp-smk-k26-revA.dts | ||
| zynqmp-zc1232-revA.dts | ||
| zynqmp-zc1254-revA.dts | ||
| zynqmp-zc1751-xm015-dc1.dts | ||
| zynqmp-zc1751-xm016-dc2.dts | ||
| zynqmp-zc1751-xm017-dc3.dts | ||
| zynqmp-zc1751-xm018-dc4.dts | ||
| zynqmp-zc1751-xm019-dc5.dts | ||
| zynqmp-zcu100-revC.dts | ||
| zynqmp-zcu102-rev1.1.dts | ||
| zynqmp-zcu102-rev1.0.dts | ||
| zynqmp-zcu102-revA.dts | ||
| zynqmp-zcu102-revB.dts | ||
| zynqmp-zcu104-revA.dts | ||
| zynqmp-zcu104-revC.dts | ||
| zynqmp-zcu106-revA.dts | ||
| zynqmp-zcu111-revA.dts | ||
| zynqmp-zcu1275-revA.dts | ||
| zynqmp.dtsi | ||