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arm64: dts: xilinx: drop bias-high-impedance on SDIO CD/WP pins
Since commit 9c10525510 ("pinctrl: pinconf-generic: perform basic
checks on pincfg properties"), the generic pinconf parser logs an error
when a pin configuration node specifies more than one bias mode.
Several ZynqMP boards described SDIO card-detect and write-protect pins
with both bias-high-impedance and bias-pull-up, which triggers at
pinctrl probe:
generic pinconfig core: /firmware/zynqmp-firmware/pinctrl/.../conf-cd:
cannot have multiple bias configurations
On ZynqMP, bias-high-impedance enables tri-state while bias-pull-up
enables the internal pull resistor; these are mutually exclusive bias
settings and only pull-up is needed for CD/WP inputs. Drop the redundant
bias-high-impedance property and keep bias-pull-up.
Reported-by: Mikko Rapeli (Linaro) <mikko.rapeli@linaro.org>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=221586
Link: https://patch.msgid.link/e01c8e60e1d9ed68c347f1a3741f89149109d8b7.1780496388.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
parent
dc59e4fea9
commit
bc7b17594a
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@ -374,7 +374,6 @@ conf {
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conf-cd {
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groups = "sdio1_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -365,7 +365,6 @@ conf {
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conf-cd {
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groups = "sdio1_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -270,7 +270,6 @@ mux-cd {
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conf-cd {
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groups = "sdio0_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -283,7 +282,6 @@ mux-wp {
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conf-wp {
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groups = "sdio0_wp_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -310,7 +308,6 @@ mux-cd {
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conf-cd {
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groups = "sdio1_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -323,7 +320,6 @@ mux-wp {
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conf-wp {
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groups = "sdio1_wp_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -270,7 +270,6 @@ mux-cd {
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conf-cd {
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groups = "sdio0_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -283,7 +282,6 @@ mux-wp {
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conf-wp {
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groups = "sdio0_wp_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -320,7 +320,6 @@ mux-cd {
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conf-cd {
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groups = "sdio0_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -896,7 +896,6 @@ mux-cd {
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conf-cd {
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groups = "sdio1_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -909,7 +908,6 @@ mux-wp {
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conf-wp {
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groups = "sdio1_wp_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -359,7 +359,6 @@ mux-cd {
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conf-cd {
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groups = "sdio1_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -371,7 +371,6 @@ mux-cd {
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conf-cd {
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groups = "sdio1_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -895,7 +895,6 @@ mux-cd {
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conf-cd {
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groups = "sdio1_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -908,7 +907,6 @@ mux-wp {
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conf-wp {
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groups = "sdio1_wp_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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@ -750,7 +750,6 @@ mux-cd {
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conf-cd {
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groups = "sdio1_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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