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arm64: zynqmp: Set qspi tx-buswidth to 4
All ZynqMP boards are setting up tx-buswidth to 1. Due to this the framework only issues 1-1-1 write commands to the GQSPI driver. But the GQSPI controller is capable of handling 1-4-4 write commands, so updated the tx-buswidth to 4. Using all 4 lines will increase the tx data transfer rate, as now the tx data will be transferred on four lines instead on single line. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1f1b0028106d83aa06e0777e91862a07df100fa1.1684767562.git.michal.simek@amd.com
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@ -124,7 +124,7 @@ spi_flash: flash@0 { /* MT25QU512A */
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-tx-bus-width = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <40000000>; /* 40MHz */
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partition@0 {
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@ -44,7 +44,7 @@ flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <108000000>; /* Based on DC1 spec */
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};
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@ -45,7 +45,7 @@ flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
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spi-max-frequency = <108000000>; /* Based on DC1 spec */
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};
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@ -355,7 +355,7 @@ flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <108000000>; /* Based on DC1 spec */
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};
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@ -173,7 +173,7 @@ flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>; /* also DUAL configuration possible */
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spi-max-frequency = <108000000>; /* Based on DC1 spec */
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};
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@ -957,7 +957,7 @@ flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
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spi-max-frequency = <108000000>; /* Based on DC1 spec */
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};
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@ -444,7 +444,7 @@ flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <108000000>; /* Based on DC1 spec */
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};
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@ -456,7 +456,7 @@ flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <108000000>; /* Based on DC1 spec */
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};
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@ -964,7 +964,7 @@ flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
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spi-max-frequency = <108000000>; /* Based on DC1 spec */
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};
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@ -794,7 +794,7 @@ flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
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spi-max-frequency = <108000000>; /* Based on DC1 spec */
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};
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@ -47,7 +47,7 @@ &qspi {
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flash@0 {
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compatible = "m25p80", "jedec,spi-nor";
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <108000000>;
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};
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