qcom_regmap_list can get corrupted if multiple clock controllers probe
at same time. And clk_is_regmap can be invoked from clk_enable API.
Hence add spin_lock to avoid list corruption.
Change-Id: Iec5abdb2d6f1a47667e7f6d2430f6f32c0ca4829
Signed-off-by: Veera Vegivada <quic_vvegivad@quicinc.com>
Update list_register operation to read the pll offset defined in PLL
register map to avoid mismatch across various targets.
Change-Id: Iab536c49a8e621c0ebd8c5fe7a43fa7aa42671b8
Signed-off-by: Veera Vegivada <quic_vvegivad@quicinc.com>
Signed-off-by: Dipa Mantre <quic_dmantre@quicinc.com>
Trace probe callbacks are called with preemption disabled and locking
a mutex inside it is not allowed since it can potentially sleep. Hence
remove support for mutex locking in suspend trace probe callback.
The resource protected by this mutex clk_hw_debug_list is modified only
during registering and deregistering clocks which won't happen during
the suspend path, so it is safe to remove the mutex locking.
Change-Id: I525099f8bae74808c9690abb43b2dc2da9c0fc88
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
On 32 bit the PLL frequency can be beyond the range
of the `int` leads to improper assignment, so update
rate type to 'unsigned long'.
Change-Id: I50f03ea95b3d934c4936087998f832373e620e46
Signed-off-by: Madhuri Medasani <mmedasan@codeaurora.org>
If enable safe config is true and a rate scaling request comes
while RCG is in disabled state, RCG's new configuration update
would be done as part of enabling the RCG. Hence add the enable
and disable callbacks for floor ops to properly configure the RCG
in all cases.
Change-Id: I3621e0dd2cb948cb523cd85659d0de0359ba5829
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
Add list_registers callback for muxes so we can ensure they're
configured to the expected parent in debugging scenarios.
Change-Id: I85baff36e1aea88faa85a1fc470e051836919312
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
The clocks of devices with the “qcom,critical-devices” property
are marked as critical and can be enabled on default, the
parent's clocks of these child critical-devices also need
to be marked as critical.
Rather than adding child and parent devices in the dts property
"qcom,critical-devices", it's better to automatically mark
the clock of parent device as critical.
Change-Id: If7b0f53c45194dbc0cd41e13316101a9149a4dc8
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
Enable ftrace support for clocks so that clients can measure
frequency of the clock through ftraces.
Change-Id: Ie923ac538b670598bb1be009e892a68c4f1e2a38
Signed-off-by: Kalpak Kawadkar <quic_kkawadka@quicinc.com>
Clocks with extremely low rates (i.e. 10s of Hz) take much longer to
enable, disable, or change rates than our current timeouts allow.
Instead of increasing the timeouts to huge values for all clocks,
dynamically compute the required timeouts based on the configured clock
rates.
Change-Id: I122ace891c2246763f9fe6da8df2c4a4307ba42d
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Remove subsys_initcall trigger for clk_debug_init(), as root clk debugfs
directory is not ready by that time. And make sure that clk_debug_init()
is called after the clk framework's clk_debug_init().
Change-Id: Ie90b89e4156e7f5631e9e58316534bf806012853
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Add the BRANCH_HALT_INVERT flag to handle the inverted status bit check
for branch clocks. Invert branch halt would indicate the clock ON when
CLK_OFF bit is '1' and OFF when CLK_OFF bit is '0'.
Change-Id: Ic6629e8d9548629d5d4988b3ee89a092600d610e
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
If cfg-gdscr property is defined then use cfg-gdscr register
POWER_UP/DOWN_COMPLETE status for hw-ctrl gdscr on/off polling.
Change-Id: I5a217048cc3ab8106f5a7049c7bed153163a2de1
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
The Lucid PLL could require the FSM legacy mode bit to be set for the
PLL to be operational, thus add support and set the same when the flag
is set.
Change-Id: I3ed4b6c38a1769c5021f17e0115215eab615ab62
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Chetan C R <quic_cchinnad@quicinc.com>
PLLs with a narrow ALPHA can't hit all frequencies precisely and may be
under by a few hundred Hz. When this happens we currently increment
ALPHA by 1 in round_rate() to push the frequency slightly above the
requested rate.
However, when clk_set_rate() is called on a child of the PLL, then the
final ALPHA will be ALPHA+N where N depends on the number of children in
the chain. This is because clk_calc_new_rates() calls round_rate()
recursively for each parent in the chain, each time using the previous
iteration's ALPHA+1 based frequency. This results in a higher frequency
than intended. The overall frequency delta is small and generally not a
functional issue, but it's different than the HW recommendations and
also causes certain frequency validation tests to fail.
Additionally, this causes clk_propagate_rate_change() to short-circuit
before notifying all children in some cases. If clk_set_rate() on a
child results in a PLL frequency of ALPHA+N but the PLL is already
configured to this rate, then clk_calc_new_rates() will return the PLL
as the top clock, even though pll->rate == pll->new_rate. This causes
clk_propagate_rate_change() to return immediately. This happens because
clk_calc_new_rates() is recursively called for the parent whenever
best_parent_rate != parent->rate. And since ALPHA isn't incremented to
its final ALPHA+N value until the final parent iteration, then
best_parent_rate is slightly lower than parent->rate. Returning early
from clk_propagate_rate_change() can result in undervoltage, since we
vote for increased voltage in the pre_rate_change() callback.
To fix these issues, don't round up by incrementing the HW ALPHA value.
Instead, keep the PLL configured to the slightly lower frequency and
report its frequency as the rounded up version.
Change-Id: I9aa7c1269735c07ef2524b08306edb6427af3629
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Add gdsc_time trace debugfs file to log gdsc state when they
are enabled/disabled. This trace also logs time taken for each
gdsc enable/disable call.
Also swap gdscr_status enum value to align gdsc enable/disable
trace as 1/0 respectively.
Change-Id: Ic57f7a0fc44df890e6418d257fe76dafacab55e9
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
When certain GDSCs are enabled they cause their core to permanently
assert active signals to RPMh. These active signals will prevent NOCs
from powering down. So if BW votes are removed prior to disabling the
GDSC, then BCM will get stuck in the power down sequence and rpmh driver
timeouts. Prevent this by placing minimum BW votes whenever the GDSC is
enabled.
Change-Id: Iadd0bac37a6d04fd87c507fc7eee23e203891a6c
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
CBCRs with memories need an update for memory before enabling the clock.
Change-Id: I4d6856640c209471d057a91938c1d51014463550
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
There is a requirement where slimbus slave don't expect ports
to be disconnected during stream unprepare for sample rates
other than 44.1/88.2k, which is causing mute issues.
Added new slim_stream_unprepare_disconnect_port API to support
disconnect port request from clients without freeing port memory
allocated during stream prepare.
Change-Id: Idb00a1fdf15d864cb6ee82f67c0db4777434b296
Signed-off-by: Anvesh Salveru <quic_asalveru@quicinc.com>
Exit with an error from mem_buf_lend_internal() if the driver hasn't
probed.
Change-Id: Ide42166c2f850197f989a228f9139d401411a914
Signed-off-by: Chris Goldsworthy <quic_cgoldswo@quicinc.com>
IPC logging and IRQ naming depend on the name variable in the glink
data structure. Add device tree name reading code that was removed
by upstream.
Change-Id: Id1c521d94b8a3c9557273d8f8b072e7e87a1b759
Signed-off-by: Chris Lew <quic_clew@quicinc.com>
Add pr_fmt to the ns file for easier error log matching.
Change-Id: I711735ee60c1fd9fde25850b8e625bb44c04f4c4
Signed-off-by: Chris Lew <quic_clew@quicinc.com>
Ignore the ENODEV failures returned by kernel_sendmsg(). These errors
mean either the local port has closed or the remote has gone down.
Neither of these scenarios are fatal and will eventually be handled
through packets that are later queued on the control port.
Also improve the logging messages to print the error code returned by
kernel_sendmsg().
Change-Id: Ibcebd1f44a3fbc87febaa84b11e05675663da5a0
Signed-off-by: Chris Lew <quic_clew@quicinc.com>
Increase the socket recvbuf for the ns so control packets are not
dropped in heavy traffic situations. This change will not
actually set the recvbuf to INT_MAX but to the system defined rmem_max
for sockets.
Change-Id: I860cc1052080cc6e683b44bef1dd9f8fc1899f31
Signed-off-by: Jay Jayanna <jayanna@codeaurora.org>
Signed-off-by: Chris Lew <quic_clew@quicinc.com>
If worker is not processing packets on control port fast enough,
socket buffer may get full and result in drop of control packets.
Creating dedicated worker thread to process control packets.
CRs-Fixed: 2763561
Change-Id: I4585015cef2a507a9ba13014cd93f40e60f8a25a
Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org>
Signed-off-by: Chris Lew <quic_clew@quicinc.com>
Enable QCOM_SPSS and its dependency, CONFIG_RPMSG_QCOM_SMD.
Change-Id: I4f1446d82a6cd1f7dd43c46519634d70390a4005
Signed-off-by: Guru Das Srinagesh <quic_gurus@quicinc.com>
Add snapshot of the QCOM_SPSS driver from msm-5.15 commit 23fe038a2ea4
("Kconfig: Add support for kona chipset").
Change-Id: I7c419a62b14e21d45b3e8bcc2785570012a7c09a
Signed-off-by: Guru Das Srinagesh <quic_gurus@quicinc.com>
Fix pll enable output incase of when pll is not configured from boot.
Change-Id: I076ae750bad956c37d0a790b07fb9892f3149a0c
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
By enabling this flag init_boot.img will be generated if
the header version is 4.
Change-Id: I8a01d10cee8142ef900376d7e3d29f1b49e80d00
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Adding Bootconfig to kernel command line to support
the version change.
Change-Id: I24b667e494e5bbf14397f16d9ef7219634f3f17b
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
If coresight-name exists in etm/ete nodes, use coresight-name value
as device name.
Change-Id: I1297241d8ddc2b29f8745ed33ed5b2089f6b0bcb
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
Before call swiotlb_init_io_tlb_mem, should allocate memory
for areas firstly.
Change-Id: Ib121040817cbae4a44f06ae62fe4b0e0fa27c796
Signed-off-by: Peng Yang <quic_penyan@quicinc.com>
Currently this macro is defined in internal MHI header as
a TRE length mask. Moving it to external header allows MHI
client drivers to set this upper bound for the transmit
buffer size.
Change-Id: I24c7bce37cb8f103c1436201d825bec4a36eb122
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Signed-off-by: Lazarus Motha <quic_lmotha@quicinc.com>
