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clk: qcom: clk-alpha-pll: Update the list_registers ops for alpha PLL

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Update list_register operation to read the pll offset defined in PLL
register map to avoid mismatch across various targets.

Change-Id: Iab536c49a8e621c0ebd8c5fe7a43fa7aa42671b8
Signed-off-by: Veera Vegivada <quic_vvegivad@quicinc.com>
Signed-off-by: Dipa Mantre <quic_dmantre@quicinc.com>
This commit is contained in:
Veera Vegivada 2022-08-31 22:55:27 -07:00 committed by Mike Tipton
parent d0154ed359
commit 50325a326e
1 changed files with 14 additions and 9 deletions
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23
drivers/clk/qcom/clk-alpha-pll.c
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@ -1004,12 +1004,16 @@ static void clk_alpha_pll_list_registers(struct seq_file *f, struct clk_hw *hw)
int size, i, val;
static struct clk_register_data data[] = {
{"PLL_MODE", 0x0},
{"PLL_L_VAL", 0x4},
{"PLL_ALPHA_VAL", 0x8},
{"PLL_ALPHA_VAL_U", 0xC},
{"PLL_USER_CTL", 0x10},
{"PLL_CONFIG_CTL", 0x18},
{"PLL_MODE", PLL_OFF_MODE},
{"PLL_L_VAL", PLL_OFF_L_VAL},
{"PLL_ALPHA_VAL", PLL_OFF_ALPHA_VAL},
{"PLL_ALPHA_VAL_U", PLL_OFF_ALPHA_VAL_U},
{"PLL_TEST_CTL", PLL_OFF_TEST_CTL},
{"PLL_TEST_CTL_U", PLL_OFF_TEST_CTL_U},
{"PLL_USER_CTL", PLL_OFF_USER_CTL},
{"PLL_USER_CTL_U", PLL_OFF_USER_CTL_U},
{"PLL_CONFIG_CTL", PLL_OFF_CONFIG_CTL},
{"PLL_STATUS", PLL_OFF_STATUS},
};
static struct clk_register_data data1[] = {
@ -1019,12 +1023,13 @@ static void clk_alpha_pll_list_registers(struct seq_file *f, struct clk_hw *hw)
size = ARRAY_SIZE(data);
for (i = 0; i < size; i++) {
regmap_read(pll->clkr.regmap, pll->offset + data[i].offset,
&val);
regmap_read(pll->clkr.regmap, pll->offset +
pll->regs[data[i].offset], &val);
clock_debug_output(f, "%20s: 0x%.8x\n", data[i].name, val);
}
regmap_read(pll->clkr.regmap, pll->offset + data[0].offset, &val);
regmap_read(pll->clkr.regmap, pll->offset +
pll->regs[data[0].offset], &val);
if (val & PLL_FSM_ENA) {
regmap_read(pll->clkr.regmap, pll->clkr.enable_reg +