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clk: qcom: clk-regmap: Update type for rate in clk prepare

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On 32 bit the PLL frequency can be beyond the range
of the `int` leads to improper assignment, so update
rate type to 'unsigned long'.

Change-Id: I50f03ea95b3d934c4936087998f832373e620e46
Signed-off-by: Madhuri Medasani <mmedasan@codeaurora.org>
This commit is contained in:
Madhuri Medasani 2021-08-31 09:30:48 +05:30 committed by Mike Tipton
parent fb46a76de1
commit 8f5453b4c5
1 changed files with 2 additions and 2 deletions
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4
drivers/clk/qcom/clk-regmap.c
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2014, 2019-2020 The Linux Foundation. All rights reserved.
* Copyright (c) 2014, 2019-2021 The Linux Foundation. All rights reserved.
*/
#include <linux/device.h>
@ -195,7 +195,7 @@ EXPORT_SYMBOL(clk_post_change_regmap);
int clk_prepare_regmap(struct clk_hw *hw)
{
struct clk_regmap *rclk = to_clk_regmap(hw);
int rate = clk_hw_get_rate(hw);
unsigned long rate = clk_hw_get_rate(hw);
int vdd_level;
if (!rclk->vdd_data.rate_max)