linux/drivers/dpll/zl3073x
Ivan Vecera 1db73ce018 dpll: zl3073x: add PTP clock support
Add PTP clock support for the ZL3073x DPLL driver. A PTP clock device
is registered for each DPLL channel regardless of the initial channel
state, providing gettimex64, settime64, adjtime, adjfine, adjphase
and getmaxphase callbacks.

Callback availability depends on the current channel state:
- adjfine: when NCO pin is connected (returns -EOPNOTSUPP otherwise)
- adjphase: available when tracking a reference, uses TIE write
- adjtime: always available and uses
  * phase step for sub-second deltas when NCO pin is connected
  * TIE write when tracking a reference
  * plain ToD read-modify-write otherwise
- gettime/settime: always available

The adjtime callback splits multi-second adjustments into a ToD
read-modify-write for the seconds part and a sub-second mechanism
(phase step or TIE write) for the remainder. On partial failure
where seconds were already committed, success is returned to
prevent the PTP servo from retrying and applying seconds again.

All PTP callbacks are serialized by the existing per-DPLL zldpll->lock
mutex, which is also used by DPLL pin and device callbacks.

Reviewed-by: Petr Oros <poros@redhat.com>
Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Tested-by: Chris du Quesnay <Chris.duQuesnay@microchip.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
Link: https://patch.msgid.link/20260814082656.306534-4-ivecera@redhat.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-18 09:40:06 -07:00
..
chan.c dpll: zl3073x: add channel ToD, phase step and TIE operations 2026-08-18 09:40:05 -07:00
chan.h dpll: zl3073x: add channel ToD, phase step and TIE operations 2026-08-18 09:40:05 -07:00
core.c dpll: zl3073x: add channel ToD, phase step and TIE operations 2026-08-18 09:40:05 -07:00
core.h dpll: zl3073x: add channel ToD, phase step and TIE operations 2026-08-18 09:40:05 -07:00
devlink.c devlink: pass param values by pointer 2026-05-25 14:03:06 -07:00
devlink.h dpll: zl3073x: Add low-level flash functions 2025-09-15 08:08:39 -07:00
dpll.c dpll: zl3073x: add PTP clock support 2026-08-18 09:40:06 -07:00
dpll.h dpll: zl3073x: add PTP clock support 2026-08-18 09:40:06 -07:00
flash.c dpll: zl3073x: use FIELD_MODIFY() for clear-and-set patterns 2026-04-12 08:27:33 -07:00
flash.h dpll: zl3073x: Add low-level flash functions 2025-09-15 08:08:39 -07:00
fw.c Convert 'alloc_obj' family to use the new default GFP_KERNEL argument 2026-02-21 17:09:51 -08:00
fw.h dpll: zl3073x: Add firmware loading functionality 2025-09-15 08:08:39 -07:00
i2c.c dpll: zl3073x: Use named initializers for struct i2c_device_id 2026-05-20 19:01:36 -07:00
Kconfig dpll: zl3073x: add PTP clock support 2026-08-18 09:40:06 -07:00
Makefile dpll: zl3073x: introduce zl3073x_chan for DPLL channel state 2026-03-17 19:05:12 -07:00
out.c dpll: zl3073x: remove conditional return with no effect 2026-07-30 13:04:03 +02:00
out.h dpll: zl3073x: add ref sync and output clock type helpers 2026-04-12 08:27:33 -07:00
prop.c Convert 'alloc_obj' family to use the new default GFP_KERNEL argument 2026-02-21 17:09:51 -08:00
prop.h dpll: zl3073x: Read DPLL types and pin properties from system firmware 2025-07-09 19:08:53 -07:00
ref.c dpll: zl3073x: add zl3073x_ref_state_update helper 2026-03-17 19:05:12 -07:00
ref.h dpll: zl3073x: report FFO as DPLL vs input reference offset 2026-05-12 18:48:07 -07:00
regs.h dpll: zl3073x: add channel ToD, phase step and TIE operations 2026-08-18 09:40:05 -07:00
spi.c dpll: zl3073x: detect DPLL channel count from chip ID at runtime 2026-03-03 12:15:30 +01:00
synth.c dpll: zl3073x: Split ref, out, and synth logic from core 2025-11-17 20:23:37 -08:00
synth.h dpll: zl3073x: use struct_group to partition states 2026-03-17 19:05:12 -07:00