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1db73ce018
Add PTP clock support for the ZL3073x DPLL driver. A PTP clock device is registered for each DPLL channel regardless of the initial channel state, providing gettimex64, settime64, adjtime, adjfine, adjphase and getmaxphase callbacks. Callback availability depends on the current channel state: - adjfine: when NCO pin is connected (returns -EOPNOTSUPP otherwise) - adjphase: available when tracking a reference, uses TIE write - adjtime: always available and uses * phase step for sub-second deltas when NCO pin is connected * TIE write when tracking a reference * plain ToD read-modify-write otherwise - gettime/settime: always available The adjtime callback splits multi-second adjustments into a ToD read-modify-write for the seconds part and a sub-second mechanism (phase step or TIE write) for the remainder. On partial failure where seconds were already committed, success is returned to prevent the PTP servo from retrying and applying seconds again. All PTP callbacks are serialized by the existing per-DPLL zldpll->lock mutex, which is also used by DPLL pin and device callbacks. Reviewed-by: Petr Oros <poros@redhat.com> Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev> Tested-by: Chris du Quesnay <Chris.duQuesnay@microchip.com> Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20260814082656.306534-4-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
56 lines
1.6 KiB
C
56 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _ZL3073X_DPLL_H
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#define _ZL3073X_DPLL_H
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#include <linux/dpll.h>
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#include <linux/list.h>
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#include <linux/ptp_clock_kernel.h>
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#include "core.h"
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/**
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* struct zl3073x_dpll - ZL3073x DPLL sub-device structure
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* @list: this DPLL list entry
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* @dev: pointer to multi-function parent device
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* @id: DPLL index
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* @check_count: periodic check counter
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* @phase_monitor: is phase offset monitor enabled
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* @ops: DPLL device operations for this instance
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* @dpll_dev: pointer to registered DPLL device
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* @tracker: tracking object for the acquired reference
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* @lock: per-DPLL mutex serializing all operations
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* @type: DPLL type (PPS or EEC)
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* @lock_status: last saved DPLL lock status
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* @pins: list of pins
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* @ptp_info: PTP clock info
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* @ptp_clock: registered PTP clock (or NULL)
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*/
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struct zl3073x_dpll {
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struct list_head list;
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struct zl3073x_dev *dev;
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u8 id;
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u8 check_count;
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bool phase_monitor;
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struct dpll_device_ops ops;
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struct dpll_device *dpll_dev;
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dpll_tracker tracker;
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struct mutex lock;
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enum dpll_type type;
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enum dpll_lock_status lock_status;
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struct list_head pins;
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struct ptp_clock_info ptp_info;
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struct ptp_clock *ptp_clock;
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};
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struct zl3073x_dpll *zl3073x_dpll_alloc(struct zl3073x_dev *zldev, u8 ch);
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void zl3073x_dpll_free(struct zl3073x_dpll *zldpll);
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int zl3073x_dpll_register(struct zl3073x_dpll *zldpll);
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void zl3073x_dpll_unregister(struct zl3073x_dpll *zldpll);
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int zl3073x_dpll_init_fine_phase_adjust(struct zl3073x_dev *zldev);
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void zl3073x_dpll_changes_check(struct zl3073x_dpll *zldpll);
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#endif /* _ZL3073X_DPLL_H */
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