Commit Graph

4845 Commits

Author SHA1 Message Date
Linus Torvalds
9b6f2eabc8 RTC for 7.4
Subsystem:
  - the hctosys limit for 32bit platforms is now configurable
  - introduce lock guard for for rtc_device.ops_lock
  - use sysfs_emit() instead of sprintf() were possible
  - selftest fixes
 
 New driver:
  - Raspberry Pi 5 RTC
 
 Drivers:
  - abx80x: add support for ABX81X
  - bd70528: properly enable wakeup
  - cmos: Fix ACPI RTC alarm handling
  - ds1685: power-off fixes
  - mt6397: add nvmem support
  - pcf85063: add HW UIE support
  - rs5c372: Ricoh R2223x support
  - rzn1: add R-Car X5H support
  - s35390a: allow use of output pin for interrupt signal 1 for wakealarm to
    support synology devices
  - sun6i: add Allwinner B288 support
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEBqsFVZXh8s/0O5JiY6TcMGxwOjIFAmrmdmcACgkQY6TcMGxw
 OjLB/g/9EG6jcs15Ci3pgKQ4g6h6UKHN86WIA64uPMjvuyAvmyccmrlW6AvwOhoH
 kAp77s8hbujENJk4HPvT4kU0G7KlxpxfZwuvicHNBqGQ1L100Ahx22FdrgXxcejk
 MKuN+30H6iJ01eDEmxJ530VlWCRBTusd8HexDh3Q6IY2mNLiphJXJ+moDheKBnAO
 ECh8lc6Qnb5fFRYqUmAK0QLNKjU8kz6FCgj+vnuSaRftEAgniFmHTJHIiTdB0Bwp
 REdpSMuhjM85oeCxcYu1r1ABnE08a3EbkoHelPlDiO/p1NNQ227IbciCG3rX++bJ
 pa5IWkt2nfvC3RIyxuM5pcCSLpRHgji34LLiCkSzP99S3yujVYcZiBYltuYz5rx0
 Jg4hIb1EmyV7AimQ3XZp1Y+/R2NxKVVHl7MEioq/EFYQFDo04EwcJAYIPn/ZPLDG
 sVpbO/o3lmocP7f6n7jZFkuapQwZ68nijiuRby51gUK4uuraPQou4/igsBlJWn0s
 z6MbS/1jtpRbAQ+8m8ev6LP5s7+4iALd4C8DGYEN53JOpx03LNLFpxPR14i8a5kt
 FaXMjA6f12WvKaVcYJv++r/pxho/iSfXRQiSV3algm921Z5hpkCRi8xauI9sJJmG
 IWjp+xZ+svPE+Ch7kn4jHbEGLbJy2sBSG30TKEE9WhUVOaHdhQo=
 =NTHB
 -----END PGP SIGNATURE-----

Merge tag 'rtc-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

Pull RTC updates from Alexandre Belloni:
 "This introduces a way to lift the hctosys limit for 32-bit systems to
  ensure systems relying on it can pass Y2038. Add a driver for the
  Raspberry Pi 5 RTC and add support for the Abracon abx81x, Ricoh
  R2223x, Renesas R-Car X5H and Allwinner B288 RTCs to existing drivers:

  Subsystem:
   - the hctosys limit for 32bit platforms is now configurable
   - introduce lock guard for for rtc_device.ops_lock
   - use sysfs_emit() instead of sprintf() were possible
   - selftest fixes

  New driver:
   - Raspberry Pi 5 RTC

  Drivers:
   - abx80x: add support for ABX81X
   - bd70528: properly enable wakeup
   - cmos: Fix ACPI RTC alarm handling
   - ds1685: power-off fixes
   - mt6397: add nvmem support
   - pcf85063: add HW UIE support
   - rs5c372: Ricoh R2223x support
   - rzn1: add R-Car X5H support
   - s35390a: allow use of output pin for interrupt signal 1 for wakealarm to
     support synology devices
   - sun6i: add Allwinner B288 support"

* tag 'rtc-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (89 commits)
  rtc: rs5c372: use sysfs_emit() instead of sprintf()
  rtc: ds1307: use sysfs_emit() instead of sprintf()
  rtc: isl1208: use sysfs_emit() instead of sprintf()
  rtc: ds1685: use sysfs_emit() instead of sprintf()
  rtc: ds1343: use sysfs_emit() instead of sprintf()
  rtc: rx8025: use sysfs_emit() instead of sprintf()
  rtc: x1205: use sysfs_emit() instead of sprintf()
  rtc: bq32k: use sysfs_emit() instead of sprintf()
  rtc: ep93xx: use sysfs_emit() instead of sprintf()
  rtc: pcf2127: use sysfs_emit() instead of sprintf()
  rtc: rv3029: use sysfs_emit() instead of sprintf()
  rtc: ds1685: keep setting PAB until power is removed
  rtc: ds1685: do not sleep in the power-off handler
  rtc: ds1685: arm the wake-up alarm at power-off only if an alarm is set
  rtc: rv3028: use sysfs_emit() instead of sprintf()
  rtc: pcf85063: add 1 Hz update interrupt (UIE) support
  rtc: pcf85063: preserve the alarm flag in clkout register updates
  rtc: pcf85063: do not clear AIE in the interrupt handler
  rtc: pcf85063: use devm_of_clk_add_hw_provider() for clkout
  rtc: s35390a: Add synology quirk
  ...
2026-11-01 08:41:03 -08:00
Linus Torvalds
780cb2a5fd LoongArch changes for v7.4
1, Add LoongArch-specific ACPI initialization;
 2, Set NX compat flag in PE/COFF efi header;
 3, Use pa_to_nid()/nid_to_addrbase() rather than hard-code;
 4, Detect and expose LAMCAS/DIV32 feature existence;
 5, Fix and improve perf hardware breakpoints;
 6, Fix and improve BPF JIT (trampoline and 32-bit operations);
 7, Add arch_crash_save_vmcoreinfo() support;
 8, Some bug fixes and other small changes.
 -----BEGIN PGP SIGNATURE-----
 
 iQJKBAABCAA0FiEEzOlt8mkP+tbeiYy5AoYrw/LiJnoFAmrh/wMWHGNoZW5odWFj
 YWlAa2VybmVsLm9yZwAKCRAChivD8uImeuBhD/0dznfX3XCSm1tqHMRIf3olKUw/
 WbXJXg+ZOpOrgrb9O14FBj92KhdaYyf5WZpFHnpuf1YtfX2WR5kMOVyOHabM5nWa
 nOMaLRaIqollC9kMX2hOkktGe6WnJBwfe8pNbnmYemcpJPbZEEPxeFycx7EMNKBf
 b6sXOcZWu05alLkeVgYlVdMQsJOhUq/dNwcmBLBfP8tWnv8HcCvSjryJAAgZb+1T
 UGXxEjOxingXi3JVUbbRaQTfjV2cho1PLIVd76JdKyUpAByMPV7hzkKU+lhMRaVq
 WFhVMDghshuNjwTapcRH2BwIT49/pNZXtcpnWo7H0fEjzyqz4HYPGm888WLeRYWN
 yFAZ6FgYo0S6CX4qkZnN4aWHK7zraqqsjQK33JzJBXhJUzwgTuKowrgHN9c+/FC9
 88VvAS8aGxrrMd74pR5PO5jzP0lMhaCViVxqgrnRNf7TZtqMS40Q6rg+0YhTZWG8
 KgkwVJ3pYqFUG2LLepKX9PmEngblNf3ajWn7EyiQ+5djktc/KSxEo5mwYLBEn8hk
 gMFTY2QEO1gH5hSHhxbYhRPtpQG0v4fBAZJ+Yo8kxTuQkEILD2200LDrvQiBnYF2
 eWcp5TXQMdG3VjVd250S1NCqx06VyKSQOH5RqopTPk7Rh93hV8QCVxvat1/3jyAK
 rC9vLYjoxS8H3/wSng==
 =k2V9
 -----END PGP SIGNATURE-----

Merge tag 'loongarch-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson

Pull LoongArch updates from Huacai Chen:

 - Add LoongArch-specific ACPI initialization

 - Set NX compat flag in PE/COFF efi header

 - Use pa_to_nid()/nid_to_addrbase() rather than hard-code

 - Detect and expose LAMCAS/DIV32 feature existence

 - Fix and improve perf hardware breakpoints

 - Fix and improve BPF JIT (trampoline and 32-bit operations)

 - Add arch_crash_save_vmcoreinfo() support

 - Some bug fixes and other small changes

* tag 'loongarch-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson: (24 commits)
  soc: loongson: loongson2_guts: Use of_root instead of own reference
  soc: loongson: loongson2_pm: Fix build warnings for 32BIT
  LoongArch: dts: loongson-2k0500: Drop unsupported bus_id in DWMAC
  LoongArch: BPF: Optimize 32-bit operations using native instructions
  LoongArch: BPF: Clean up and decouple is32 parameter from move_imm()
  LoongArch: BPF: Fix stack arguments for indirect trampolines
  LoongArch: Add arch_crash_save_vmcoreinfo() support
  LoongArch: Fix one-shot limitation for perf hardware breakpoints
  LoongArch: Fix perf hardware breakpoint failure via installation
  LoongArch: Only send SIGTRAP signal if necessary in do_watch()
  LoongArch: Fix architectural naming typo for CSR_FWPS_SKIP
  LoongArch: Fix bitmask corruption in update_bp_registers()
  LoongArch: Remove redundant call in update_bp_registers()
  LoongArch: Remove arch-specific __smp_mb__{before,after}_atomic()
  LoongArch: Detect and expose DIV32 feature existence
  LoongArch: Detect and expose LAMCAS feature existence
  LoongArch: Use pa_to_nid()/nid_to_addrbase() rather than hard-code
  LoongArch: Don't init & online empty nodes
  LoongArch: Call cpu_final_simd() with pure_initcall()
  LoongArch: Use assign_bit() API where applicable
  ...
2026-10-30 09:44:29 -10:00
Linus Torvalds
f9350d59d7 remoteproc updates for v7.4
Add Qualcomm QMI Thermal Mitigation Device support for PAS-managed
 remote processors, with cooling device bindings and configurations for
 Hamoa, Kodiak, Lemans, Talos, Monaco, and Shikra CDSP and modem
 subsystems as applicable.
 
 Add per-power-domain proxy performance states for Hawi CDSP and update
 Hawi, Maili, and SDX75 PAS compatible bindings and the SDX75 device
 tree. Correct the Qualcomm ADSP startup timeout.
 
 Fetch auto-boot firmware only once and synchronize boot work with device
 removal. Bound ELF section header accesses, improve trace diagnostics,
 and update coredump configuration documentation.
 
 Set 48-bit DMA masks for TI K3 DSP and R5 remote processors, correct
 mailbox message types, and enable compile testing for more TI drivers.
 Fix i.MX address range boundary checks and DSP runtime PM ordering, and
 simplify mailbox notification handling.
 
 Harden Xilinx mailbox setup and teardown and avoid sending notifications
 when the transmit queue is full. Propagate STM32 optional IRQ lookup
 errors and correct the MediaTek MT8188 SCP register binding.
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmriBRcOHGJqb3JuQGty
 eW8uc2UACgkQCx85Pw2ZrcX16RAApbzzwQxl0CHXjqz70Qb8G0e8I11xfnmKQalx
 UHU/GQJipx4/ULOsXmVlxfBEZJgaYcc+UehPgKJYpDEdHSnYZfmbZunPGzohcbHM
 0y0fLm73Z3+7L8nYQZtn+1wxOqBrw/H/09lGkl2ypZQ2K0dhUjZLC5AhDp2bGKQY
 aRrIKhSeh8fyznzc+B8b+CE33AjCvnW3uO4Vd/nS3OlPwxTcUL9/eW1CVCDqRK1n
 Px5oTubk+RsgcxEwuZSYWb8GumfT9xI7kQkJuFed1830OWImIDJCQdxlwXUucqKK
 KlyKLeo+8uF7kPyIasIx8sEBm911P+D1Ab/ZxSeTuhT7ERcCgEgjIz8wrzihGD6e
 6N2q2p40JStCNEoNYnidg8langf1+A8SNpiqcXFEzldypBT7ThjOryb0sxjFLdSC
 laF1290cw2qGKGGjC/gv1P2h5NNUKIHtb3XRxqZzrR7oZfN5D2y5T2+KUXRiGujQ
 49bHyGvqb9/8nBhD3KnH31fvCw1S/3ZHu5Fx0MAymXYfhvL/er4ykJk7fPQMaLd3
 I65sW9bVypSPhe7A9+DciLhy4esNXkrrL4AlzdyXPWVDPxFWBODX+nDZoOgxy/+5
 YgWNzlA5bAvfEKs8sMxtekAX4cbovhN2jLgCbqZPw7VH+eFzBsVUyeY8C4Z2MUpC
 uB1eXhA=
 =B5vf
 -----END PGP SIGNATURE-----

Merge tag 'rproc-v7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux

Pull remoteproc updates from Bjorn Andersson:

 - Add Qualcomm QMI Thermal Mitigation Device support for PAS-managed
   remote processors, with cooling device bindings and configurations
   for Hamoa, Kodiak, Lemans, Talos, Monaco, and Shikra CDSP and modem
   subsystems as applicable.

 - Add per-power-domain proxy performance states for Hawi CDSP and
   update Hawi, Maili, and SDX75 PAS compatible bindings and the SDX75
   device tree. Correct the Qualcomm ADSP startup timeout.

 - Fetch auto-boot firmware only once and synchronize boot work with
   device removal. Bound ELF section header accesses, improve trace
   diagnostics, and update coredump configuration documentation.

 - Set 48-bit DMA masks for TI K3 DSP and R5 remote processors, correct
   mailbox message types, and enable compile testing for more TI
   drivers. Fix i.MX address range boundary checks and DSP runtime PM
   ordering, and simplify mailbox notification handling.

 - Harden Xilinx mailbox setup and teardown and avoid sending
   notifications when the transmit queue is full. Propagate STM32
   optional IRQ lookup errors and correct the MediaTek MT8188 SCP
   register binding.

* tag 'rproc-v7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (33 commits)
  remoteproc: qcom_q6v5_pas: Add QMI TMD cooling support for Shikra
  remoteproc: virtio: Remove stray white space
  remoteproc: virtio: Replace kmemdup with kmemdup_array
  remoteproc: virtio: Add vdev_to_rsc() helper
  remoteproc: core: Fetch the auto-boot firmware only once
  remoteproc: xlnx: fix typecast warnings
  remoteproc: qcom_q6v5_pas: enable QMI TMD cooling support
  remoteproc: qcom: pas: add support for TMD thermal cooling devices
  soc: qcom: Add QMI TMD support for remote thermal mitigation
  dt-bindings: remoteproc: qcom,pas: add #cooling-cells property
  remoteproc: qcom_q6v5_pas: add per-PD proxy performance states for Hawi CDSP
  dt-bindings: remoteproc: qcom,sm8550-pas: make qcom,hawi-cdsp-pas standalone
  arm64: dts: qcom: sdx75: Use SM8650 MPSS as fallback compatible
  dt-bindings: remoteproc: qcom,sm8550-pas: Make SDX75 MPSS fallback to SM8650
  dt-bindings: remoteproc: qcom,sm8550-pas: Add Hawi and Maili MPSS as SM8650 fallback
  dt-bindings: remoteproc: Fix MT8188 SCP regs
  remoteproc: Use %p for pointer formatting
  remoteproc: Add compile testing for additional TI drivers
  remoteproc: k3-dsp: Fix usage of omap_mbox_message and mbox_msg_t
  remoteproc: k3: Include what we need and only what we need
  ...
2026-10-28 07:16:05 -10:00
Binbin Zhou
6f8d12bb1a soc: loongson: loongson2_guts: Use of_root instead of own reference
There is already a global of_root reference. Use that instead of getting
one on our own. We don't need to care about the reference count either
this way.

Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2026-10-28 15:09:27 +08:00
Huacai Chen
48b960ad70 soc: loongson: loongson2_pm: Fix build warnings for 32BIT
Since loongson_sysconf.suspend_addr is unsigned long, use "unsigned
long" instead of "u64" for casting, so as to avoid build warnings for
32BIT:

   drivers/soc/loongson/loongson2_pm.c: In function 'loongson2_pm_probe':
>> drivers/soc/loongson/loongson2_pm.c:178:49: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
     178 |                 loongson_sysconf.suspend_addr = (u64)phys_to_virt(suspend_addr);
         |

Cc: stable@vger.kernel.org
Fixes: 3d9aba6618 ("LoongArch: Adjust build infrastructure for 32BIT/64BIT")
Closes: https://lore.kernel.org/oe-kbuild-all/202610190549.WM2PO3vO-lkp@intel.com/
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2026-10-28 15:09:27 +08:00
Linus Torvalds
2e51c645fe soc: driver updates for 7.4
There are lots of minor updates for driver subsystems managed through
 the soc tree (turris-omnia platform, cache driver, tee drivers, arm-cci,
 bus, memory) as well as soc vendor specific drivers (starfive, xilinx,
 microchip, nxp, amlogic, imx, renesas, samsung, ti, nvidia).
 
 The more notable changes are:
 
  - Larger updates for Qualcomm SoCs including support for SM8950 (Maili)
    SM8975 (Hawi), Glymur, Shikra, and IPQ5424
 
  - Added SoC support for Exynos5515, Tegra264, Tegra410, R8A774A3,
    and MT8167 in existing drivers
 
  - Arm SCMI firmware driver support for ACPI PCC transport and module
    autoloading of protocol specific drivers
 
  - Apple crash log support for CrgA embedded controller
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrZvIwACgkQmmx57+YA
 GNk+6g/9GA1wDmaqXI04Nnc3oh4fZ/LUXmyAPvLbJjL7CtNuPn2oSFyBjFbZmpLY
 Ponhx2dV1Hei7/GzYA/BLGrxSkGoAfLSuPI0lB96Fhnk62hWQMGdOzC0nL+Bhk0C
 fBeUolJG4gepPvPmXQEjAuXweO7Ff/xqK33njbjndEkxyCrsQC8LIRB5079VCupr
 vu8YMNluIxmdVHmSPPdIKVjYsHZdVy59m9lSPoXWan9vdSK4SsLlo2JOE4FPXLQX
 3AQFZWovPkBVz+AmXmi8X8iFMO0t8D21w6uhCDXfJzylD89VkuxiYqoAGJclNkXo
 hMoiG2yZ6D4lNCHgI3Vs/CQtoNlHIXdC9Vc3vK0oobwYJIOUeJy9cpH+7/eREtX0
 MF49XzNgdwb6eruTSvE6JbA1jjudVrOWHBuaOUXwsoofPfm3+XG6aR+QQRhgVx4l
 LITffvauD2xMRAjbfO0nGtsbmKZRE99lxhYIhgvhL6BftbYZcLcwztopOidRkKAe
 FjMKhH8tXzSYAQHYqVuHGEu4E9O92yePkkDUiasMJD2/V6ZjsEf0guilpjRZJkL1
 2PINkDo24Ejo7mv5cfOsQDgPo1WwMUn8iNYLb7rOmaxsRHsXmmFSUhQgyKIU4ZT3
 JEFBG76wvdXHG1aGEeQbMf+62XjqlJbo25jLl3L01T898Ks28RE=
 =t02i
 -----END PGP SIGNATURE-----

Merge tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
 "There are lots of minor updates for driver subsystems managed through
  the soc tree (turris-omnia platform, cache driver, tee drivers,
  arm-cci, bus, memory) as well as soc vendor specific drivers
  (starfive, xilinx, microchip, nxp, amlogic, imx, renesas, samsung, ti,
  nvidia).

  The more notable changes are:

   - Larger updates for Qualcomm SoCs including support for SM8950
     (Maili) SM8975 (Hawi), Glymur, Shikra, and IPQ5424

   - Added SoC support for Exynos5515, Tegra264, Tegra410, R8A774A3, and
     MT8167 in existing drivers

   - Arm SCMI firmware driver support for ACPI PCC transport and module
     autoloading of protocol specific drivers

   - Apple crash log support for CrgA embedded controller"

* tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (176 commits)
  platform: cznic: turris-omnia-mcu: stop button emulation producers
  cache: Make cpu_cache_invalidate_memregion() error out if there are no handlers
  soc: mpfs: use kref cleanup on probe failure
  arm64: enable HAVE_SHARED_GPIOS for all ARM64 platforms
  bus: arm-cci: Drop cci-control-port node reference in __cci_ace_get_port()
  bus: arm-cci: Drop CPU node reference in cci_ace_init_ports()
  soc: fsl: dpio: Free the IRQ before releasing the I/O object
  soc: fsl: dpio: Fix cleanup on IRQ registration failure
  bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
  bus: fsl-mc: drop the fwnode links of the dpmacs nodes
  soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
  soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
  firmware: qcom: scm: Allow QSEECOM on ThinkPad T14s Gen 7
  dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller
  dt-bindings: spmi: glymur-spmi-pmic-arb: Add compatible for Qualcomm Maili SoC
  soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
  ASoC: dt-bindings: qcom,apr: Add modem_apps GLINK channel for shikra
  firmware: qcom: tzmem: disable SHM bridge for SM7125 platform
  soc: qcom: ubwc: Add Kalambo UBWC config
  firmware: qcom: scm: Allow QSEECOM on Kalambo CRD
  ...
2026-10-22 07:52:50 -10:00
Linus Torvalds
7b9a0e857b soc: devicetree updates for 7.4
This is a rather large update of over 1000 non-merge commits touching
 devicetree files and bindings.
 
 A few notable SoC were added this time:
 
  - Apple M4 and A18 Pro are used in laptops, these follow the M3 model
    added in 7.2.
 
  - Google Laguna (aka Tensor G5) is used last year's Pixel phone
    generation. Unlike the earlier Tensor chips, this is not based
    on Samsung's Exynos family design but starts a new chip family.
 
  - Qualcomm's Hawi and Nord SoCs are two powerful chips using the
    custom Oryon cores. Product names and applications are so far
    not known, which means that Qualcomm is doing something right
    by upstreaming kernel support early.
 
 The ST stm32mp23xc/stm32mp25xc SoC support was previously removed because
 there were no users upstream, but they are back now that boards have
 shown up. Renesas RZ/G2M v3.0 (R8A774A3) is just a minor variation of
 the already supported SoC.
 
 In total, there are 81 new dts files for individual boards, and they are
 all over the place. Only one riscv based machine is added, the Milk-V
 Meles SBC using the T-Head th1520 chip. For 32-bit Arm, we have 13 new
 boards. About half are industrial embedded boards using NXP i.MX6/7
 chips, the rest are older products: two Amazon tablets, two Motorola
 phones and two SoM boards.
 
 Everything else is 64-bit Arm:
 
  - many industrial embedded boards using NXP layerscape, NXP i.MX8/9,
    Qualcomm Hamoa, ST stm32mp2, Rockchip rk35xx, and Renesas RZ/G2
    SoCs
 
  - Laptops and tablets using Apple M4, Qualcomm Snapdragon X2,
    Snapdragon X1 Elite and Allwinner A133 chips
 
  - Valve Steam Frame VR headset using Snapdragon 8 Gen 3
 
  - Seven handheld game consoles using Qualcomm Dragonwing qcs8550
 
  - Mobile phones using Google Tensor G5, Samsung Exynos 850,
    and various Qualcomm Snapdragon chips
 
 Aside from the new stuff, there is still a lot going on for existing
 socs and boards, including GPU hardware support on MediaTek MT8173
 based laptops. Most patches actually add features this time, as the
 compile-time diagnostic changes are slowing down.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrZSowACgkQmmx57+YA
 GNm1yRAAuIMTLsW0eS9dK591iGkCBV52c9J8R3zDiTfSNt7WI4lOt69VV52AKVX0
 PLLUeD4x2TVpg6L/YSuCcZv9lH+itUqZUrJshmB0mL4AYTUj0PnzXwTdd+FgtGMi
 K8Pts4k23dZWdDDLlvvOSuzYFFLt3OMnZTMgWXVJZWObUw4wzuqcVg3uZlIRhCQn
 urHQoZ5/vDey0LXQ76uXpvJluy3tpgzu3X2W9PDZc307DmMmvpftZIYXJYsg/TWI
 b8EH5sjTPh52lldtkqRRk8l+g/MvMCVhkdM8l+lc0dgJ16ew1k6eaXW4fAGHiyDG
 HlI8ZIQmrC5XWwCECnjgPGnOiNjtPKIBxsev1PKanjVIYTHqk8Sr/ufzlzWEwtp7
 b8rRTg2ft5W0lhASr6cJ3xJRGfzg+SyhYjFzpJF18cngqilGVeqGlqG1PfTjAsxP
 hphsqkcXqj4M0fz5DuLSMEdblCx0gcr6JrBw46LDIBZ7IKpJAwFHLk91wjAwnvBG
 QSQ20YfGLnM9Wo2o9idpMFbsH/49B3DCdmCy2mTOJFxqHCLzomp1M7ee0pfKJSyR
 b2zpOAbUfJ2LzI8/YrWAfzYq0ujaQF7rAOy+2Pq8CxWDhxMt4LsZaY1kiBXoLN1y
 oc+zBjmDc+XELfAWvVqzyiOV4ANx8ojCL7MkqyqgclwPgawzYAI=
 =Kk7O
 -----END PGP SIGNATURE-----

Merge tag 'soc-dt-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
 "This is a rather large update of over 1000 non-merge commits touching
  devicetree files and bindings.

  A few notable SoC were added this time:

   - Apple M4 and A18 Pro are used in laptops, these follow the M3 model
     added in 7.2.

   - Google Laguna (aka Tensor G5) is used last year's Pixel phone
     generation. Unlike the earlier Tensor chips, this is not based on
     Samsung's Exynos family design but starts a new chip family.

   - Qualcomm's Hawi and Nord SoCs are two powerful chips using the
     custom Oryon cores. Product names and applications are so far not
     known, which means that Qualcomm is doing something right by
     upstreaming kernel support early.

  The ST stm32mp23xc/stm32mp25xc SoC support was previously removed
  because there were no users upstream, but they are back now that
  boards have shown up. Renesas RZ/G2M v3.0 (R8A774A3) is just a minor
  variation of the already supported SoC.

  In total, there are 81 new dts files for individual boards, and they
  are all over the place. Only one riscv based machine is added, the
  Milk-V Meles SBC using the T-Head th1520 chip. For 32-bit Arm, we have
  13 new boards. About half are industrial embedded boards using NXP
  i.MX6/7 chips, the rest are older products: two Amazon tablets, two
  Motorola phones and two SoM boards.

  Everything else is 64-bit Arm:

   - many industrial embedded boards using NXP layerscape, NXP i.MX8/9,
     Qualcomm Hamoa, ST stm32mp2, Rockchip rk35xx, and Renesas RZ/G2
     SoCs

   - Laptops and tablets using Apple M4, Qualcomm Snapdragon X2,
     Snapdragon X1 Elite and Allwinner A133 chips

   - Valve Steam Frame VR headset using Snapdragon 8 Gen 3

   - Seven handheld game consoles using Qualcomm Dragonwing qcs8550

   - Mobile phones using Google Tensor G5, Samsung Exynos 850, and
     various Qualcomm Snapdragon chips

  Aside from the new stuff, there is still a lot going on for existing
  socs and boards, including GPU hardware support on MediaTek MT8173
  based laptops. Most patches actually add features this time, as the
  compile-time diagnostic changes are slowing down"

* tag 'soc-dt-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (1022 commits)
  arm64: dts: rockchip: Add Radxa E54C
  dt-bindings: arm: rockchip: Add Radxa E54C
  arm64: dts: rockchip: remove FRL GPIO for 100ASK DshanPi A1
  arm64: dts: rockchip: fix M.2 E-key reset pinctrl on rk3588 rock-5-itx
  arm64: dts: rockchip: add pcie30phy data-lanes on rk3588 coolpi-cm5-evb
  arm64: dts: rockchip: Add the fan tachometers to Kobol Helios64
  arm64: dts: rockchip: enable NPU on Radxa E52C
  arm64: dts: rockchip: fix adc button voltage on Radxa E52C
  riscv: dts: sophgo: sg2002-milkv-duo256m: drop reserved memory node
  riscv: dts: sophgo: cv1800b-milkv-duo: drop reserved memory node
  arm64: dts: nuvoton: npcm845-evb: Add peripheral nodes
  arm64: dts: nuvoton: npcm845-evb: Fix DTS coding style
  arm64: dts: nuvoton: npcm845: Add peripheral nodes
  arm64: dts: nuvoton: npcm845: Split APB address ranges
  riscv: dts: sophgo: cv180x: Fix internal ephy node name
  riscv: dts: sophgo: add Milk-V Duo 256M ethernet support overlay
  riscv: dts: sophgo: Limit SG2042 SPI NOR to 12.5 MHz
  riscv: dts: sophgo: Enable SPI NOR on SRD3-10
  riscv: dts: spacemit: set ETH MAC from eeprom for OrangePi
  arm64: dts: allwinner: sun50i-h616: Add video engine
  ...
2026-10-22 07:48:17 -10:00
Linus Torvalds
2e973d4882 Updates for interrupt chip drivers:
- Remove the futile attempts to cleanup resources when the probing of the
     main interrupt chip fails for SiFIVE/PLIC devices. If that probe fails
     the system will stall immediately afterwards in the boot process
     without reaching a state where the error could be diagnosed. The lack
     of resource cleanup led to a frenzy of AI detected/assisted "fixes"
     which just make the code pretend to be correct for no value.
 
     Remove the existing half baked cleanup and immediately panic the
     machine when the probe fails. That's far more useful than letting it
     proceed and stall out a millisecond later with no information about the
     root cause.
 
   - A series of fixes for the ARM GIC-V3 driver addressing a potential
     double free, a bitmask overrun on 32-bit ARM and a OF node leak.
 
   - Automatically set the IRQ_DOMAIN_FLAG_DESTROY_GC when a interrupt
     domain is created that also allocates the generic interrupt chip during
     domain creation. That removes the requirement for manually setting the
     flag in the domain creation info structure when it contains a valid
     entry for allocating the generic interrupt chip. Remove the therefore
     redundant setters of IRQ_DOMAIN_FLAG_DESTROY_GC in the existing
     drivers.
 
   - Add support for Annapurna Labs FIC version 2 and 3 and implement
     affinity control for the demultiplexed interrupts by utilizing the
     recently merged interrupt redirection infrastructure.
 
   - Convert the ACPI device ID structures to named initializers
 
   - Consolidate the IPI related constants for RISC-V interrupt controllers
 
   - Add support for Qualcomm Purwa SoC interrupt chip and consolidate the
     workaround for the previous version in Hamoa SoCs.
 
   - The usual small fixes and improvements all over the place
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmrX0aEQHHRnbHhAa2Vy
 bmVsLm9yZwAKCRCmGPVMDXSYoatNEACU5naAkM1k+hTaPXSRcd/JpizpVrM5jpM5
 tOGe5ml6h9Mda+9uFSwR5rOF5kHXofZh70E97zR7C4jD7JNcuXPqgFg202mKfcjg
 ZWcuYKOR5DaAmiNgpXYPyK9UpXQ9YOPwE7MMpv7sv5yfYDVWFzVEOSb5F294D+gK
 vuQLY9jeysDWNRSuXD9Zo8pBoXJZBCMvTWrJJO4fdh8ZxIWJJv35nRoAgYs8ZlWq
 hF1om+Ei8KbftW9ox/ZJ+nomM6UG+H6iw8+7jZ/mQ9kadRExCNNoFF2NDfH/XFX2
 +o+2HVmXW5KTCSmy28aPLBTZojeAoEGvqI5IXu8bKYR6IfYrzdZIe+9UuabPg0lO
 NWOFj1wGbUD84hoo0gI9f1MsTORdNBqccG132MvDKzOyMYQ8cbOEsk44QTjLC+kT
 A46iM1eFC43g2YWpl9qZRKmq+PomCwMwBmjCKNPzG1a24iUzeDdGSs+Es2tNzlQt
 MVPXGHzgBfXb1thEP/28nBpEnAJ6XyXaXvIvp0GcSVdbTmT3MrkEOb0YmI1QUyot
 FRM9WVpy9X0XNo4yqxKAFGVlmGeR9XKMYgU3bgaZ7CgZMe507MAjTGU44mk+LjKa
 Ndyl7ztYrrcf3GMoe1IIbfKI6bcUZ588d6VPLjH8BKCd2ZqRDfnIPNX+oIpoomd3
 FxacuEXq4Q==
 =ma3a
 -----END PGP SIGNATURE-----

Merge tag 'irq-drivers-2026-10-20' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq chip driver updates from Thomas Gleixner:
 "Updates for interrupt chip drivers:

   - Remove the futile attempts to cleanup resources when the probing of
     the main interrupt chip fails for SiFIVE/PLIC devices. If that
     probe fails the system will stall immediately afterwards in the
     boot process without reaching a state where the error could be
     diagnosed. The lack of resource cleanup led to a frenzy of AI
     detected/assisted "fixes" which just make the code pretend to be
     correct for no value.

     Remove the existing half baked cleanup and immediately panic the
     machine when the probe fails. That's far more useful than letting
     it proceed and stall out a millisecond later with no information
     about the root cause.

   - A series of fixes for the ARM GIC-V3 driver addressing a potential
     double free, a bitmask overrun on 32-bit ARM and a OF node leak.

   - Automatically set the IRQ_DOMAIN_FLAG_DESTROY_GC when a interrupt
     domain is created that also allocates the generic interrupt chip
     during domain creation. That removes the requirement for manually
     setting the flag in the domain creation info structure when it
     contains a valid entry for allocating the generic interrupt chip.
     Remove the therefore redundant setters of
     IRQ_DOMAIN_FLAG_DESTROY_GC in the existing drivers.

   - Add support for Annapurna Labs FIC version 2 and 3 and implement
     affinity control for the demultiplexed interrupts by utilizing the
     recently merged interrupt redirection infrastructure.

   - Convert the ACPI device ID structures to named initializers

   - Consolidate the IPI related constants for RISC-V interrupt
     controllers

   - Add support for Qualcomm Purwa SoC interrupt chip and consolidate
     the workaround for the previous version in Hamoa SoCs.

   - The usual small fixes and improvements all over the place"

* tag 'irq-drivers-2026-10-20' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (61 commits)
  irqchip/al-fic: Support per-child affinity via interrupt redirection
  irqchip/al-fic: Add support for FIC v3
  irqchip/al-fic: Support error and fatal outputs and FIC v2
  dt-bindings: interrupt-controller: amazon,al-fic: Add mask selection
  irqchip/al-fic: Switch to shared parent interrupt
  irqchip/al-fic: Keep the device_node instead of a cached name string
  irqchip/al-fic: Use %pOF and raise init log level
  irqchip/al-fic: Use %pe to print init error
  irqchip/al-fic: Fix coding style issues
  irqchip: Use named initializers for acpi_device_id
  irqchip/gic-v5: Fix standalone IRSes OF probe
  dt-bindings: interrupt-controller: gicv5: Relax IRS properties constraints
  irqchip/renesas-rzv2h: Preserve TIEN state in rzv2h_tint_set_type()
  irqchip/loongson-eiointc: Use pa_to_nid() rather than hard-code
  irqchip/riscv-imsic: Expose the fwnode via the global config
  irqchip/meson-gpio: Allow the GPIO interrupts to wake the system
  irqchip/gic-v3: Ensure change to DS is visible
  irqchip/mips-gic: Transfer interrupt mask state across clusters
  irqchip/mips-gic: Fix recursive acquisition of gic_lock in gic_set_affinity()
  irqchip/mips-gic: Fix unbalanced cm_core_lock in for_each_online_cpu_gic()
  ...
2026-10-21 11:16:50 -10:00
Linus Torvalds
303bff3637 Core features:
- Remove big-endian kernel support: CONFIG_CPU_BIG_ENDIAN has depended
    on BROKEN for a while, so drop the remaining code (BE hypervisor
    object, BPF JIT, assembly/crypto/library routines, endianness helper
    macros, selftests) and force a little-endian build
 
  - Add preemptible this_cpu_*() operations (read/write, RMW, xchg,
    cmpxchg and cmpxchg128) that no longer need to disable preemption
    around the per-CPU address generation and access
 
  - Preparation patches for implementing CONFIG_HOTPLUG_PARALLEL on
    arm64
 
 Memory management:
 
  - Treat faults taken by EFI runtime firmware as kernel faults
 
  - Clear PTE_WRITE for EFI_MEMORY_RO mappings (with hardware dirty state
    management enabled, this is not truly read-only)
 
  - Raise the default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA
    configurations (28/26/24 bits for 4K/16K/64K pages)
 
  - Implement clear_page[s]() using memset()
 
  - Enable BBML2 no-abort (a.k.a. BBML3) for the NVIDIA Rigel CPU
 
 Perf and PMU:
 
  - Support for HiSilicon's ITS PMU
 
  - Add support for some new events: INST_SIMD_ALU_VEC for Apple PMUs and
    a cycle counter for the latest version of HiSilicon's MN PMU hardware
 
  - A bunch of fixes to the CXL PMU driver to address pre-existing issues
    from Sashiko
 
  - Fix generation of PERF_RECORD_ITRACE_START records for SPE and ETM
    drivers
 
  - Reduce excessive stack consumption in the Marvell DDR PMU driver
 
  - Minor driver updates and cleanups all over
 
 Arm Confidential Compute Architecture (CCA):
 
  - Add an Arm SMCCC bus for firmware services discovered through SMCCC
    and move the TRNG and CCA guest (TSM provider) drivers onto it,
    removing the dummy CCA platform device and adding a sysfs ABI for
    Realm guests
 
  - Move the Realm Service Interface (RSI) code out of arch/arm64/ into
    drivers/firmware/arm_rmm/
 
  - Add the host side of the Realm Management Interface (RMI): detect,
    configure and activate the RMM, add SRO support and wrappers for the
    Realm RMI commands
 
  - Block hibernation (new arch hook in the PM core) and kexec while the
    RMM is active. To be revisited in the future with proper support for
    deactivation
 
  - Handle Granule Protection Faults (GPFs) taken by the host, caused by
    accesses to memory delegated to the RMM. In a future patch, the
    exception table lookup will be limited to is_kdump_kernel() cases
 
 MPAM (Memory Partitioning And Monitoring):
 
  - Add support for the MPAM firmware-backed (Fb) interface, allowing
    MSC accesses to be mediated by firmware
 
  - Fix a list of theoretical issues with the driver (MSC access error
    propagation, MBWU monitor save/restore and locking, resctrl class
    handling, error interrupt restore, maximum number of PARTIDs)
 
  - Add the mailing list and a missing file to the MAINTAINERS entry
 
  - Document when to set arm64.nompam
 
 Errata and CPU features:
 
  - Add the NXP i.MX8QM/8QP workaround for the Cortex-A53 cache coherency
    issue (ERR050104), using a new ARM64_CPUCAP_SOC_ERRATUM capability
    type for SoC-level errata
 
 Miscellaneous:
 
  - Mask debug exceptions (DAIF) around the hardware breakpoint register
    manipulations when called from generic kernel code
 
  - Don't zero the SVE state buffer when the SVE state is live
 
  - Return -EPERM instead of -EBUSY from the GCS prctl() locking
    failures (matching x86), with the selftest updated. Slight ABI change
    but no software deployment yet
 
  - kselftest: fix unsound MTE fault skipping by introducing MTE-safe
    memory accessors, avoid copying each signal test binary more than
    once
 
  - Update sysreg definitions (fix three enum values and two field names,
    mark architecturally dropped fields as RES0) and remove the TME
    transaction state check from the BRBE driver
 
  - Fix the description of ARM64_HAS_LPA2 and remove a redundant
    ID_AA64MMFR0 define
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmrRImIACgkQa9axLQDI
 XvG+mw/+Lu/PONW1zxo4M65u3vR2bTBqhx8Xo3MP15ANaNVEb3guiUX0ZGAMVdz7
 NgN5NAQFQ5lwb8V8F5LSPGPlHTZ/KEYbiu2IRqwNvUrr2xU+Bz2AZKGvTfScEokO
 PiNfe84I7pWG+U77eBotZ5TxBQiLRe+8VWetIlPOQK9QUm0PG6Z50vhBBahg5kvJ
 b0nf2K3mSIscQRskykkCfIAwTShJM1NvW4+Ygfz6UjHaTtvPg+wsHPMZunKLJW5F
 tbXjZxcJQPziTl7lsRZuKbBrW7Sm5XRl54Q5Tl5ToXQ/C8h2jKjaNoqyXfV+ETJx
 MnFMQfmSIXuKlPuhZTiZK1viVXJe886iCi0vavMwKIR1zNJBKWLWeFz7cepe/jfq
 PHnZo9dX9dNRS7vzBGVq1aYUe/pn5eVeYrUQjMWCyKF2aLvSLm5n4Tf+XtvDUrkA
 O5EuP7sHL8xY9wCJ+Mw45gX1sQiJRy2jBOBbUvZ2/F6ACgG8dvKS9lhpbIn8IsKU
 rFkwacTcsUCoKCnthOwupRApUU/S2fiyzEoUc/R/gDubmnDET3nLcSsspg/FacqP
 OOq/6ErxAQ3HA5ltK0Siq8/qud9mnpYa0xyoxs7EED3jpX2A3lLf9UZduZ+r/2IP
 k5KI+4yRkYPBqGoFjwO8nMrk8jgvZzAtTMh86EOI4LZkcNEvuzU=
 =YdKt
 -----END PGP SIGNATURE-----

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 updates from Catalin Marinas:
 "Here are the arm64 updates for 7.4.

  The more interesting bits are the removal of big-endian kernel support
  (already marked BROKEN for some time), preemptible this_cpu_*()
  operations and MPAM support for the firmware-backed (Fb) interface.

  CCA (Arm's confidential compute) is slowly trickling in with host RMI
  (Realm Management Interface) support and some refactoring, including a
  dedicated SMCCC bus to advertise firmware services. There are also the
  usual PMU updates for new hardware and a few fixes/cleanups.

  Core features:

   - Remove big-endian kernel support: CONFIG_CPU_BIG_ENDIAN has
     depended on BROKEN for a while, so drop the remaining code (BE
     hypervisor object, BPF JIT, assembly/crypto/library routines,
     endianness helper macros, selftests) and force a little-endian
     build

   - Add preemptible this_cpu_*() operations (read/write, RMW, xchg,
     cmpxchg and cmpxchg128) that no longer need to disable preemption
     around the per-CPU address generation and access

   - Preparation patches for implementing CONFIG_HOTPLUG_PARALLEL on
     arm64

  Memory management:

   - Treat faults taken by EFI runtime firmware as kernel faults

   - Clear PTE_WRITE for EFI_MEMORY_RO mappings (with hardware dirty
     state management enabled, this is not truly read-only)

   - Raise the default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA
     configurations (28/26/24 bits for 4K/16K/64K pages)

   - Implement clear_page[s]() using memset()

   - Enable BBML2 no-abort (a.k.a. BBML3) for the NVIDIA Rigel CPU

  Perf and PMU:

   - Support for HiSilicon's ITS PMU

   - Add support for some new events: INST_SIMD_ALU_VEC for Apple PMUs
     and a cycle counter for the latest version of HiSilicon's MN PMU
     hardware

   - A bunch of fixes to the CXL PMU driver to address pre-existing
     issues from Sashiko

   - Fix generation of PERF_RECORD_ITRACE_START records for SPE and ETM
     drivers

   - Reduce excessive stack consumption in the Marvell DDR PMU driver

   - Minor driver updates and cleanups all over

  Arm Confidential Compute Architecture (CCA):

   - Add an Arm SMCCC bus for firmware services discovered through SMCCC
     and move the TRNG and CCA guest (TSM provider) drivers onto it,
     removing the dummy CCA platform device and adding a sysfs ABI for
     Realm guests

   - Move the Realm Service Interface (RSI) code out of arch/arm64/ into
     drivers/firmware/arm_rmm/

   - Add the host side of the Realm Management Interface (RMI): detect,
     configure and activate the RMM, add SRO support and wrappers for
     the Realm RMI commands

   - Block hibernation (new arch hook in the PM core) and kexec while
     the RMM is active. To be revisited in the future with proper
     support for deactivation

   - Handle Granule Protection Faults (GPFs) taken by the host, caused
     by accesses to memory delegated to the RMM. In a future patch, the
     exception table lookup will be limited to is_kdump_kernel() cases

  MPAM (Memory Partitioning And Monitoring):

   - Add support for the MPAM firmware-backed (Fb) interface, allowing
     MSC accesses to be mediated by firmware

   - Fix a list of theoretical issues with the driver (MSC access error
     propagation, MBWU monitor save/restore and locking, resctrl class
     handling, error interrupt restore, maximum number of PARTIDs)

   - Add the mailing list and a missing file to the MAINTAINERS entry

   - Document when to set arm64.nompam

  Errata and CPU features:

   - Add the NXP i.MX8QM/8QP workaround for the Cortex-A53 cache
     coherency issue (ERR050104), using a new ARM64_CPUCAP_SOC_ERRATUM
     capability type for SoC-level errata

  Miscellaneous:

   - Mask debug exceptions (DAIF) around the hardware breakpoint
     register manipulations when called from generic kernel code

   - Don't zero the SVE state buffer when the SVE state is live

   - Return -EPERM instead of -EBUSY from the GCS prctl() locking
     failures (matching x86), with the selftest updated. Slight ABI
     change but no software deployment yet

   - kselftest: fix unsound MTE fault skipping by introducing MTE-safe
     memory accessors, avoid copying each signal test binary more than
     once

   - Update sysreg definitions (fix three enum values and two field
     names, mark architecturally dropped fields as RES0) and remove the
     TME transaction state check from the BRBE driver

   - Fix the description of ARM64_HAS_LPA2 and remove a redundant
     ID_AA64MMFR0 define"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (144 commits)
  arm64: cpufeature: Enable BBML2 for NVIDIA Rigel
  arm64: cputype: Add NVIDIA Rigel definitions
  arm64: raise default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA
  arm64/debug: mask debug exceptions when called from common code
  kselftest/arm64: signal: copy each test binary only once
  kselftest/arm64: Check for -EPERM not -EBUSY in the locking test
  arm64: gcs: Return -EPERM not -EBUSY for prctl() locking failures
  perf: arm_brbe: Remove the check for TME transaction states
  arm64: sysreg: Mark fields the architecture dropped as RES0
  arm64: sysreg: Fix the names of two misspelt fields
  arm64: sysreg: Fix three incorrect enum values
  arm64: smp: Defer RCU registration during secondary CPU bringup
  arm64: smp: Don't bother printing the I-cache policy for each CPU
  arm64: smp: Defer update of secondary CPU capabilities
  arm64: smp: Tidy up cpuinfo init and cpufeature updates
  arm64: smp: Tidy up smp_prepare_cpus()
  arm64: cpufeature: Store every ID register with its overrides applied
  arm64: cpufeature: Read MPAMIDR_EL1 in __cpuinfo_store_cpu()
  arm64: cpufeature: Add read_cpuid_with_overrides()
  arm64: cpufeature: Check arm64_ftr_regs[] before the first store
  ...
2026-10-20 07:55:19 -10:00
Arnd Bergmann
b45ebc4a7c RISC-V misc. soc drivers for v7.4
StarFive:
 Syscon bindings and a socinfo driver for the JHB100. There ended up
 being several clock bindings here also because the clock tree needed the
 whole lot due to headers and I envisaged this being part of a three-way
 shared tag between my soc driver branch, dts branch and the clock tree.
 Due to timing, the dts branch didn't get this content, leading to the
 slightly odd branch here.
 
 Microchip:
 A bugfix for teardown code in the mpfs system controller driver.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCas5QFAAKCRB4tDGHoIJi
 0twIAP953FXiPOwXcKKegl8c14YHsV2uH4posbsx3pDZRPiTCgD+IMtnwi9xubd1
 by4JDO6CfRDfiMFBZK3w+JT5FcltcwE=
 =fTb8
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrSVBUACgkQmmx57+YA
 GNmowg//fUu8jBJw6zOpqvIYpV7k99T5PJ5O9yBidyxmmtOk0hnwgfHOMxmMy/YL
 NdCT/bysBlW8zaM40+m8i9tGqov901phSZVj6eqSjs4fh1Cy6aOCcy45avUcJEf2
 9ik0dSt1xkZgJ+YhYx9nqh5+2lFT1D02mTm/zIbj4JjhFtdnSXQRjZY0yDL55mvM
 0Nx1H1p1VAPlbe7edTRZjXnaTO7lQI9zlDhsumsxtT/94TgwczLTtL07eME9Wsdc
 YdLquXZ7MaeNKrrpzZaX4KrfgeCqQOHk8BkXhSloXGUcUGg7bNj1RbdpJP5wv7IC
 GPg/Fr8qxvrvr6Wqxt4cz7uF2514GcWbPLIcnDsRPvChfT/aZHwPJRSzMGYSJj8m
 Qvhdc0inTGjeeQO+hnqkLsM0TNgMOoTMSDhqaMS1pyjbGFCf9pKzW58S8QNSsBsR
 qQqZC+fM74tFWF39L8vGm4LEcM1GBqwFM6fMGShCWaHPSZAQxozkn7HxpmVAuJPh
 Jb+/wEKDk5Z9z3y3eYRUDwy5LUbuucrvaPOl6ILu3Sx9aETk/mg/y6HAEzWIzwwo
 WpLlrd3O9k6aIVywOlafdd0g6GK9qpo59VbiiO+0gqI52KtpbkkeSgk1q2wdQ3gZ
 g5SSiU6p6ZcEcX8TxkrWJjq3qY5CG/pIP3TZoCmlrtYtT3M4BFg=
 =K6rM
 -----END PGP SIGNATURE-----

Merge tag 'riscv-soc-drivers-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers

RISC-V misc. soc drivers for v7.4

StarFive:
Syscon bindings and a socinfo driver for the JHB100. There ended up
being several clock bindings here also because the clock tree needed the
whole lot due to headers and I envisaged this being part of a three-way
shared tag between my soc driver branch, dts branch and the clock tree.
Due to timing, the dts branch didn't get this content, leading to the
slightly odd branch here.

Microchip:
A bugfix for teardown code in the mpfs system controller driver.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-soc-drivers-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  soc: mpfs: use kref cleanup on probe failure
  soc: starfive: Add socinfo driver for JHB100 SoC
  dt-bindings: soc: starfive: Add StarFive JHB100 syscon modules
  dt-bindings: clock: Add StarFive JHB100 Peripheral-3 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 Peripheral-2 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 Peripheral-1 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 Peripheral-0 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 System-2 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 System-1 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 System-0 clock and reset generator

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-16 18:42:57 +02:00
Arnd Bergmann
3e71e98068 FSL SOC Changes for 7.4
Freescale QUICC Engine:
 - Fix sparse warnings in GPIO
 - Drop GPIOD_FLAGS_BIT_NONEXCLUSIVE
 
 Freescale CPM1 Timeslot Assigner:
 - Fix clock leak in tsa_of_parse_tdms()
 
 Data Path I/O:
 - Free the IRQ before releasing the I/O object
 - Fix cleanup on IRQ registration failure
 
 Freescale Management Complex:
 - Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
 - Drop the fwnode links of the dpmacs nodes
 - Register the object drivers after misc_class exists
 - Set dma_mask for the DPRC devices
 - Fix repeated word 'for' in comment
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQTH/wu6mIr0ZW+Vui/dkHAmvKvPUwUCasixSQAKCRDdkHAmvKvP
 U36hAP9gZyTjp74b82uGFk3EmyViEc6iw/KLftHhhAdhxU5bqwEA8GeEIAvUGW2Y
 NikRLKJNyuN/eb8LcMYAYXlGRV/yewQ=
 =zedV
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrOSXMACgkQmmx57+YA
 GNnGiQ//VqQogkRie9tmV4wO1682671AKcPUJVWL5INuL4ZEZm45PU2WG6OFnTBY
 t16LS3ACjFWF4930uM/meGM40qEMIxjn8QBzfzYHypUyjAii2RPt6r1RwgFkQObb
 vPwu7tmmLTjHboLWGmjJImTWCOSm1mRhX3jJ/ZR6NzeaEGM16lbc1DsNnIYMla1/
 06xzmgRZUZ4snTmvetTc1i+kDph5nlDC7OmyYE2umt3Qc8qhV4gysXtVx8R9c187
 wal7pxwtq1Auuv5rTW3G8amFOOUDPX3l+0JorP23dOusnBST61V6WQC28RYzfSOw
 WBkFehix/97zVAE+lxWVigwIelOoVLCKmWCpy3iEHB0vimIq2PtJ6wIXw3ArjkEP
 mO44flpAe5dO4+VeZiihfX5g/0ozdPSk2Ndknol9ePdsoHaKNR0PhkFAJrr4/Fz6
 nFNCDaxdYto/Vt4pEvbdCzXNwjSCP4/fqtbiSj8oek0TJGx8jKQ+98yK17S/O3zS
 3Ar/JIVpCw0RToqdPJ+rBVnMvN2WoX8UW9+BwPQxuSdVNsqQPWSLKx7UzYsRRjbF
 tzAlsNGK2bUzzIiWQlgZ/XNNCoJqyDTP0Oiu32A6BURYvVAS1ctg3oxZBYcMHgW/
 IggcUw1W6WxLeLGvtp7OaUdjV9CsgEfpIGJ8VkE/0xE3RBZc/kU=
 =AvUU
 -----END PGP SIGNATURE-----

Merge tag 'soc_fsl-7.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux into soc/drivers

FSL SOC Changes for 7.4

Freescale QUICC Engine:
- Fix sparse warnings in GPIO
- Drop GPIOD_FLAGS_BIT_NONEXCLUSIVE

Freescale CPM1 Timeslot Assigner:
- Fix clock leak in tsa_of_parse_tdms()

Data Path I/O:
- Free the IRQ before releasing the I/O object
- Fix cleanup on IRQ registration failure

Freescale Management Complex:
- Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
- Drop the fwnode links of the dpmacs nodes
- Register the object drivers after misc_class exists
- Set dma_mask for the DPRC devices
- Fix repeated word 'for' in comment

* tag 'soc_fsl-7.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux:
  soc: fsl: dpio: Free the IRQ before releasing the I/O object
  soc: fsl: dpio: Fix cleanup on IRQ registration failure
  bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
  bus: fsl-mc: drop the fwnode links of the dpmacs nodes
  soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
  soc: fsl: qe: drop GPIOD_FLAGS_BIT_NONEXCLUSIVE
  bus: fsl-mc: register the object drivers after misc_class exists
  bus: fsl-mc: set dma_mask for the DPRC devices
  bus: fsl-mc: fix repeated word 'for' in comment
  soc: fsl: qe: Fix sparse warnings in GPIO

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-13 17:08:33 +02:00
Arnd Bergmann
6b2aacd265 Microchip AT91 SoC updates for v7.4
This update includes:
 - replace __ASSEMBLY__ with __ASSEMBLER__ to avoid confusion
 - use of_machine_device_match() instead of open-coding it
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCasf/xwAKCRCejrg/N2X7
 /b8EAP9CXM18J/eV6Evhyg9FN0z0ol1+PNNPCc7WvzNytfELKQD/Y/qaqWmRKIoh
 0ART3i3D7843g9xrPci5djL0eGK17Aw=
 =Cpyo
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrOSTwACgkQmmx57+YA
 GNn9yA/8C7ttYVFkDxnnENeljwoEBZPY8aMgy39kqIO4b4V+EvQF8XvtL1czpeCs
 tSCxGJ2bOweJc0DLqeok2AwRkthxBTRZ+lWmUD9XwFA0bVtbNHicc4e4sj3KXRny
 YgXo9NQ/fXd6YKyBl1XJr+ExDzJZ4X8t5JEJ8nx84GMptl/rmI8pPAJegzl54KU8
 7cA18nXt6TLh8q836Jmm4fRri/oO4hxTaeVeBvS+CeAt513Wa+2GH1nSBgOsWAVP
 t4jcg28631WI5X82ubeqyYGmRg3HJW8dP8IzbE8SOoCVX4gREkzQSqDF/WHRPbdx
 e8nm0JY6LYxZeR6xgzf93ECF1ZQDjbHod3Xbf2dts1O8/CHf2oP/pZzfyJp1u9lY
 sN7OZQEUVhM1wZswQgNZrFyW4yWRdYozT2aWmoD01eOpdePPHjRRxMfm3gZBvoH3
 7MJouvZu8cnu3AScagrSoop+Pb2rgugX4z3lgMJuToKWXjiJgczsFSbyOsNtykYx
 TOrLOVwTJ5RN/eA9uNMJLYiwBnRtNynmOio1qPw/l2+HaDi+cnn8gtxiqmEq96xY
 zXsx3qViKfq19FdDtB7fUlYY6ut+0efb90bO4sVEm2Z8H9iU5/buJ8sJG71pDFcK
 KYf2b2xORMMCk9kLpCEco1Hyl199f57UNSMB1FtNJThA2CjrV4M=
 =npmh
 -----END PGP SIGNATURE-----

Merge tag 'at91-soc-7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/drivers

Microchip AT91 SoC updates for v7.4

This update includes:
- replace __ASSEMBLY__ with __ASSEMBLER__ to avoid confusion
- use of_machine_device_match() instead of open-coding it

# -----BEGIN PGP SIGNATURE-----
#
# iHUEABYKAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCasf/xwAKCRCejrg/N2X7
# /b8EAP9CXM18J/eV6Evhyg9FN0z0ol1+PNNPCc7WvzNytfELKQD/Y/qaqWmRKIoh
# 0ART3i3D7843g9xrPci5djL0eGK17Aw=
# =Cpyo
# -----END PGP SIGNATURE-----
# gpg: Signature made Do 08 Okt 2026 22:40:39 CEST
# gpg:                using EDDSA key EC67C7AC7AB0B5A66870A8399E8EB83F3765FBFD
# gpg: Can't check signature: No public key

* tag 'at91-soc-7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  soc: atmel: Convert to of_machine_device_match()
  ARM: at91: Replace __ASSEMBLY__ with __ASSEMBLER__
2026-10-13 17:07:40 +02:00
Arnd Bergmann
eaeb993aa8 soc/tegra: Changes for v7.4-rc1
Adds various bits of core Tegra SoC support for Tegra410, Tegra264 and
 Tegra210-B01. Tegra234 can now be woken up via PCIe. Some references
 leak and other fixes round this off.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmrAy+YACgkQ3SOs138+
 s6GwyQ/+JshMOuaBn5Wqs7Of+znucA9sX0WCuRQXX6uSpJY0WRaSbBW3WJOERSEo
 AaftbCRocLOecwdgGROMJEVJ7ZeB6CLsW/51AlbsJN3iquEyLZiuPyikWqe5j8Vm
 ON+OmO7Il8Ob5xpp43G//Y+Xn7aH1AmcQmQVm1FoZws5xZ87n3HtCJ9sYJfJ3YL/
 2ShJQhjSb+qI5MRh6Siw4aDJib4LiiGWZOLx6SoNQLBzQtav1PPdOr6vUlEou0i1
 Itq2wTW0k9puNWErCtuNtyOEqKHsJJ9b4cde0+pVT2TGns+4/aVjNwiBykk0fVDZ
 d8xicfXcGcILKGhyYVyKFv/4dWTS0qDGCeWTHCBiYv6SUWpP//03aIXjv2trupKG
 XjxECZ5GBx6itlse/cXKlcNkWLzm1nQS3KdaIIV6BhX+WdFp/21/ltB+wAn94a75
 ZkhhVJOhVJ/cVkSFzt530Q7Eszm6HGO3L8H7ntM0iegm2jmJiKYn6BN2SfkmdKdG
 +oCgAL2DAi2KinKyfUJ4TRkGUsMEQQuSnQIoQJnNbvwK2WjixDRFOfTMh2PyJKdv
 JVZ80UBk+fX5zBae1Qboq70EiQi70QrJEtPsRK+etIMuHJw14yejPRjAOK0zLE+Z
 rdQPkM8DHRIjoLAbBSDT9VHCS4is3knpOAodOBEl7GiHddCnuvE=
 =/QFQ
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrORmAACgkQmmx57+YA
 GNlI8BAAl94hkUkXJN34go3LILBV/ZsT4ehWPDkO5kgLHEgE/OwSU3wwZoCbJfHa
 DYS18FVTKJaCm8uI5Af7tE6dXrlxk+9YF2/mpJLOkAligdVJzmIMLBOGhvic7aBF
 XgpZXKsw0zWLPFqq7PGjmatp8+8b/vt92OQ4qj7+JxfPwTQNcRDbnTdW32IUrLn7
 eFdZRqlFQVEJ3UtLzd9xE27P/G2Cgi9zYttHIsB3cBtvV6Q2hNQJwLd+juYXjXu9
 EGGsQQNLNX8h4Qq+dUae7ay0yVvox/3VZ0AiZe4DvwRSrkmyWIWw4lwrLhF6mBA7
 KJbTOOwCv8ju9ev3ZggfnL5Mbu5/rvsnMq+uc9j80TbjU0kK79NkiwFnTwHHd0uX
 kt8v5d+XzcHa5lFodkSC9w4bQ2r0ZFHRrmTgCxcwlrJK/fBY8RNbEY9UfdpobseP
 51+WOB179iYZCGcTZyjfzyVWwPrhvPbXs5J0nrsWlwI5fKPKpFacg9ZWSQNhXzSz
 xPdLoDqMlVZoD5fQ9MIFeCR3dz6lc+ZGuynDz2yXeesfbxQ4tXitjUztKANwN+aJ
 E23ohEIOlWw5TrA79g/rA0wtLs1zywdUOGd6QPTWzqdmQwayaFh0my7MylmK7wvQ
 BlUJj8110UakmxJGWpFlRKYNjXRwtcl0VbjnIZjyvPpU0SWmkA4=
 =kWtj
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-7.4-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

soc/tegra: Changes for v7.4-rc1

Adds various bits of core Tegra SoC support for Tegra410, Tegra264 and
Tegra210-B01. Tegra234 can now be woken up via PCIe. Some references
leak and other fixes round this off.

* tag 'tegra-for-7.4-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: flowctrl: Release OF node reference on error
  soc/tegra: pmc: Make sure clk_init_data is fully initialized
  soc/tegra: fuse: speedo-tegra210: Support revision B01
  soc/tegra: fuse: Support revision B01
  soc/tegra: pmc: Add Tegra210B01 support
  soc/tegra: cbb: Fix loggger -> logger typo
  soc/tegra: pmc: Add PCIe wake event for Tegra234
  soc/tegra: fuse: Add Tegra264 support
  soc/tegra: pmc: Add PMC support for Tegra410

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-13 16:55:26 +02:00
Guangshuo Li
6f77194e11 soc: mpfs: use kref cleanup on probe failure
After kref_init(), the device_get_match_data() failure path frees the
mailbox channel and sys_controller directly, bypassing the matching
kref_put() for the initial reference.

Use mpfs_sys_controller_put() on this path so that the initial
reference established by kref_init() is released through the existing
kref release callback.

Rename the error label to reflect that cleanup is now performed
through the kref helper.

This issue was found by manual code inspection.

Fixes: 75ef233975 ("soc: microchip: mpfs-sys-controller: fix resource leak on probe error")
Signed-off-by: Guangshuo Li <lgs201920130244@gmail.com>
Signed-off-by: Conor Dooley <mail@conchuod.ie>
2026-10-13 15:43:15 +01:00
Arnd Bergmann
a5c3d987fc Amlogic drivers for v7.4:
- Clock measure bindings reorg
 - Clock measure support for Amlogic a4/a5/s7/s7d/s6/a9
 - Clock mesure memory optimization
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmrE02QACgkQd9zb2sjI
 SdF49hAAv8gvWozZCv3gAp7MdFilxJJf+R8Z5RmOhX9dWOpiJsRF+Qp50ocnTjG7
 GATPtobFA29qKQnzsZG4mqjWJkKv4GS6wm9KuCzr132RK4JT5BDkn6KTFHslrkLy
 7hsTd6Gkz9XCv1o8FTqh5kEXee8uSe8lkccuBNe6OqjDn6hC0GFdLf7K6V86hqIi
 nOdz6D5Bd+gPGxsR48/+DfqZYqGOD+SXsGS0dcCvPMo7dsV294A61TXgS2yxM4Ec
 S2L3CxGzBHcJW1IFcUb7z8V66Yw14pJW+YUBkT2aYx5Ekm32+aR6we5xdyjfOuiq
 mc/hA1btReJ+hGN00QUDS6Ok1rv5bCk5lJGgMyc9pD4c2EytQM6tl9PGK+ByFI7e
 EAlOv1ZBxKsZ6+DIl6dxJ5Ed2mLK3n4w6MoGyjsWgILYQC99aAsUEDavOPCWjomc
 V10rPyPiqyrAMWhhKL6JhY5/O1YaIRT3JKwHmjpywf0vRioOKqoLA6kYBCaofsH5
 fWhPLv5KMaQloQGAAL1v6FPwfPRSB8U8cku0DCjYNvqQjU+u6d6dDR996F6FaQy/
 VMo9aBt/VjKP82XDLQuj9v8YMn9SFLuJfsvzdGCLGY1EhRHpaZZRQsd52irafQjU
 6WSVUjCCtQrMnKxQgi2GtNAJwd2JCWWtkRRn+Nzb/ppB86MOcno=
 =8rEg
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrOQSsACgkQmmx57+YA
 GNnmQA//aHwM95EhfufMyUwd6AKnP/JVMSqWeO7bE1TWEWp1u0QJPmbiwSyHhDiC
 QNmY/nU5AUytxnYRpr6EkyvKHU8Ri4iIDEw8fLmrBZgNcXXRNU/BigKXu2Y12/76
 rDEjQl7xbqGLn2wEyyDNrTBGHAJRkZx+J94f3DBeV4XxFzTRnWsjhYIH0x6O/e3s
 5XXdaMvtMVNd8CeaUreT32x919lbI7l2CnzTaOBxe/M4/rlzIFryhghlSAX8sADJ
 XcbAq5rDMEMmWGqUBgPP4Yrb61JXR8yhm5lj1/6qg0B5iwBurVacV0ar8zXo9xwj
 VKrplfBhEH4pkSfFvyx8uZmKn21eWcb8bJ4P9icXAyahfQcE/kzw/aDcA2wxehdM
 wxtoqs/7SJYfT+IRtiylGSuRJD7bMOlHeQ/C0WOfv/170J7m6sPvbfApuzA6Jh3D
 +Wm+rGvQCRInFk21udkAd9Oca3q2uac63DLGdTqHBgqdiyVSCQ9Fqlhl5OAf9uNH
 bnXWyu4l2pe7NEOqIPVEJ1duZGAQ9Ut4loZ/7dB30SSlclZwATYyaKPNw+NzZ5xz
 1tONybXPQhfK3LCLuLqZNSlz2Ob0TiCzB3kExS61SuyY4UjztQfU9IC+VJVOzvG0
 13BIUgzfX7vIhYmX9f+xqc0WxtdBuH0ZqXzhjaOKkiLYRqZXCdQ=
 =bISr
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers

Amlogic drivers for v7.4:
- Clock measure bindings reorg
- Clock measure support for Amlogic a4/a5/s7/s7d/s6/a9
- Clock mesure memory optimization

* tag 'amlogic-drivers-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  soc: amlogic: clk-measure: Optimize CLK_MSR_ID to reduce memory usage
  soc: amlogic: clk-measure: Add support for more SoCs
  soc: amlogic: clk-measure: Align compatible entries with DT bindings
  soc: amlogic: clk-measure: Support more measurement channels
  dt-bindings: soc: amlogic: Add clk-measure compatible to support more SoCs
  dt-bindings: soc: amlogic: Reordering compatible of clk-measure

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-13 16:33:12 +02:00
Arnd Bergmann
978a1e99a5 TI SoC driver updates for v7.4
Small cleanup-only pull request for drivers/firmware and drivers/soc/ti.
 It contains no functional changes to SoC behavior and no new features
 
 Firmware:
 - ti_sci: Simplify the buffer pointer allocation by using kzalloc() in place
   of kcalloc()
 - ti_sci: Fix a typo in comments
 
 SoC drivers:
 - k3-ringacc: Correct the ring API kernel-doc and the DMA ring initialization
   kernel-doc so the documentation matches the code
 - knav_qmss: Fix typos in comments
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmrDliQACgkQ3bWEnRc2
 JJ2+rg/9Grj14Z01J17ClvO9IYaN0Vkgc/4Qyu+GjruKN7hsY89Kw8t+tDXjR+Y1
 xr1NX7wzqZPl5E7MjsBUpunH+oeQlWuBxLzhqMSWqZGv+K/KhZPLw/9wsJMEpoxX
 Gk49ye/y+RESqs+TykfVDr8o1+F/IjycrppBdjgqZcLXCsTcKMVMz/XByrgut41H
 Ci6omPYBhgvh3Ru+/FJkBD4D5vw8aBbDb29X/8kMRvGC/ukhbCWtxAUk6iGjfSP8
 04bRb7zveBqAdBo4MulFV3GLE/zjdDAgB1GhDACJP7axk7RGCtpP/mzZW4+mGXfo
 FCbdQPO5dF3pVmmb/02+3Xw6jgzocWSJIdnnypAuJXpJ9J7WNQrmS0GaLVKey0fL
 55x1aNKajVraSI9piI0F0QSx0bddaEsOXeLQ2+/lOC1bQYRnAjJ37c1hfxwgXETx
 JYK0vNAO4paqKfUiRI/Kpn8NQYNTZXwP/7a5FOT8qfRCoRrVcyGPqXS/cMggyLT8
 UhxMSpnyeEB87AxRrJ9C9CEo9h4ELMqxCiTYGj9wSdFR+GClIRgh6ruhTUDXA0GC
 nbisz5htJIWX5+4Y+4B26hxfjdU9Z3cozcRVwUL1j+TetlDjqFjNM5tlAzmgE5j9
 9b/OjDl/qq9u4x5mAe0hyQc/6yzYNfwHSEH2+/cpZH7u+OCDgH8=
 =ugk4
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrOQPIACgkQmmx57+YA
 GNluBQ//SoLQ4EUewZwJaWamL1UaqSIya8GR+JUY3vIxaFIRT43/ORHFhNJ6Mx9d
 eAFhfY58UfWbtr7SR+kNsjzJGZ4oLozD4/r/B1iIdgLxtQpdffp+fdLNz7ukcylj
 z/lYngOLMKw28zc8NF46/7sPsnqgr6ZFJyYHU0LVtN59ySnzxUvezAgPYgcImsRf
 pEuAoKqHQbFCg7ylN1yTqQFbHQcf62qDG2hlsCxIobDQsUnO+vbyP1EmPVVXyIsb
 OuQ360pgNhiKIE3g5IAIG9UNzfhAncdBMl5mnyf/u6IRPov0InRa5hmTRWLA+f+O
 BxYDpdI1OTS45AtjTAsuZqJtGmdSYsqYiqWb2pIy+J4iNss+QJaZEiL4tfmoyMIp
 oMHYZsFuRzNRYt6nU/cKHJDCtJm4KTiiw0bloqv6xEg7mUicdEB0KZvJXgtAEnv/
 VMXRobSbhv0LJVHP0+6G5NT50iTU9zTNfyCpZc877UQd2eFk6AI0WixMsm6DbQ9n
 znbWxc8SXcEEjTiatXPscBNXqRVo1NdCeFosS+t218deCtPB7eRIkYB/bZhTdGly
 +BfhZxj0OEcaAxTG1NvpXo6B7TurLYqw1fs7lDI+sLLFUHeEUoYMp/WsE1qTmJLh
 XRjpvNhDseT2p8/4OtCahpgRoYVxqeeh/y+Sw7j4rkH1sbjBc60=
 =3CoZ
 -----END PGP SIGNATURE-----

Merge tag 'ti-driver-soc-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/drivers

TI SoC driver updates for v7.4

Small cleanup-only pull request for drivers/firmware and drivers/soc/ti.
It contains no functional changes to SoC behavior and no new features

Firmware:
- ti_sci: Simplify the buffer pointer allocation by using kzalloc() in place
  of kcalloc()
- ti_sci: Fix a typo in comments

SoC drivers:
- k3-ringacc: Correct the ring API kernel-doc and the DMA ring initialization
  kernel-doc so the documentation matches the code
- knav_qmss: Fix typos in comments

* tag 'ti-driver-soc-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
  soc: ti: k3-ringacc: Fix DMA ring initialization kernel-doc
  soc: ti: k3-ringacc: Correct ring API kernel-doc
  firmware: ti_sci: replace kcalloc with kzalloc for buffer pointer allocation
  soc: ti: knav_qmss: Fix typos in comments
  firmware: ti_sci: Fix typo "upto" in comments

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-13 16:32:08 +02:00
Arnd Bergmann
ff5091590e Samsung SoC drivers for v7.4
1. First driver patches for Exynos5515.
 2. Fix error paths and possible probe-ordering issue of Exynos PMU
    (Power Management) driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmrDeJ4QHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD17cCD/9WADWX1lHP8/rgLZLFQNtYR2XFrZAA71Yx
 25nlpwBMmcPw6+/dT60gqeCEIIdv3KU+40UtRTbdPa7ZKYlaK1Jktg2zlDOzato+
 /QgjRJ9/fEstNvbbd7B0N6T9WwKa47OreXp4V9nnR3EZPpjgCxPSJ/m0/f2SwWEj
 1WVzlwhdrchoUxVDO/lYGuNI4/jC+xTocMWvROyZbvuIB+lh2LwBUonX2X5YwszF
 q7EYkNCaz6RBmqmRS7P8vUsYcmmGF0INBxBAyQ3Yxsd+0ii7OAi0BY2Gr7q7nQC8
 6DXTIPazXybbkFhVxUfAlrlMcNMhDePHij3fC870WrS/N8RJDzl7B/MhKcu8+HID
 LUvvY7VCZoaVVkG7POwRV/UjhSKcnT0oGlOxojHoeXsNwk//QJiTRIfOWqHsbhrn
 FGl7vL1+o/TZueUJdoLdYXHBqSELj6k0jNeBWzn2iKF+2veoEn23cynI0yOZxj3D
 SpWw5496hd6jTB4O0+jPB5qUrj1JDhNa0eHZSBbIkZTJum140khwSu3/7YFZyJmM
 EdlpBYIiVPWZpZz6cQk2cPBGgasFpB+8Jy/NV0DHSGnrnnp/HI/Hv0KC9aKftfDA
 y/fEMjUqvbK1CiSnHT/S8tmiflhmaaYMrv4mMdinMEz4P9V2j4cnCrx7s1KUnVsG
 luLlZz6j+A==
 =Ydwa
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrOQGAACgkQmmx57+YA
 GNlDZQ//UJmkYMt8NCXd5AjOFMJDdc3jnNNSFrnmmfgmTTh1k8Blt2b22bemSkCy
 fknsoDctX59hncTOrAhNg9T0IMvY2pJAOAoSpEyld95kAqGieID1ZuRF1o7YJr4b
 HsbdWoe/2KpzTx6XCQ1SdEVB+8Sd9K0lzXygSzHw6bWScWx1TzVYh1CHVBDwLCgd
 ggqt+Xnb0K7tXcGUaDRRu3Y+Iu1q4fNM9vUC6fOSeav3d0/mz67chqhW5RrOqBym
 UK9k2d2tUAuN25jmwjiyL3KvRMtC/J5kGDFbA6BzMSXKnTAEWEghzfUI4sVtL5Jq
 Aa5MsvtJLckWiM1LzBddDxrsvxZOUPRwRpqP2c5PD3CnsnwTw6guoxYFo1AjMtVF
 dD+ynaSkHCuaHmHPvVkXk/cyRVdK5nNwU5MPyXvd06MEy5zERbmSdNUBtJO8PXzG
 WBJHDDSuLg4aJXiVY7UuG4+vApwSsK4yRwNLK4h4r3XBd2uePEuFyYB5GvOkZSIv
 3fGOPmDhU7iAZyJtVG3lUYLwXXYcoSkuZ9gjJGKYTmARF2CbP1wt82RzIPoJxQVD
 9kkW+oZLL2Wv8biQaHFnDr6ZHnheRKpD5XOvFlk0iuxjDqQu6S6hzky+B5ghXq8z
 Z/pM43PsUGJnfyfkF6Jvsm8NXA9LFetaQTAeVCq61dnmaUi9smo=
 =dANe
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers

Samsung SoC drivers for v7.4

1. First driver patches for Exynos5515.
2. Fix error paths and possible probe-ordering issue of Exynos PMU
   (Power Management) driver.

* tag 'samsung-drivers-7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: exynos-pmu: order pmu_base_addr before the pmu_context gate
  soc: samsung: exynos-pmu: fix error paths in cpuhotplug/idle states setup
  dt-bindings: sram: Document samsung,exynos850-acpm-sram
  soc: samsung: exynos-chipid: Add Exynos5515 SoC support
  dt-bindings: hwinfo: samsung,exynos-chipid: Add Exynos5515 compatible

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-13 16:29:49 +02:00
Arnd Bergmann
be72934da8 Apple SoC driver updates for 7.4
- Enabled shared GPIO support for ARCH_APPLE which will be used for a
   shared GPIO line for the speaker codecs
 - Add RTKit crashlog support for older 32-bit co-coprocessors used in
   older iPhones and iPads.
 
 Signed-off-by: Sven Peter <sven@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQS3vz815OHsEaWy0u9EEX0kKnUe6QUCasAAqQAKCRBEEX0kKnUe
 6TF7AP9KR1Bt7goSC65qYPNsCSBLATQBgCkUNRH3+7A8on1h/wD/Yemy4j5BVx/v
 rg+Pwfdwe13fyLDCeju3ZgeRzzboCwY=
 =SB+I
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrOQBoACgkQmmx57+YA
 GNmZjQ/+IQCQHx+/EJgXUBI6HWCUfUw4llkKgdh/lGZdz8f1sitmFlxjmjTXRCOo
 k5t348ZZNphsXSGFbkU6TGB6I0eF9k6lB6CuzW7q/rAI0UQFr79tmaVEdFmpdHv5
 OD4UpRMsRg4jm6PpJs+qkzjYbuYFsVZkHyVQRPReG1bl0jHl2poHAsAjz7mxKQjM
 JH9yintRz2PQEHs99SCcF81/Y9k1BJBamo5HFrEtClTFF5wi+Ljf5KkFviTBa5+1
 P0jt88Kbg3Zx9AcGNZCEtH+rLvNrSCfjVJpyDeWJBNncKDdSE63m0rR5eOoxMIAT
 2zOrgzvU2HgVZAyYkPQ2Wir5EVDk+4r3E/UOtMvqMn5W/b4jSMIvbOuF2Exh5NIp
 e1BZMVfl6SXT8elKByLpKXzBIdlbQFq9v7JkP/ePfUjEdvmzmlkRfolyCqZPLdkN
 s781BLnpZaT4NtvvRVWq0RL4o7cUm0O0/2MjjWx/qybFRlknlQ5jUHAOlX4gaREq
 F5yPoRFtQMR0+320IbVb551H6wJg59iIsPO9IfUEg4gXPkd/zVBXJXFr6cYg8u8w
 mM/VXYF9Y46FRPCYCnqqZjhfR2fr6GKzWQiwuHG21/gYB9XoPBqBP0VSF8Ki9+AT
 wLNF5unMQpOiFxPJ1m840ToLxM4k9sxK9NpLDLY8KMDLGhOCXi8=
 =P54I
 -----END PGP SIGNATURE-----

Merge tag 'apple-soc-drivers-7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/drivers

Apple SoC driver updates for 7.4

- Enabled shared GPIO support for ARCH_APPLE which will be used for a
  shared GPIO line for the speaker codecs
- Add RTKit crashlog support for older 32-bit co-coprocessors used in
  older iPhones and iPads.

Signed-off-by: Sven Peter <sven@kernel.org>

* tag 'apple-soc-drivers-7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux:
  soc: apple: rtkit-crashlog: Add support for AArch32 state 'CrgA' section
  soc: apple: rtkit-crashlog: rename 'Crg8' section from regs to aarch64
  arm64: Kconfig: Select HAVE_SHARED_GPIOS for Apple Silicon

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-13 16:28:40 +02:00
Arnd Bergmann
21b58b7b96 Renesas driver updates for v7.4 (take two)
- Select core functionality that will be required for proper operation
     on RZ/G2M v3.0, RZ/G3E, and RZ/V2N.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCar+OWQAKCRCKwlD9ZEnx
 cL4nAP0f/gKlPWzNhWLSa9R7nBJ4LZQ0ZYqFxrksQh6G0TqsKgEA3cCt7Haw6V/h
 sc3McaNTaDyA8BI7S7cL7RSnaBrkqgM=
 =YwF9
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrOP6sACgkQmmx57+YA
 GNlxrg/9FR8fDLeTAtlAgmp0uPJGCVk7WgG6gD+TajNE4t9o1RAMpT90n0BzyfUK
 91e5Xilzfl92dsmqRlsNN1cLo4QGJXbCdZ8ZWeJbwpzlti/NPgAvpDM7Vgc7PTDX
 Yovmc9owkiLa9tlTd/HMqkqrqfr185MpFz96D/oiIu6UEI4FtOTQticmnhYLCvcK
 kpJcSJ5HS+Rqx7ss4DLxC8tQWwluC2VrMl3HSggMah4d9hW22H0LuHFmMyWmQpEx
 MPmvdYQWknNksmIwsTdQ/ypgWToW3Yc3YpycsVmS0y8L+avWZNfvjO1fcSdBZhpj
 Qw7HuvVsPeCe8uuDBMiJtaStVurWEEYPwZpiiAFflBVBxI5zS5MFL8omfJvaDpZD
 GCAj02MopiYWsdASUIgwQ/iWg2hoL3cRuUzPcuPrjVauFASUG9ByfnthL6XG4kls
 bSNqQIB9qNBusdHCPuEbnDIocLACrougkJCXIF3rt3hgnIzatkeizUVG7A64hORo
 WWfp2C0Qy9ADNMh39kZrxtKqy5WiAcAIr4HcVJff2vqikYXCkB3EAcgKqwQYNnQt
 Mb1CCZZ9k4h5s8q3yW1dxOWGUtVGXEhLmzgtMndxyTtFc9OPG73uMAL2MyqWo+fJ
 HETj6d3QuP+b8PfpcfQMZ3u9SOeGSvQ/i49q30Vph5eOMaOsYyg=
 =4Xe2
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v7.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers

Renesas driver updates for v7.4 (take two)

  - Select core functionality that will be required for proper operation
    on RZ/G2M v3.0, RZ/G3E, and RZ/V2N.

* tag 'renesas-drivers-for-v7.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Kconfig: Enable ICU support for RZ/G3E and RZ/V2N
  soc: renesas: Enable SYSC driver for r8a774a3

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-13 16:26:45 +02:00
Arnd Bergmann
e506cdf06e More Qualcomm driver updates for v7.4
Add SM8950 Maili and SM8975 Hawi SoC IDs. Document the Maili CPUCP
 mailbox and PMIC arbiter compatibles.
 
 Allow QSEECOM on the Kalambo CRD, Glymur QCB, and Lenovo ThinkPad T14s
 Gen 7. Reuse Glymur's UBWC configuration for Kalambo, and add the Nord
 LLCC configuration and binding.
 
 Add Shikra SoC and subsystem low-power statistics. Document its
 modem_apps GLINK audio channel. Document MSM8952 SCM and record that
 MSM8952 has no UBWC. Describe IPQ5424 IMEM as mmio-sram and add the
 MSM8960 SPS interrupt-controller syscon compatible.
 
 Fix SCM PAS resource-table retries and handling of empty tables. Use
 sleepable one-time initialization for TZMEM, and correct SCM Kconfig
 selection for non-Qualcomm builds. Disable the SHM bridge on SM7125
 to avoid boot-time RCU stalls.
 
 Fix PMIC GLINK probe ordering and PD charger ULOG removal races. Provide
 I2C Hub serial-engine program-RAM depth without accessing absent DMA
 registers.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCgAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmrNLqUVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FF7sP/RcrMPXMgjYHvqnJW466uiDA71dr
 ntu2CZ7BbAqCFPCyPtfTYjr4V6yOMXIR2T5n9yo+pntNou0+672rUMBifZ2NLZjc
 HBJ8USRXryjVArzNPyyewNLXIrvKKJRQGW+qa/GbQX3DV7MymAh+qPSF8wiN8Q54
 sC/2hAWtqHxS+qX+7MGPrwNCRZtACJ6+LJ8OR9OUJZ+XGeI8BWfHqks30Hx+ipVi
 5Ai/QvbdzzY3dRw6LQMfNyuMFKHR3t6wUR0iht2ZsffmV3/y9xoETxI9e9T/2CjH
 ZzGV1Ic7tYdAASz9YI93yhxJSbw32TFCNcmm3mrsu11urvuZDRq9zot/LFOfT1aK
 7xrewF5bf6nNJK3gYqeYx8DrICgKUPKIjHX7jI0o5SjsPdtWXESYSB5jsOxniI8U
 B90ECyyrLmLzXcQ5GNHCJwnCWPNrzRknaeKTQl0HrFbinI03UH72kp43FHRbr3T9
 wWzRnITOAaGYNX093gCgI5KHgNNGx3pyNLB7BtFEM0842Q9KTxg7J4sSsYhh4r8E
 4PxFmXNLHgxAV62tqGgXFzZyk4JaILUylVrdXwsIpSVX1moTnpbR/5lM6NXj5XFh
 nOItoqSYcamujNCMhlQ0s9dhIzKgHcmFUzrIeJET4bbi4Lh+RA9WVS/z9/4vmWET
 xP/mLJFTecF8aFaA
 =4zSK
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrOPqcACgkQmmx57+YA
 GNk+VhAAovnc9gEAiR8aKESU2TKITnkuIKaQDcHKJtcZERwmd0oB/4R9SZ1zr9b8
 +PLC6/QOltgg2IfkulOJfuAZryQEnfwAZpC9TsefWxNUd61fWJmpmNfqYX7D+Vq7
 bGkm/GLyyKwd2lKeSckODAcDG4HRAcU8Q2LMD1+CtZyY7q8id9HY8pc0Fgm7qLA1
 Q8/8DmOVqqvtmdVC7ZvaDJEYErBg2od5XKN9wUeVK34gBOOm1/8r/9NKh5LNQqf8
 4zSDZWrn4fyys7D8ZdXQ68NtKaJtBEejtxxF0I/mvHo29M0+icRh+e3VybV7P+AY
 ye5jmBcdTLNHiUbzkKtRx1XzmTSYTPL5rrynqjWh4z6LJhFSkvYY6G9J6bJ3496/
 HWTFNxaNNXFlwIPxFu41pD6jkZUxWVBmDy39egxVP5OCcZFv+K9edbyvwPphGFPX
 WFoMKAU86/uKqpIsFqAn5BnT8sU5Ghhal3jacITeQXNMv4gbdUxW/KmOuq2hxWmY
 0vSA69x0nyy5v9ab5BO4Gm177rMNVEiA/4jtJUORpk35dRGD723ilu6+7ER0MLqO
 k+/Fxve6JV6jIOF0MTXcXQzIjjEvM8kuU8FiApy7hLlbDpqNBe1iQw6cjllM9IgP
 U+QjWFT5C8x2D4I5xQ7HbCOunzOk3bdT3IkGz1503O/etEp8ioE=
 =rznJ
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-7.4-3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

More Qualcomm driver updates for v7.4

Add SM8950 Maili and SM8975 Hawi SoC IDs. Document the Maili CPUCP
mailbox and PMIC arbiter compatibles.

Allow QSEECOM on the Kalambo CRD, Glymur QCB, and Lenovo ThinkPad T14s
Gen 7. Reuse Glymur's UBWC configuration for Kalambo, and add the Nord
LLCC configuration and binding.

Add Shikra SoC and subsystem low-power statistics. Document its
modem_apps GLINK audio channel. Document MSM8952 SCM and record that
MSM8952 has no UBWC. Describe IPQ5424 IMEM as mmio-sram and add the
MSM8960 SPS interrupt-controller syscon compatible.

Fix SCM PAS resource-table retries and handling of empty tables. Use
sleepable one-time initialization for TZMEM, and correct SCM Kconfig
selection for non-Qualcomm builds. Disable the SHM bridge on SM7125
to avoid boot-time RCU stalls.

Fix PMIC GLINK probe ordering and PD charger ULOG removal races. Provide
I2C Hub serial-engine program-RAM depth without accessing absent DMA
registers.

* tag 'qcom-drivers-for-7.4-3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (31 commits)
  soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
  firmware: qcom: scm: Allow QSEECOM on ThinkPad T14s Gen 7
  dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller
  dt-bindings: spmi: glymur-spmi-pmic-arb: Add compatible for Qualcomm Maili SoC
  soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
  ASoC: dt-bindings: qcom,apr: Add modem_apps GLINK channel for shikra
  firmware: qcom: tzmem: disable SHM bridge for SM7125 platform
  soc: qcom: ubwc: Add Kalambo UBWC config
  firmware: qcom: scm: Allow QSEECOM on Kalambo CRD
  firmware: qcom: scm: Allow QSEECOM on the Glymur QCB
  soc: qcom: stats: Add stats compatible and config for Shikra
  dt-bindings: soc: qcom: stats: Add compatible for Shikra
  soc: qcom: fix typo "upto" in comment
  firmware: qcom: fix typo "uninterruptable" in comment
  soc: qcom: socinfo: Add SM8950 SoC ID
  dt-bindings: arm: qcom,ids: Add SoC ID for SM8950
  soc: qcom: geni-se: provide PROG_RAM_DEPTH for I2C HUB Serial Engines
  dt-bindings: mfd: syscon: add qcom,msm8960-sps-sic
  firmware: qcom: scm: Hide QCOM_SCM instead of depending on ARCH_QCOM
  soc: qcom: llcc: Add LLCC configuration for Nord
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-13 16:22:29 +02:00
Arnd Bergmann
3780804272 Qualcomm driver updates for v7.4 (second attempt)
Add UBWC 7.0 configuration for Hawi and Maili, and reuse Glymur's UBWC
 configuration for Nord.
 
 Parse Glymur's DDR information from SMEM, including its frequency plan and
 highest bank bit. Correct DDR frequency overflow and byte order, and handle
 unrecognized DDR layouts correctly.
 
 Configure dedicated LLCC slices for the IPQ5424 PPE and Wi-Fi datapaths,
 adjust the CPU slice, and propagate errors from optional IRQ lookup.
 
 Allow the GENI serial-engine driver to be selected on 32-bit Qualcomm SoCs
 such as Kuno. Fix firmware loading bounds, endianness, and writes to
 read-only firmware.
 
 Allow QSEECOM on the Glymur-based HP EliteBook X G2q 14 AI, Lenovo Yoga
 Slim 7x Gen11, and Asus Zenbook A14 (UX3407NA), enabling EFI variable
 access on the HP and Asus laptops. Release SCM reserved memory on probe
 failure or unbind, and limit Qualcomm firmware Kconfig options to Qualcomm
 platforms.
 
 Defer PMIC GLINK altmode work until devices resume to avoid accessing
 suspended I2C controllers.
 
 Fix cleanup of failed APR service registrations to prevent stale lookups,
 and remove unused APR device-ID matching.
 
 Add the SM7250 SoC ID, correct SMSM and SMP2P I/O annotations, and clean
 up RPMh kernel-doc and redundant IRQ error messages.
 
 Document the Kuno SCM interface, Shikra CTCU fallback, and Milos CPU
 bandwidth monitor. Add Abel Vesa as a Qualcomm SoC reviewer.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCgAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmrJ6ckVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fh6MQAKZr+FrRPfUfY7xK9DX2HX/Qkr2w
 JJJJ8ghiffkBvfBWexoZSIpXfCcPjoKIyqltOVtGnaC/+MzupOYG3PYMgePxVA1s
 XomAViwUUsRyMK5wTIsoI/hskYTuDcxalHvzMGmJ2InpDl/qz9oZkHL/PgVSLOO4
 IHYV1qTWEbaa/7H+otTzOY+n7n7YgCApmuzuHZi4wd15NLj6YntBLKYmxMLVlebi
 nh2Y4RNPI9XALofSK8SAE8udxUK5zpa/+hDpZ6Aa/tgM8Pgf6rCnrQarFtNm3qHW
 R8w5yxpOc9/6oVSXIgdVSs6yqjIS0yri3uySlthQFht+ZeqG9sifz2H1lx2hltKF
 4YoanwZbudrAgTg8tpvVx4PfXNSLqrYrNGHUNo5wwlVu/dlllZuu2pVSu6sc3Jhx
 3mi8QquhMdDl1jORxdT9sV65AK2aIyoXMJrvg40LEk3CDHtnnhc5EFghMe3JVPwO
 LVqQzGsaqSNJcs29ythN3RgjhdwQkih84VbqVfqbyL5l3halDsc0yVS4OJmr8hhh
 K6nJqr+bBVT/FF8vWL4Kluk3v/w7O80NhOLQjAbpSriScww+FBn9kaKGEwi4Ywi2
 pWG1/tLjrOt2eVMuDAsUvLkDjj6Qwp+TFjkrr4DQbZYPlbxkcTliZP5R86ZCiSgb
 cF19q4GGok+sRWNp
 =ejUm
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrOPlQACgkQmmx57+YA
 GNndKg//bdKS/0hex1kiKzm0Ezzw578ifGkIm2AquhyfjKuPpA+bQkNvdPbhhgaY
 IGaadnpi8vqT6T1Rl5SHixiKmmZqB3c2OyEBQPSdXZXtEh/oCrwLOQgyDkBegwab
 K84whGgNNvna5pdxKyFFsrPgQityx9rlMnbUgqYzBRgZ9c7oA5J78JTHhVruBJoR
 0N04Y40qTQ9C2NB6FuoepGrVbX/lcog+QzRsNKdm/EJyt0XSI1czaxHr1HNIgKJt
 EW4u0fPjkrvwG84WtgoRJO0KaGqX9OIpzTbDXRhW8jB3vHQiRSmGk7hfVYwv33FZ
 PpyFG4Fg/MOntbSO0SNsWwvvugvE1XhpruJrZSfkh9tiDPQpS9JyoPqoQY/TsgEP
 DydiIMeVinzUUqrXBhV9M8hVLVgcQHTKd5pzkoROS8vMyAZ6qRwto4MxOrMuIkoU
 fy9vJRyTp4Nipg95cZ7luJnuaNz2Pch7CpUhP710bU5okEydTIQc094sHb4uqVH7
 8MdrNt7jF1aji4OaFTjIGG9bqTHhP3EJ0wkhni87y0jzQH5a+IWEVedYLyitHGb5
 P9PmVtwnCMwWApm+EriNEfMcZT6bJei0kuWWjlfaU3ST3GT+tU5lSy0WbHTfSMH2
 qsUJ48VXdUEmnKNkubtGB/XBYBF5kDBJrmXLbRMmCE8MbISnmQA=
 =hOZ6
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-7.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v7.4 (second attempt)

Add UBWC 7.0 configuration for Hawi and Maili, and reuse Glymur's UBWC
configuration for Nord.

Parse Glymur's DDR information from SMEM, including its frequency plan and
highest bank bit. Correct DDR frequency overflow and byte order, and handle
unrecognized DDR layouts correctly.

Configure dedicated LLCC slices for the IPQ5424 PPE and Wi-Fi datapaths,
adjust the CPU slice, and propagate errors from optional IRQ lookup.

Allow the GENI serial-engine driver to be selected on 32-bit Qualcomm SoCs
such as Kuno. Fix firmware loading bounds, endianness, and writes to
read-only firmware.

Allow QSEECOM on the Glymur-based HP EliteBook X G2q 14 AI, Lenovo Yoga
Slim 7x Gen11, and Asus Zenbook A14 (UX3407NA), enabling EFI variable
access on the HP and Asus laptops. Release SCM reserved memory on probe
failure or unbind, and limit Qualcomm firmware Kconfig options to Qualcomm
platforms.

Defer PMIC GLINK altmode work until devices resume to avoid accessing
suspended I2C controllers.

Fix cleanup of failed APR service registrations to prevent stale lookups,
and remove unused APR device-ID matching.

Add the SM7250 SoC ID, correct SMSM and SMP2P I/O annotations, and clean
up RPMh kernel-doc and redundant IRQ error messages.

Document the Kuno SCM interface, Shikra CTCU fallback, and Milos CPU
bandwidth monitor. Add Abel Vesa as a Qualcomm SoC reviewer.

* tag 'qcom-drivers-for-7.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (34 commits)
  firmware: qcom: scm: Allow QSEECOM on Asus Zenbook A14 (UX3407NA)
  firmware: qcom: scm: Allow QSEECOM on Yoga Slim 7x Gen11
  MAINTAINERS: add Abel as reviewer for linux-arm-msm
  soc: qcom: ubwcg: Add Nord UBWC config
  firmware: QCOM interfaces should depend on ARCH_QCOM
  firmware: qcom: scm: Use devm_of_reserved_mem_device_init()
  soc: qcom: smp2p: fix __iomem annotation on entry->value pointer
  soc: qcom: apr: clean up failed service registrations
  soc: qcom: smem: Fix signedness bug in smem_dram_parse()
  soc: qcom: ubwc: Add configuration for Maili
  soc: qcom: ubwc: Add configuration for Hawi
  soc: qcom: rpmh-rsc: fix kernel-doc issues in rpmh-rsc.c
  soc: qcom: rpmh: fix kernel-doc issues in rpmh.c
  soc: qcom: rpmh-internal: fix kernel-doc issues in rpmh-internal.h
  soc: qcom: pmic_glink: Fix device access from worker during suspend
  soc: qcom: llcc-qcom: Handle errors from optional IRQ lookup
  soc: qcom: geni-se: Fix write to read-only firmware buffer
  soc: qcom: geni-se: Fix fw_end computed before round-up; propagate size to caller
  soc: qcom: geni-se: Widen fw_size to u32 to prevent wrap-around
  soc: qcom: geni-se: Fix endian conversion for serial_protocol comparison
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-13 16:21:05 +02:00
Arnd Bergmann
d610d871b1 soc/tegra: Fixes for v7.3
This contains two minor fixes for a missing newline in an error message
 and an uninitialized clock rate used during suspend.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmrAz58ACgkQ3SOs138+
 s6FQnBAAqGcuCCWwfEb78osasuda9JsHtvj44rO6Iq8lwUxZO5fP9D1/VgIjzrOa
 LBCEyP93UfJiyeJ/2doLynW+g9zsStfCnJ41tnzZGrbLIZ7hKX+xl0+rM4HTgnRY
 v2LSNiblLtuOTJ94x0gEMU5s+R89ws5a/wjVuEAuxq4Udz25xxVhF6+oun+WAyo0
 q1F7Q/7e8FRS5e/aqfEurC255FKkULrRO9J7oHc/108bdE3hMhYI8qBkaFMCb8y/
 ovjCRP7PR+FCElXNsHE8RC54P4EGeE2wHkNGil7gPMh/roHvtyqyaajddNrznjun
 hDELz0HAOHLtI8SV2vXjsyiTROK9jpKwc/s1qrosg74t20bWcdVQ9VA/syjEAb9Y
 SoueqRJaiJk59s9L1stGaWxP7O0Y9ocu9IBn3kDbyzLxtxT29/ZnDP1WCPrgcQ4A
 LKFysA5EYZUMo1EUqh/F/aHygT6clEPG6fP9Tm3HVQRuRYbeozF9ogDEL4iEJccf
 5Z9hIlXfdHpzCKywwXzg3RFhCtzpoJ45sNHb+ts6BSk4+/yhL3Bulk7aDpaidV2b
 FQ//RgqtGCHRJoFu61wa+auDib3YmdfL1PJk2U3yGlRRwjUm7kSeD/4RwqtOGuCD
 QnJ/cj4wkWelU17OJDyHuGyK2SUEIb/Vc3eYVRG6Ie9grYmJalY=
 =+gD/
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmrMiYkACgkQmmx57+YA
 GNmmsRAAw8fAgrUeZwz368Vds64A7vmNg3pw2+rwKeWs/4o7XqlPyH8HKqKGsqwz
 Nc/tmkVLMcO0Dlyc79WP0/WptNZ9m15voSWhDP7uDTaW1ZrAqE/b3jboNfFv1o4Q
 HWw13McAqYePe3H3rk+j7jFYMlHMdIvH1QudXrJXXg0asESv+gqOalk+aOPNk3cL
 oz1XpJzU2IhUJWLv8oBVLdA7l204PpF55sA8mcmLaTJRwheOHvhYB+jgDqmIjp4l
 cATI3LnALGeZlZ6XtsnIzhST7hlAjuUStLTQRF0m3gnNRuZaKZBUEm3ZOHmcj2ax
 lId9rcICPQfRelr527L+3eIbn2DQ8lGJoNiV/Mo6WgCWK/2y6Exd14NVpqZOSfNf
 mDcUN9lQ4eyO0b24X0BEluJXqamQcJ7GaZLxhOPrAcR42VZETUpn1Xq2kC4azJyd
 aBOVCf/eRwttSZzbAMxHmck6IDWK0kqpt6Jw+jDxT7MwZxvs6MzTLq6K6fKStByU
 DMA2kRc7L3dYEPnIBETYkb217sNbVqdzerWFEMLL7ieeWLVktv3FSJS4/oaPVCoI
 eHIBdxlC/el5kShLDQyA30a7fjftpDsvHl9DKcH9EGjzVGWiy9BLfJv1rzvaGgOo
 5rOe8PLjLNR6X61Stn7VdRwNXb4OV8Fjjdupy+EEkktqzam/D6k=
 =3JiU
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-7.3-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes

soc/tegra: Fixes for v7.3

This contains two minor fixes for a missing newline in an error message
and an uninitialized clock rate used during suspend.

* tag 'tegra-for-7.3-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Fix uninitialised clock rate
  soc/tegra: fuse: Add missing newline to APBMISC error message

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-12 09:17:28 +02:00
Myeonghun Pak
a7831c657c soc: fsl: dpio: Free the IRQ before releasing the I/O object
The DPIO interrupt handler accesses priv->io, but dpaa2_dpio_remove()
releases that object before tearing down the interrupts. The IRQ was
requested with devm_request_irq(), and unregister_dpio_irq_handlers()
only clears its affinity hint. fsl_mc_free_irqs() returns IRQ resources
to the MC resource pool without freeing the handler. An interrupt can
therefore access the freed I/O object before devres releases the IRQ.

Explicitly free the managed IRQ in unregister_dpio_irq_handlers() before
returning its resource to the pool, and perform IRQ teardown before
releasing the I/O object. This also waits for an in-flight handler while
the object is still valid.

This issue was identified during our ongoing static-analysis research
while reviewing kernel code.

Fixes: 993fec7e11 ("bus: fsl-mc: dpio: add the DPAA2 DPIO object driver")
Cc: stable@vger.kernel.org
Assisted-by: LLM
Co-developed-by: Ijae Kim <ae878000@gmail.com>
Signed-off-by: Ijae Kim <ae878000@gmail.com>
Signed-off-by: Myeonghun Pak <mhun512@gmail.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Link: https://lore.kernel.org/r/20261002194802.375497-3-mhun512@gmail.com
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-10-09 10:15:19 +02:00
Myeonghun Pak
45ecea8c55 soc: fsl: dpio: Fix cleanup on IRQ registration failure
IRQ registration happens after dpaa2_io_create(), but its failure path
only releases the IRQ resources and the MC portal. The I/O object stays
allocated and published in the service list and per-CPU lookup table,
while devres unmaps its portal registers after probe fails.

Call dpaa2_io_down() on IRQ registration failure to remove the object
from those lookup structures and free it. Reorder the error labels so
that a failed dpaa2_io_create() still skips this cleanup.

Remove unregister_dpio_irq_handlers() from the probe error path, since
no IRQ handler or affinity hint has been installed when registration
fails.

This issue was identified during our ongoing static-analysis research
while reviewing kernel code.

Fixes: fe8fe7723a ("soc: fsl: dpio: register dpio irq handlers after dpio create")
Cc: stable@vger.kernel.org
Assisted-by: LLM
Co-developed-by: Ijae Kim <ae878000@gmail.com>
Signed-off-by: Ijae Kim <ae878000@gmail.com>
Signed-off-by: Myeonghun Pak <mhun512@gmail.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Link: https://lore.kernel.org/r/20261002194802.375497-2-mhun512@gmail.com
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-10-09 10:15:19 +02:00
Wentao Liang
46201d760c soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
The error cleanup loop puts l1rsync_clk and l1rclk_clk a second time
and never puts l1tsync_clk or l1tclk_clk, because the branches that
guard the transmit clocks use the receive clock field names.

Use the matching field in each branch so every clock acquired by
tsa_of_parse_tdms() is released exactly once.

Fixes: 1d4ba0b81c ("soc: fsl: cpm1: Add support for TSA")
Cc: stable@vger.kernel.org
Signed-off-by: Wentao Liang <vulab@iscas.ac.cn>
Reviewed-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20260917152719.2160395-1-vulab@iscas.ac.cn
[chleroy: Fixed the same in tsa_remove()]
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-10-09 10:11:02 +02:00
Somesh Dey
f44ee24f4a soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
geni_icc_get() takes an icc_ddr string argument but never uses it: the
DDR interconnect path is looked up with the "qup-memory" string literal
directly, and the sole caller passes that same literal. The parameter
carries no information.

Drop the icc_ddr parameter and update the prototype and call site
accordingly.

Signed-off-by: Somesh Dey <somesh.dey@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20260930-icc-ddr-param-remove-v1-1-61223714c9bc@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:45 +02:00
Yibo Tan
66894a1c51 soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
pmic_pdcharger_ulog_rpmsg_remove() cancels the delayed worker while the
RPMsg endpoint can still deliver callbacks. The RPMsg core invokes the
driver remove callback before destroying the endpoint, so a response
callback can run after cancel_delayed_work_sync() returns and queue the
worker again.

Device cleanup then frees the devm-allocated pmic_pdcharger_ulog while the
requeued delayed work still embeds and dereferences that object. KASAN
reports a slab-use-after-free in pmic_pdcharger_ulog_work().

Use disable_delayed_work_sync() to drain the worker and reject queue
attempts that race with removal.

The issue was reproduced in four of four runs with the real target driver,
RPMsg bus removal, endpoint teardown, workqueue code and devres cleanup.
The test provider delivered a valid response in the window between the
driver remove callback and endpoint destruction. With this change, the
same late callback occurred in four of four runs without a KASAN report,
warning, Oops or panic.

The reproducer uses a test RPMsg provider to control the teardown timing.
No unprivileged trigger or physical Qualcomm-device result is claimed.

Fixes: 086fdb48bc ("soc: qcom: add ADSP PDCharger ULOG driver")
Assisted-by: Codex:GPT-5
Signed-off-by: Yibo Tan <lhfff@tju.edu.cn>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260912161210.1683266-1-lhfff@tju.edu.cn
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:45 +02:00
Gopikrishna Garmidi
1337776a53 soc: qcom: ubwc: Add Kalambo UBWC config
Qualcomm Kalambo is a derivative of the Mahua SoC and shares the same
Universal Bandwidth Compression (UBWC) configuration. Add the Kalambo
compatible to the UBWC configuration table to enable support.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com>
Link: https://patch.msgid.link/20260909-b4-kalambo-crd-v7-5-f5685804478a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:45 +02:00
Sneh Mankad
c98d40a52c soc: qcom: stats: Add stats compatible and config for Shikra
SoC LPM stats are present in RPM MSGRAM and subsystem LPM stats are
present in SMEM for Shikra.

For earlier targets using RPM processor like msm8974, rpm_master_stat.c was
used for subsystem LPM stats since those stats were populated in RPM
MSGRAM.

Here is a brief summary of previous targets and their stats configuration,
along with the drivers used to display them.

+---------------|----------------------------|---------------------------+
| SoC           | subsystem LPM stats        | SoC LPM stats             |
|---------------|----------------------------|---------------------------|
| msm8974,      | RPM processor MSGRAM       | RPM processor MSGRAM      |
| msm8226       | (rpm_master_stat.c)        | (qcom_stats.c)            |
|---------------|----------------------------|---------------------------|
| sm6350,       | SMEM (DDR)                 | AOP processor MSGRAM      |
| sdm845, etc.  | (qcom_stats.c)             | (qcom_stats.c)            |
|---------------|----------------------------|---------------------------|
| Shikra        | SMEM (DDR)                 | RPM processor MSGRAM      |
|               | (qcom_stats.c)             | (qcom_stats.c)            |
+---------------|----------------------------|---------------------------+

qcom_stats.c supports both the configurations for shikra, reading subsystem
LPM stats from SMEM and reading SoC LPM stats from RPM MSGRAM.

A generic "qcom,rpm-stats" compatible only reads SoC LPM stats like vmin
and vlow. Add shikra rpm compatible and config to read subsystem LPM
stats too along with SoC LPM stats.

Below is an example showing LPM stats for "apss" subsystem with this
change:

cat /sys/kernel/debug/qcom_stats/apss
Count: 2192
Last Entered At: 5498618336
Last Exited At: 5498708046
Accumulated Duration: 2046572620.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Reviewed-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260907-shikra_stats-v4-2-3825351f9740@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:45 +02:00
Hemanth Selam
d2bcd688b7 soc: qcom: fix typo "upto" in comment
Correct "upto" to "up to", reported by scripts/checkpatch.pl using the
misspelling list in scripts/spelling.txt.  Only touches comments, no code
changes.

Assisted-by: Cursor:claude-opus-5
Signed-off-by: Hemanth Selam <hemanth.selam@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20260907061742.10954-3-hemanth.selam@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:45 +02:00
Jingyi Wang
5ce6f7de57 soc: qcom: socinfo: Add SM8950 SoC ID
Add SoC ID for Qualcomm SM8950 which represents the Maili platform.

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Link: https://patch.msgid.link/20260922-maili-socinfo-v1-2-a82bd7d4ca77@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:44 +02:00
Neil Armstrong
803f9950a6 soc: qcom: geni-se: provide PROG_RAM_DEPTH for I2C HUB Serial Engines
The I2C Hub serial elements lacks DMA, so the SE_HW_PARAM_2 register which
is in the DMA register space doesn't exist for those instances.

Provide the ram depth in the compatible data to be used instead
of the reading the missing SE_HW_PARAM_2 register.

Fixes: 522bfb4f33 ("soc: qcom: geni-se: Use HW PROG_RAM_DEPTH to validate firmware size")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260923-topic-sm8x50-i2c-hub-fw-ram-v3-1-44287b4e814b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:44 +02:00
Anurag Pateriya
c3a652c41a soc: qcom: llcc: Add LLCC configuration for Nord
Add the sub-cache table for Nord, derived from the Nord AU (Safe IVI)
SCT table and limited to the POR use cases that have a unique SCID and a
usecase ID in llcc-qcom.h. Nord has the CFG0/CFG1 pairs and the full
ALGO_ALLOC0..3 set, so it uses the v6 register offsets.

num_banks is set explicitly because LLCC_LB_CNT in LLCC_COMMON_STATUS0
is four bits wide and cannot report sixteen banks; a wrong count makes
the driver map a bank aperture in place of the broadcast region and abort
on the first broadcast read. no_edac is set because the bootloader
leaves the LLCC EDAC registers locked, as on Glymur.

Signed-off-by: Anurag Pateriya <anurag.pateriya@oss.qualcomm.com>
Tested-by: Zhangfei Gao <zhangfei.gao@oss.qualcomm.com>
Reviewed-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20260910-nord_llcc-v1-2-30fd1cca65fe@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
2026-10-05 09:10:44 +02:00
Konrad Dybcio
0c79a829af soc: qcom: pmic_glink: Avoid losing early rpmsg probe
The PMIC GLINK rpmsg device can appear before the platform device has
finished probing. In that case pmic_glink_rpmsg_probe() sees
__pmic_glink as NULL and returns -ENODEV, which is treated as a fatal
probe failure for the rpmsg endpoint.

If this race is hit, pg->ept is never installed and PMIC GLINK clients
never receive the service-up notification. This may leave the system
with no Type-C functionality and without battery/power supply
management.

Return -EPROBE_DEFER when the rpmsg endpoint arrives before the platform
device is ready.

Fixes: 58ef4ece1e ("soc: qcom: pmic_glink: Introduce base PMIC GLINK driver")
Assisted-by: Codex:GPT-5.5
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://patch.msgid.link/20260720-topic-pmic_glink_defer-v1-1-94c0f233f2f7@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
2026-10-05 09:10:44 +02:00
Peng Fan
1cd31ba4f9 soc: qcom: use assign_bit() where applicable
Convert open-coded if/else with set_bit/clear_bit and their
non-atomic __set_bit/__clear_bit variants to the assign_bit/__assign_bit
API.

Done with Coccinelle semantic patch:
    // set_bit -> clear_bit => assign_bit

    @@
    expression cond, bit, addr;
    @@

    -if (cond)
    -        set_bit(bit, addr);
    -else
    -        clear_bit(bit, addr);
    +assign_bit(bit, addr, cond);

    // clear_bit -> set_bit => assign_bit

    @@
    expression cond, bit, addr;
    @@

    -if (cond)
    -        clear_bit(bit, addr);
    -else
    -        set_bit(bit, addr);
    +assign_bit(bit, addr, !cond);

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260918141833.3023124-1-peng.fan@oss.nxp.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
2026-10-05 09:10:44 +02:00
Muzaffer Kadir
012cfa8037 soc: qcom: ubwc: Add UBWC config for MSM8952
MSM8952 uses Adreno 405 and predates ubwc just like MSM8939.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Muzaffer Kadir <muzafferkadir@mainlining.org>
Link: https://patch.msgid.link/20260921-msm8952-initial-support-v3-14-b96fd3fe298b@mainlining.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
2026-10-05 09:10:44 +02:00
Mukesh Ojha
06bf7462ed soc: qcom: socinfo: Add SM8975 SoC ID
Add SoC ID for Qualcomm SM8975 which represents the Hawi platform.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Link: https://patch.msgid.link/20260923-hawi-socinfo-v1-2-f0d1aaee9323@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
2026-10-05 09:10:44 +02:00
Gourav Kumar
3ae4bd9cdc soc: qcom: ubwcg: Add Nord UBWC config
Map qcom,nord to glymur_data in qcom_ubwc_configs[], since Nord shares
Glymur's UBWC capabilities.

Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260903014309.314962-1-shengchao.guo@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:43 +02:00
Ben Dooks
7cabc842d0 soc: qcom: smp2p: fix __iomem annotation on entry->value pointer
The entry->value is passed to readl() so should be marked __iomem
so remove these sparse warnings by marking it __iomem and do the
relevant casting to ensure no further warnings:

drivers/soc/qcom/smp2p.c:280:64: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:280:64:    expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:280:64:    got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:318:34: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:318:34:    expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:318:34:    got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:446:26: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:446:26:    expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:446:26:    got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:501:33: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:501:33:    expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:501:33:    got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:504:26: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/qcom/smp2p.c:504:26:    expected void volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:504:26:    got unsigned int [usertype] *value

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Link: https://lore.kernel.org/r/20260623085931.589735-1-ben.dooks@codethink.co.uk
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:43 +02:00
Hongyan Xu
bb5c846a74 soc: qcom: apr: clean up failed service registrations
apr_add_device() publishes a service in svcs_idr before parsing the
optional protection domain and registering the device. If device
registration fails, put_device() frees the apr_device while its service
remains in the IDR. A received packet can then dereference that stale
entry. The property error path also leaves the service and allocation
behind.

Split device_register() into device_initialize() and device_add() so every
pre-registration error can safely drop the device reference. Remove the
service from the IDR on all failures after publication, then drain the RX
workqueue before dropping the device reference. This prevents an in-flight
lookup from outliving the device.

Fixes: 6adba21eb4 ("soc: qcom: Add APR bus driver")
Signed-off-by: Hongyan Xu <getshell@seu.edu.cn>
Link: https://lore.kernel.org/r/20260806060541.820-1-getshell@seu.edu.cn
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:43 +02:00
Dan Carpenter
f3c95a76d2 soc: qcom: smem: Fix signedness bug in smem_dram_parse()
The "ver" variable is type "enum ddr_info_version".  Enum types are
dependent on the compiler but in practical terms here, "ver" is
basically an unsigned int.  It needs to be signed for the -EINVAL
to be handled correctly.

Fixes: 1d234eeafc ("soc: qcom: smem: Expose DDR data from SMEM")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/an1toQ-acGR0kOWj@stanley.mountain
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:43 +02:00
Wangao Wang
77a717ae0e soc: qcom: ubwc: Add configuration for Maili
Describe the Universal Bandwidth Compression (UBWC) configuration
for the Maili platform. Maili reuses the hawi UBWC configuration.

Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260812-ubwc_for_hawi_maili-v1-2-c29edecb3bd8@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:43 +02:00
Wangao Wang
5909d98ef5 soc: qcom: ubwc: Add configuration for Hawi
Add UBWC configuration data for the Hawi platform, which uses UBWC 7.0
and enables the required flags and highest bank bit settings.

This allows drivers to query the correct UBWC capabilities on Hawi.

Also add UBWC 7.0 support to the version tag helper so that
qcom_ubwc_version_tag() returns the correct tag for UBWC 7.0.

Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260812-ubwc_for_hawi_maili-v1-1-c29edecb3bd8@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:43 +02:00
Maulik Shah
8f206c85f3 soc: qcom: rpmh-rsc: fix kernel-doc issues in rpmh-rsc.c
Two documentation issues in rpmh-rsc.c:

- rpmh_rsc_pd_callback() has a copy-paste title 'Check if any of
  the AMCs are busy' which describes rpmh_rsc_ctrlr_is_busy() not
  this function. Fix the title to accurately describe what this
  callback does: flush sleep/wake TCS data on PM domain power-off.

- rpmh_rsc_cpu_pm_callback() has the same copy-paste title 'Check
  if any of the AMCs are busy'. Fix the title to accurately describe
  what this callback does: flush sleep/wake TCS data when all CPUs
  enter power down.

No functional impact.

Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-3-0f5026293d9a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:43 +02:00
Maulik Shah
5e1fccb482 soc: qcom: rpmh: fix kernel-doc issues in rpmh.c
Six documentation issues in rpmh.c:

- struct batch_cache_req has a typo in its title: 'batch catch'
  should be 'batch cache'. Fix it.

- __rpmh_write(), rpmh_write_async(), rpmh_write(), rpmh_write_batch()
  and rpmh_invalidate() use 'name: title' format instead of the
  'name() - title' format documented in
  Documentation/doc-guide/kernel-doc.rst. Fix all of them.

- rpmh_tx_done() has no kernel-doc comment. Add one describing its
  purpose as the RSC driver callback for active-only transfer
  completion.

- __rpmh_write(), rpmh_write_async(), rpmh_write() and
  rpmh_write_batch() are missing Return: tags. Add them.

- struct cache_req uses 'struct name:' format instead of the
  'struct name -' format documented in
  Documentation/doc-guide/kernel-doc.rst. Fix it.

- rpmh_write_batch() has an inaccurate description: it says requests
  are sent 'without caching' and that SLEEP/WAKE_ONLY requests are
  sent as fire-and-forget. In reality, SLEEP/WAKE_ONLY requests are
  cached in batch_cache and returned immediately; they are only sent
  to the controller later by rpmh_flush(). Fix the description.

No functional impact.

Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-2-0f5026293d9a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:43 +02:00
Maulik Shah
b2370c0f89 soc: qcom: rpmh-internal: fix kernel-doc issues in rpmh-internal.h
kernel-doc emits two warnings for rpmh-internal.h:

  Warning: drivers/soc/qcom/rpmh-internal.h:136 struct member 'ver' not described in 'rsc_drv'
  Warning: drivers/soc/qcom/rpmh-internal.h:136 struct member 'regs' not described in 'rsc_drv'

Fix them by adding @ver and @regs entries to the struct rsc_drv
documentation.

While at it, add a missing kernel-doc block for struct rsc_ver, and
update the remaining struct kernel-doc comments (struct tcs_group,
struct rpmh_request, struct rpmh_ctrlr, struct rsc_drv) to use the
'struct name -' format documented in
Documentation/doc-guide/kernel-doc.rst.

No functional impact.

Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-1-0f5026293d9a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:43 +02:00
Abel Vesa
c7c56b6ec0 soc: qcom: pmic_glink: Fix device access from worker during suspend
For historical reasons, the GLINK smem interrupt is registered with
IRRQF_NO_SUSPEND flag set, which is the underlying problem here, since the
incoming messages can be delivered during late suspend and early
resume.

In this specific case, the pmic_glink_altmode_worker() currently gets
scheduled on the system_wq which can be scheduled to run while devices
are still suspended. This proves to be a problem when a Type-C retimer,
switch or mux that is controlled over a bus like I2C, because the I2C
controller is suspended.

This has been proven to be the case on the X Elite boards where such
retimers (ParadeTech PS8830) are used in order to handle Type-C
orientation and altmode configuration. The following warning is thrown:

[   35.134876] i2c i2c-4: Transfer while suspended
[   35.143865] WARNING: CPU: 0 PID: 99 at drivers/i2c/i2c-core.h:56 __i2c_transfer+0xb4/0x57c [i2c_core]
[   35.352879] Workqueue: events pmic_glink_altmode_worker [pmic_glink_altmode]
[   35.360179] pstate: 61400005 (nZCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--)
[   35.455242] Call trace:
[   35.457826]  __i2c_transfer+0xb4/0x57c [i2c_core] (P)
[   35.463086]  i2c_transfer+0x98/0xf0 [i2c_core]
[   35.467713]  i2c_transfer_buffer_flags+0x54/0x88 [i2c_core]
[   35.473502]  regmap_i2c_write+0x20/0x48 [regmap_i2c]
[   35.478659]  _regmap_raw_write_impl+0x780/0x944
[   35.483401]  _regmap_bus_raw_write+0x60/0x7c
[   35.487848]  _regmap_write+0x134/0x184
[   35.491773]  regmap_write+0x54/0x78
[   35.495418]  ps883x_set+0x58/0xec [ps883x]
[   35.499688]  ps883x_sw_set+0x60/0x84 [ps883x]
[   35.504223]  typec_switch_set+0x48/0x74 [typec]
[   35.508952]  pmic_glink_altmode_worker+0x44/0x1fc [pmic_glink_altmode]
[   35.515712]  process_scheduled_works+0x1a0/0x2d0
[   35.520525]  worker_thread+0x2a8/0x3c8
[   35.524449]  kthread+0xfc/0x184
[   35.527749]  ret_from_fork+0x10/0x20

The proper solution here should be to not deliver these kind of messages
during system suspend at all, or at least make it configurable per glink
client. But simply dropping the IRQF_NO_SUSPEND flag entirely will break
other clients. The final shape of the rework of the pmic glink driver in
order to fulfill both the filtering of the messages that need to be able
to wake-up the system and the queueing of these messages until the system
has properly resumed is still being discussed and it is planned as a
future effort.

Meanwhile, the stop-gap fix here is to schedule the pmic glink altmode
worker on the system_freezable_wq instead of the system_wq. This will
result in the altmode worker not being scheduled to run until the
devices are resumed first, which will give the controllers like I2C a
chance to resume before the transfer is requested.

Reported-by: Johan Hovold <johan+linaro@kernel.org>
Closes: https://lore.kernel.org/lkml/Z1CCVjEZMQ6hJ-wK@hovoldconsulting.com/
Fixes: 080b4e2485 ("soc: qcom: pmic_glink: Introduce altmode support")
Cc: stable@vger.kernel.org    # 6.3
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260819-b4-soc-qcom-pmic-glink-fix-device-access-on-worker-while-suspended-v3-1-169b00e0d9d4@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:43 +02:00
bui duc phuc
c708b7141c soc: qcom: llcc-qcom: Handle errors from optional IRQ lookup
platform_get_irq_optional() returns a positive IRQ number on success or
a negative error code on failure. For an optional IRQ, -ENXIO indicates
that no optional IRQ is available. Other errors, such as -EPROBE_DEFER
and -EINVAL, should be propagated so that the caller can handle them
appropriately.

Propagate negative errors other than -ENXIO.

Signed-off-by: bui duc phuc <phucduc.bui@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260819102630.68991-1-phucduc.bui@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:43 +02:00
Viken Dadhaniya
f38399670d soc: qcom: geni-se: Fix write to read-only firmware buffer
geni_find_protocol_fw() casts fw->data to a non-const struct se_fw_hdr
pointer and writes back the rounded-up fw_size value:

        sefw->fw_size_in_items = cpu_to_le16(fw_size);

The firmware subsystem maps the firmware blob read-only. Writing through
the cast pointer causes a level-3 permission fault on AArch64 and
crashes the kernel during driver probe.

The write-back is no longer necessary: geni_find_protocol_fw() now
propagates the rounded size to the caller via fw_size_out. Remove the
write-back and make sefw (and the hdr pointer in the caller)
const-correct.

Fixes: d4bf06592a ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-4-43e6a3abd651@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:42 +02:00
Viken Dadhaniya
091269da39 soc: qcom: geni-se: Fix fw_end computed before round-up; propagate size to caller
fw_end was computed from the raw fw_size_in_items, before the odd-word
round-up. A segment with an odd word count could pass the bounds check
at the unrounded value but then be copied one word past the validated
limit. Move fw_end (and the cfg_{idx,val}_end) calculations to after
the round-up so they always reflect the true copy extent.

The caller geni_load_se_fw() re-read hdr->fw_size_in_items for the
memcpy_toio() length, bypassing the validated and rounded value
established by geni_find_protocol_fw(). Add a fw_size_out output
parameter and use it in the caller.

Fixes: d4bf06592a ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-3-43e6a3abd651@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-10-05 09:10:42 +02:00