Panel regulator is controller by a normal GPIO, so we need to
write a regulator-fixed node for it.
Change-Id: I24a0f2787ef3bb93422296e8a97c076040460ccc
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9201801/)
Panel regulator is controller by a normal GPIO, so we need to
write a regulator-fixed node for it.
Change-Id: I4368b16bf49ef04a539aad154f7c16b094bfc382
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9201803/)
The default eDP panel on RK3288 EVB board is LG LP079QX1-SP0V TFT LCD,
we haven't declared the panel regulator in the 'panel-simple' device
node here, so the specific board like ACT8846 / RK8080 need to support
the panel power supply.
Change-Id: Ibf4a6457d606027eaa91cacf6fde2241376afd13
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9201815/)
The AUO B101EW05 panel is a 10.1" 1280(RGB)x800 WXGA TFT-LCD panel,
connected using LVDS interfaces.
Change-Id: Ic80369353f5e1726d2ea2ace6d53bb2bcdae6fc2
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
The AUO B101EW05 panel is a 10.1" 1280(RGB)x800 WXGA TFT-LCD panel,
connected using LVDS interfaces
Change-Id: Ic67fe5793a975b585cecfb8da02e81cd9fa6346f
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Chunghwa CLAA070WP03 is 7” color TFT-LCD module composed of LCD
panel, LVDS driver ICs, control circuit and backlight. This module
supports 800x1280 mode.
Change-Id: I7f71464a80725d648802918740e64a0368f5c480
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Chunghwa CLAA070WP03 is 7” color TFT-LCD module composed of LCD panel,
LVDS driver ICs, control circuit and backlight. This module supports
800x1280 mode.
Change-Id: I6a6339ad25664e2e47fc0e0de5c079db3494bd25
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
vcc_wl and vcc_lcd are 2 gpio switches for rk3288-evb-act8846 board.
Change-Id: I49fc20665adf4176d672fdd3e4030ee472f558a8
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from commit 662513a14c)
The arm64 virtual addresses of kernel are like:
VA_START < MODULES_VADDR < KIMAGE_VADDR < PAGE_OFFSET.
PAGE_OFFSET is the virtual address of the start of the linear map.
And the vmalloc, kernel code and so on are between VA_START and
PAGE_OFFSET, so it is necessary to expand dump addresses to VA_START,
instead of PAGE_OFFSET.
Change-Id: I810ed216862de4c6e68b92d483de4aa68da532b8
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
I don't need send for upstream since the rockchip inside kernel
need it for tuning. At least the upstream can work it with dwmmc.
Change-Id: I73c12b455c7dc5320d6c06f9e29ddec5c4a6def5
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
We have the brother chipset that RK3228 and RK3229, they share most
of dts configuration, but there are a number of different features.
In order to develop the future when they are easy to distinguish,
we need them to be independent.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.8-armsoc/dts32 commit 8372d93df7)
Change-Id: I0b3c91cddb3ca919b165ba1ec5b2b9466945546d
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Only one of "broken-cd" and "non-removable" should be supplied
according to Documentation/devicetree/bindings/mmc/mmc.txt.
Obviously emmc and sdio-wifi are non-removable devices, while
broken-cd is for removable device whose card detect pin is broken.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.8-armsoc/dts32 commit 57375d88fa)
Change-Id: Ie8df62156fbc96c0c9e16d05389b2f230b261f0e
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
This patch enables the tsadc for rk3228 evb board.
The rk3228 evb board uses the CRU to reset the chip since it hasn't the
PMIC to connect it, and TSHUT is low active on evb board.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.8-armsoc/dts32 commit 26f5e19dfb)
Change-Id: I12ce9b1e2fb2c740bef100a22d746d5e128253e6
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
This patch adds the thermal needed main information for rk3228 SoCS.
Basically has the following content:
1) TSADC controller:
Add the needed attributes for rk3036 TSADC controller.
Especially for the TSHUT, in some cases if we are unable to shut it down
in orderly fashion (says: kernel is stuck holding a lock or similar), then
hardware TSHUT will reset it.
If the temperature is over 95C over a period of time the thermal shutdown
of the tsadc is invoked with can either reset the entire chip via the CRU,
or notify the PMIC via a GPIO. This should be set in the specific board.
2) Thermal zones:
Add the needed device mode for thermal generic framework.
Detail in Documentation/devicetree/bindings/thermal/thermal.txt.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.8-armsoc/dts32 commit 7796031eec)
Change-Id: I415d5ac7ba2bca2259821dae6af98970e039d455
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
There are old v3.10 dts and unsuitable for v4.4, we need to remove them.
Change-Id: I070fb1fd5d513883f43dfbdab6f173e68fe48e72
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
The rk3288 SoC has an option to switch all of the PWMs in the system
between the old IP block and the new IP block. The new IP block is
working and tested and the suggested PWM to use, so setup the SoC to
use it and then we can pretend that the other IP block doesn't exist.
This code could go lots of other places, but we've put it here. Why?
- Pushing it to the bootloader just makes the code harder to update in
the field. If we later find a bug in the new IP block and want to
change our mind about what to use we want it to be easy to update.
- Putting this code in the driver for IP block is a lot of extra work,
device tree bindings, etc. Now that the new IP block is validated
it's likely no future SoCs will need this code. Why pollute the PWM
driver with this? This is an rk3288 thing so it should be in rk3288
code.
- There's a single bit that switches over PWMs, which makes it extra
hard to put this under the PWM device tree nodes.
Change-Id: Ib178129fc4f24f71d3a6f7315f757f91b5bdf534
Signed-off-by: Doug Anderson <dianders@chromium.org>
The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
than rk3288 and before, and most of phy-related registers are also
different from the past, so a new phy driver is required necessarily.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Suggested-by: Heiko Stuebner <heiko@sntech.de>
Suggested-by: Guenter Roeck <linux@roeck-us.net>
Suggested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
(merge from https://patchwork.kernel.org/patch/9190287/)
Change-Id: I3e7739dee6057928172904565c10cebf9785fec6
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
USB2PHY
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
(merge from https://patchwork.kernel.org/patch/9190285/)
Change-Id: I7199a4e84f13e58e98d5c0d21ce01837e961c3e8
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
The LG LP079QX1-SP0V is an 7.9" QXGA TFT with LED Backlight unit and
32 pins eDP interface. This module supports 1536x2048 mode.
Change-Id: I3f56b58935e47bb062d62521a019f36baae4be7a
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9201795/)
The LG LP079QX1-SP0V is an 7.9" QXGA TFT with LED Backlight unit and
32 pins eDP interface. This module supports 1536x2048 mode.
Change-Id: Ib42185ffce772160133a3edf3c3cf61bff4b85c5
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9201799/)
When add spi support, introduce a new bug that
i2c intrerupt pin assignment after request_irq.
Change-Id: Id41a953c8c7ea8a94a584c584ee012025a4a6921
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
When the input color format is YUV, we need to do some external scale
for CBCR. Like,
* In YUV420 data format:
cbcr_xscale = dst_w / src_w * 2;
cbcr_yscale = dst_h / src_h * 2;
* In YUV422 data format:
cbcr_xscale = dst_w / src_w * 2;
cbcr_yscale = dst_h / src_h;
* In YUV444 data format
cbcr_xscale = dst_w / src_w;
cbcr_yscale = dst_h / src_h;
Change-Id: I73e0423d3662bd340b5d155996f13d31c22dcc29
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9157353/)
The WIN0 of RK3036 VOP could support YUV data format, but driver
forget to add the uv_vir register field for it.
Change-Id: Ie27216d0612d41fec02346ce65412207ed26d4a1
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9157349/)
According to the advice of the IC,
setting the PMU_GPU_PWRDW/PWRUP_CNT regs 6 cycel(250ns) for RK3399 SOC.
Change-Id: I0449069a3b5035bd0442fcd74b645de9480a1d89
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
As the 750MHz cpll can't produce accurate frequancy for i2s,
for example 11289600Hz, so assign their parents to the 576MHz gpll.
Change-Id: I430bce21ae69b47e561a95e691276d0c921a702c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Set the newly added id for i2s_src, so that they can be called
in other parts.
Change-Id: Ie4ecc4d19e3ae64a07d1f2a80aa08d40f38d09ad
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This misc update would try to fix below comments from my eDP thread[0],
and lucky to say this version is stable, and i'm start to perpare the
pull request to David with this version. So i guess it's time to create
a misc FIXUP patch to address the comments.
[0]: https://patchwork.kernel.org/patch/9175613/
- Correct the misspell of "marcos" in commit message (Dominik, reviewed at Google Gerrit)
- Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit)
- Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit)
- Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
reg = ~reg & REF_CLK_MASK; ---> reg ^= REF_CLK_MASK;
- Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
- Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
- Avoid to change any internal driver state in .mode_valid interface. (Tomasz, reviewed at Google Gerrit)
- Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
Change-Id: Ic35f166ebac04e417ff3d135e7bf4573bbca2004
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
The pwm for Minnie's backlight needs to be above 1%, so adapt the start
of non-zero brightness accordingly. Minnie is also using a different
panel, so re-set the compatible property.
Change-Id: I4fd13be0a848ca7a33213e07864637bf3792f9af
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
(cherry pick from commit 712e6051c4)
Many Veyron chromebooks share the same panel type, so define the core
settings for all of them and allow the few runaways to override it later.
Change-Id: I48668b9fa156f02de94a2ac8c0a20a3407a201b0
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
(cherry pick from commit dfb2146efc)
The edp hotplug pin is fixed on the soc side, anybody wanting to use it
will need the same definition anyway, so move it to a common location.
Change-Id: I49a424eeb755d6bfaf38b91cadfd6d8ff7be8ccf
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
(cherry pick from commit a4e00345b2)
Add the rk3288 edp node and its hooks into the display-subsystem.
Change-Id: I1bd7617203e9c36c426bd69fd23f99c1e10a8c99
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
(cherry pick from commit 6df7ec6186)
Add the core device node of the edp-phy on rk3288 socs.
Change-Id: I34d23617abfaeefa5ec527c7b2ce67bc3b614c68
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
(cherry pick from commit f5663969d8)
It is replaced by drm_of_encoder_active_endpoint_id.
Change-Id: I0d09b768951192cd781d0b5c3e5652f66dc4cdaa
Suggested-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Yakir Yang <ykk@rock-chips.com>
[for dw_hdmi-rockchip]
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
(cherry-pick from commit 1645061679)
This patch adds a helper to parse the encoder endpoint connected to the
encoder's crtc and two helpers to return its id and port id.
This can be used to determine input mux setting from endpoint or port ids.
Change-Id: I48eb7c66edb951af40085e4e388afbd5d4b2c77b
Suggested-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
(cherry pick from commit 4cacf91fcb)
Add phy driver for the Rockchip DisplayPort PHY module. This
is required to get DisplayPort working in Rockchip SoCs.
Change-Id: Ied28937c12584aee9654af775d4cf0cac4eddec5
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry pick from commit fd968973de)
DATA_OVER(the same for RI/TI of IDMAC) interrupt may come
up together with data error interrupts. If so, the interrupt
routine set EVENT_DATA_ERR to the pending_events and schedule
the tasklet but we may still fallback to the IDMAC interrupt
case as the tasklet may come up a little late, namely right
after the IDMAC interrupt checking. This will casue dw_mmc
unmap sg twice. We can easily see it with CONFIG_DMA_API_DEBUG
enabled.
WARNING: CPU: 0 PID: 0 at lib/dma-debug.c:1096 check_unmap+0x7bc/0xb38
dwmmc_exynos 12200000.mmc: DMA-API: device driver tries to free DMA memory it
has not allocated [device address=0x000000006d9d2200]
[size=128 bytes]
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.7.0-rc4 #26
Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[<c0112b4c>] (unwind_backtrace) from [<c010d888>] (show_stack+0x20/0x24)
[<c010d888>] (show_stack) from [<c03fab0c>] (dump_stack+0x80/0x94)
[<c03fab0c>] (dump_stack) from [<c0123548>] (__warn+0xf8/0x110)
[<c0123548>] (__warn) from [<c01235a8>] (warn_slowpath_fmt+0x48/0x50)
[<c01235a8>] (warn_slowpath_fmt) from [<c042ac90>] (check_unmap+0x7bc/0xb38)
[<c042ac90>] (check_unmap) from [<c042b25c>] (debug_dma_unmap_sg+0x118/0x148)
[<c042b25c>] (debug_dma_unmap_sg) from [<c077512c>] (dw_mci_dma_cleanup+0x7c/0xb8)
[<c077512c>] (dw_mci_dma_cleanup) from [<c0773f24>] (dw_mci_stop_dma+0x40/0x50)
[<c0773f24>] (dw_mci_stop_dma) from [<c0777d04>] (dw_mci_tasklet_func+0x130/0x3b4)
[<c0777d04>] (dw_mci_tasklet_func) from [<c0129760>] (tasklet_action+0xb4/0x150)
[<c0129760>] (tasklet_action) from [<c0101674>] (__do_softirq+0xe4/0x3cc)
[<c0101674>] (__do_softirq) from [<c0129030>] (irq_exit+0xd0/0x10c)
[<c0129030>] (irq_exit) from [<c01778a0>] (__handle_domain_irq+0x90/0xfc)
[<c01778a0>] (__handle_domain_irq) from [<c0101548>] (gic_handle_irq+0x64/0xa8)
[<c0101548>] (gic_handle_irq) from [<c010e3d4>] (__irq_svc+0x54/0x90)
Exception stack(0xc1101ef8 to 0xc1101f40)
1ee0: 00000001 00000000
1f00: 00000000 c011b600 c1100000 c110753c 00000000 c11c3984 c11074d4 c1107548
1f20: 00000000 c1101f54 c1101f58 c1101f48 c010a1fc c010a200 60000013 ffffffff
[<c010e3d4>] (__irq_svc) from [<c010a200>] (arch_cpu_idle+0x48/0x4c)
[<c010a200>] (arch_cpu_idle) from [<c01669d8>] (default_idle_call+0x30/0x3c)
[<c01669d8>] (default_idle_call) from [<c0166d3c>] (cpu_startup_entry+0x358/0x3b4)
[<c0166d3c>] (cpu_startup_entry) from [<c0aa6ab8>] (rest_init+0x94/0x98)
[<c0aa6ab8>] (rest_init) from [<c1000d58>] (start_kernel+0x3a4/0x3b0)
[<c1000d58>] (start_kernel) from [<4000807c>] (0x4000807c)
---[ end trace 256f83eed365daf0 ]---
Change-Id: Idc1b46aeac92d715e368533352b2bb75d65d4bbd
Reported-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Add constants and callback functions for the dwmac on rk3228/rk3229 socs.
As can be seen, the base structure is the same, only registers and the
bits in them moved slightly.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git
master commit e7ffd81233)
Conflicts:
Documentation/devicetree/bindings/net/rockchip-dwmac.txt
[zx: conflict with rk3366 and rk3399 that have not been sent to upstream.]
Change-Id: Ibae845ded567e11a8428f6f45510cd5443845e17
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Some RK3399 evb2 cannot support 1.8G for A72, maybe caused by
current limit, but remove it anyway for evb2.
Change-Id: Ibaa940696ccbdc59131c49e9a643a63863768ea2
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Set ROCKCHIP_SPI_DMATDLR (rs->fifo_len - 16 - 1), which
can keep spi transferring. By the way, rx burst len must be
set 1, because it is hard to deal with the unaligned length.
Such as burst leng 16, ROCKCHIP_SPI_DMARDLR 16, when rx fifo
reaches 16, dma receive 16 bytes. But if the last bytes is less
than 16, dma will miss the bytes left in the rx fifo.
Change-Id: I846db94a87955453e617620ade32f2e68f01c01d
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
