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FROMLIST: phy: rockchip-inno-usb2: add a new driver for Rockchip usb2phy
The newer SoCs (rk3366, rk3399) take a different usb-phy IP block than rk3288 and before, and most of phy-related registers are also different from the past, so a new phy driver is required necessarily. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Suggested-by: Heiko Stuebner <heiko@sntech.de> Suggested-by: Guenter Roeck <linux@roeck-us.net> Suggested-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Guenter Roeck <linux@roeck-us.net> (merge from https://patchwork.kernel.org/patch/9190287/) Change-Id: I3e7739dee6057928172904565c10cebf9785fec6 Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This commit is contained in:
Frank Wang
Huang, Tao
parent
956fb822d9
commit
b5ebb56e30
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@ -5,7 +5,8 @@
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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@ -78,15 +79,17 @@ struct rockchip_usb2phy_port_cfg {
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/**
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* struct rockchip_usb2phy_cfg: usb-phy configuration.
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* @reg: the address offset of grf for usb-phy config.
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* @num_ports: specify how many ports that the phy has.
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* @phy_tuning: phy default parameters tunning.
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* @clkout_ctl: keep on/turn off output clk of phy.
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*/
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struct rockchip_usb2phy_cfg {
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unsigned int reg;
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unsigned int num_ports;
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int (*phy_tuning)(struct rockchip_usb2phy *);
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struct usb2phy_reg clkout_ctl;
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const struct rockchip_usb2phy_port_cfg *port_cfgs;
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const struct rockchip_usb2phy_port_cfg port_cfgs[USB2PHY_NUM_PORTS];
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};
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/**
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@ -111,24 +114,24 @@ struct rockchip_usb2phy_port {
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/**
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* struct rockchip_usb2phy: usb2.0 phy driver data.
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* @grf: General Register Files regmap.
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* @clk: clock struct of phy input clk.
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* @clk480m: clock struct of phy output clk.
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* @clk_hw: clock struct of phy output clk management.
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* @vbus_host_gpio: host VBUS direction output.
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* @phy_cfg: phy register configuration, assigned by driver data.
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* @ports: phy port instance.
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*/
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struct rockchip_usb2phy {
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struct device *dev;
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struct regmap *grf;
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struct clk *clk;
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struct clk *clk480m;
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struct clk_hw clk480m_hw;
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struct gpio_desc *vbus_host_gpio;
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const struct rockchip_usb2phy_cfg *phy_cfg;
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struct rockchip_usb2phy_port ports[USB2PHY_NUM_PORTS];
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};
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static inline int property_enable(struct rockchip_usb2phy *rphy,
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const struct usb2phy_reg *reg, bool en)
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const struct usb2phy_reg *reg, bool en)
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{
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unsigned int val, mask, tmp;
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@ -158,7 +161,7 @@ static int rockchip_usb2phy_clk480m_enable(struct clk_hw *hw)
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{
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struct rockchip_usb2phy *rphy =
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container_of(hw, struct rockchip_usb2phy, clk480m_hw);
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int ret = 0;
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int ret;
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/* turn on 480m clk output if it is off */
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if (!property_enabled(rphy, &rphy->phy_cfg->clkout_ctl)) {
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@ -170,19 +173,13 @@ static int rockchip_usb2phy_clk480m_enable(struct clk_hw *hw)
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mdelay(1);
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}
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return ret;
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return 0;
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}
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static void rockchip_usb2phy_clk480m_disable(struct clk_hw *hw)
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{
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struct rockchip_usb2phy *rphy =
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container_of(hw, struct rockchip_usb2phy, clk480m_hw);
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int index;
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/* make sure all ports in suspended mode */
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for (index = 0; index != rphy->phy_cfg->num_ports; index++)
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if (!rphy->ports[index].suspended)
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return;
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/* turn off 480m clk output */
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property_enable(rphy, &rphy->phy_cfg->clkout_ctl, false);
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@ -210,36 +207,78 @@ static const struct clk_ops rockchip_usb2phy_clkout_ops = {
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.recalc_rate = rockchip_usb2phy_clk480m_recalc_rate,
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};
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static struct clk *
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static void rockchip_usb2phy_clk480m_unregister(void *data)
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{
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struct rockchip_usb2phy *rphy = data;
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of_clk_del_provider(rphy->dev->of_node);
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clk_unregister(rphy->clk480m);
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if (rphy->clk)
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clk_put(rphy->clk);
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}
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static int
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rockchip_usb2phy_clk480m_register(struct rockchip_usb2phy *rphy)
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{
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struct device_node *node = rphy->dev->of_node;
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struct clk *clk;
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struct clk_init_data init;
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const char *clk_name;
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int ret;
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init.flags = 0;
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init.name = "clk_usbphy_480m";
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init.ops = &rockchip_usb2phy_clkout_ops;
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init.flags = CLK_IS_ROOT;
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init.parent_names = NULL;
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init.num_parents = 0;
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rphy->clk480m_hw.init = &init;
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/* optional override of the clockname */
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of_property_read_string(node, "clock-output-names", &init.name);
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/* register the clock */
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clk = clk_register(rphy->dev, &rphy->clk480m_hw);
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if (!IS_ERR(clk))
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of_clk_add_provider(node, of_clk_src_simple_get, clk);
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rphy->clk = of_clk_get_by_name(node, "phyclk");
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if (IS_ERR(rphy->clk)) {
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rphy->clk = NULL;
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init.parent_names = NULL;
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init.num_parents = 0;
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} else {
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clk_name = __clk_get_name(rphy->clk);
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init.parent_names = &clk_name;
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init.num_parents = 1;
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}
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return clk;
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rphy->clk480m_hw.init = &init;
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/* register the clock */
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rphy->clk480m = clk_register(rphy->dev, &rphy->clk480m_hw);
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if (IS_ERR(rphy->clk480m)) {
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ret = PTR_ERR(rphy->clk480m);
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goto err_register;
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}
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ret = of_clk_add_provider(node, of_clk_src_simple_get, rphy->clk480m);
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if (ret < 0)
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goto err_clk_provider;
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ret = devm_add_action(rphy->dev, rockchip_usb2phy_clk480m_unregister,
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rphy);
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if (ret < 0)
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goto err_unreg_action;
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return 0;
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err_unreg_action:
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of_clk_del_provider(node);
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err_clk_provider:
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clk_unregister(rphy->clk480m);
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err_register:
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if (rphy->clk)
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clk_put(rphy->clk);
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return ret;
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}
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static int rockchip_usb2phy_init(struct phy *phy)
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{
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struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
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struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
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int ret = 0;
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int ret;
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if (rport->port_id == USB2PHY_PORT_HOST) {
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/* clear linestate and enable linestate detect irq */
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@ -261,16 +300,19 @@ static int rockchip_usb2phy_init(struct phy *phy)
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schedule_delayed_work(&rport->sm_work, SCHEDULE_DELAY);
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}
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return ret;
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return 0;
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}
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static int rockchip_usb2phy_resume(struct phy *phy)
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static int rockchip_usb2phy_power_on(struct phy *phy)
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{
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struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
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struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
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int ret;
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dev_dbg(&rport->phy->dev, "port resume\n");
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dev_dbg(&rport->phy->dev, "port power on\n");
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if (!rport->suspended)
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return 0;
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ret = clk_prepare_enable(rphy->clk480m);
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if (ret)
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@ -284,13 +326,16 @@ static int rockchip_usb2phy_resume(struct phy *phy)
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return 0;
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}
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static int rockchip_usb2phy_suspend(struct phy *phy)
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static int rockchip_usb2phy_power_off(struct phy *phy)
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{
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struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
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struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
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int ret;
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dev_dbg(&rport->phy->dev, "port suspend\n");
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dev_dbg(&rport->phy->dev, "port power off\n");
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if (rport->suspended)
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return 0;
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ret = property_enable(rphy, &rport->port_cfg->phy_sus, true);
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if (ret)
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@ -298,6 +343,7 @@ static int rockchip_usb2phy_suspend(struct phy *phy)
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rport->suspended = true;
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clk_disable_unprepare(rphy->clk480m);
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return 0;
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}
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@ -314,8 +360,8 @@ static int rockchip_usb2phy_exit(struct phy *phy)
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static const struct phy_ops rockchip_usb2phy_ops = {
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.init = rockchip_usb2phy_init,
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.exit = rockchip_usb2phy_exit,
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.power_on = rockchip_usb2phy_resume,
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.power_off = rockchip_usb2phy_suspend,
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.power_on = rockchip_usb2phy_power_on,
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.power_off = rockchip_usb2phy_power_off,
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.owner = THIS_MODULE,
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};
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@ -329,8 +375,8 @@ static const struct phy_ops rockchip_usb2phy_ops = {
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* device is disconnected at last through rearm the delayed work,
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* to suspend the phy port in _PHY_STATE_DISCONNECT_ case.
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*
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* NOTE: It will invoke some clk related APIs, so do not invoke it from
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* interrupt context.
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* NOTE: It may invoke *phy_powr_off or *phy_power_on which will invoke
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* some clk related APIs, so do not invoke it from interrupt context directly.
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*/
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static void rockchip_usb2phy_sm_work(struct work_struct *work)
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{
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@ -381,14 +427,14 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work)
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case PHY_STATE_HS_CONNECT:
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if (rport->suspended) {
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dev_dbg(&rport->phy->dev, "HS/FS connected\n");
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rockchip_usb2phy_resume(rport->phy);
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rockchip_usb2phy_power_on(rport->phy);
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rport->suspended = false;
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}
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break;
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case PHY_STATE_DISCONNECT:
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if (!rport->suspended) {
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dev_dbg(&rport->phy->dev, "HS/FS disconnected\n");
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rockchip_usb2phy_suspend(rport->phy);
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rockchip_usb2phy_power_off(rport->phy);
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rport->suspended = true;
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}
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@ -446,9 +492,12 @@ static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
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struct rockchip_usb2phy_port *rport,
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struct device_node *child_np)
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{
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int ret = 0;
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int ret;
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rport->port_id = USB2PHY_PORT_HOST;
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rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_HOST];
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rport->suspended = true;
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mutex_init(&rport->mutex);
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INIT_DELAYED_WORK(&rport->sm_work, rockchip_usb2phy_sm_work);
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@ -467,7 +516,7 @@ static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
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return ret;
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}
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return ret;
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return 0;
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}
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static int rockchip_usb2phy_probe(struct platform_device *pdev)
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@ -477,7 +526,9 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
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struct device_node *child_np;
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struct phy_provider *provider;
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struct rockchip_usb2phy *rphy;
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const struct rockchip_usb2phy_cfg *phy_cfgs;
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const struct of_device_id *match;
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unsigned int reg;
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int index, ret;
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rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
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@ -491,19 +542,44 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
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}
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if (!dev->parent || !dev->parent->of_node)
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return -ENOMEM;
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return -EINVAL;
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rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
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if (IS_ERR(rphy->grf))
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return PTR_ERR(rphy->grf);
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if (of_property_read_u32(np, "reg", ®)) {
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dev_err(dev, "the reg property is not assigned in %s node\n",
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np->name);
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return -EINVAL;
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}
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rphy->dev = dev;
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rphy->phy_cfg = match->data;
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phy_cfgs = match->data;
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platform_set_drvdata(pdev, rphy);
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rphy->clk480m = rockchip_usb2phy_clk480m_register(rphy);
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if (IS_ERR(rphy->clk480m))
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return PTR_ERR(rphy->clk480m);
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/* find out a proper config which can be matched with dt. */
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index = 0;
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while (phy_cfgs[index].reg) {
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if (phy_cfgs[index].reg == reg) {
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rphy->phy_cfg = &phy_cfgs[index];
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break;
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}
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++index;
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}
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if (!rphy->phy_cfg) {
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dev_err(dev, "no phy-config can be matched with %s node\n",
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np->name);
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return -EINVAL;
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}
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ret = rockchip_usb2phy_clk480m_register(rphy);
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if (ret) {
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dev_err(dev, "failed to register 480m output clock\n");
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return ret;
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}
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if (rphy->phy_cfg->phy_tuning) {
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ret = rphy->phy_cfg->phy_tuning(rphy);
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@ -511,18 +587,20 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
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return ret;
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}
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rphy->vbus_host_gpio =
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devm_gpiod_get_optional(dev, "vbus_host", GPIOD_OUT_HIGH);
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if (!rphy->vbus_host_gpio)
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dev_info(dev, "host_vbus is not assigned!\n");
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else if (IS_ERR(rphy->vbus_host_gpio))
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return PTR_ERR(rphy->vbus_host_gpio);
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index = 0;
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for_each_child_of_node(np, child_np) {
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for_each_available_child_of_node(np, child_np) {
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struct rockchip_usb2phy_port *rport = &rphy->ports[index];
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struct phy *phy;
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/*
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* This driver aim to support both otg-port and host-port,
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* but unfortunately, the otg part is not ready in current,
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* so this comments and below codes are interim, which should
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* be changed after otg-port is supplied soon.
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*/
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if (of_node_cmp(child_np->name, "host-port"))
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goto next_child;
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phy = devm_phy_create(dev, child_np, &rockchip_usb2phy_ops);
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if (IS_ERR(phy)) {
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dev_err(dev, "failed to create phy\n");
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@ -531,18 +609,16 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
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}
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rport->phy = phy;
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rport->port_cfg = &rphy->phy_cfg->port_cfgs[index];
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/* initialize otg/host port separately */
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if (!of_node_cmp(child_np->name, "host-port")) {
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ret = rockchip_usb2phy_host_port_init(rphy, rport,
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child_np);
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if (ret)
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goto put_child;
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}
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phy_set_drvdata(rport->phy, rport);
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index++;
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ret = rockchip_usb2phy_host_port_init(rphy, rport, child_np);
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if (ret)
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goto put_child;
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next_child:
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/* to prevent out of boundary */
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if (++index >= rphy->phy_cfg->num_ports)
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break;
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}
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provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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@ -550,8 +626,6 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
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put_child:
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of_node_put(child_np);
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of_clk_del_provider(np);
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clk_unregister(rphy->clk480m);
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return ret;
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}
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@ -574,21 +648,24 @@ static int rk3366_usb2phy_tuning(struct rockchip_usb2phy *rphy)
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return ret;
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}
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static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs = {
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.num_ports = 1,
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.phy_tuning = rk3366_usb2phy_tuning,
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.clkout_ctl = { 0x0724, 15, 15, 1, 0 },
|
||||
.port_cfgs = (struct rockchip_usb2phy_port_cfg[]) {
|
||||
{
|
||||
.phy_sus = { 0x0728, 15, 0, 0, 0x1d1 },
|
||||
.ls_det_en = { 0x0680, 4, 4, 0, 1 },
|
||||
.ls_det_st = { 0x0690, 4, 4, 0, 1 },
|
||||
.ls_det_clr = { 0x06a0, 4, 4, 0, 1 },
|
||||
.utmi_ls = { 0x049c, 14, 13, 0, 1 },
|
||||
.utmi_hstdet = { 0x049c, 12, 12, 0, 1 }
|
||||
static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = {
|
||||
{
|
||||
.reg = 0x700,
|
||||
.num_ports = 2,
|
||||
.phy_tuning = rk3366_usb2phy_tuning,
|
||||
.clkout_ctl = { 0x0724, 15, 15, 1, 0 },
|
||||
.port_cfgs = {
|
||||
[USB2PHY_PORT_HOST] = {
|
||||
.phy_sus = { 0x0728, 15, 0, 0, 0x1d1 },
|
||||
.ls_det_en = { 0x0680, 4, 4, 0, 1 },
|
||||
.ls_det_st = { 0x0690, 4, 4, 0, 1 },
|
||||
.ls_det_clr = { 0x06a0, 4, 4, 0, 1 },
|
||||
.utmi_ls = { 0x049c, 14, 13, 0, 1 },
|
||||
.utmi_hstdet = { 0x049c, 12, 12, 0, 1 }
|
||||
}
|
||||
},
|
||||
{ /* sentinel */ }
|
||||
},
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static const struct of_device_id rockchip_usb2phy_dt_match[] = {
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user