Correct a few white-space issues, like missing space before bracket '{'
character or spurious space, which will be flagged by dt-check-style
("redundant-whitespace" warning). No functional changes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Michal Simek <michal.simek@amd.com> # Versal NET
Acked-by: Sven Peter <sven@kernel.org> # for apple dts
Link: https://patch.msgid.link/20260801210210.383417-4-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The second field of SAI register addresses should be within 0x3f0 bytes
from the start of the SAI register addresses, the second field describes
the ID registers which are at that addrses. Currently, the second field
does not match RM, fix it.
Fixes: bf26d75a95 ("arm64: dts: st: add sai support on stm32mp251")
Signed-off-by: Marek Vasut <marex@nabladev.com>
Reviewed-by: Olivier Moysan <olivier.moysan@foss.st.com>
Link: https://lore.kernel.org/r/20260411130300.19603-1-marex@nabladev.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Make the syscfg node a clock provider so clock consumers can reach child
clocks through device-tree.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Link: https://lore.kernel.org/r/20260210-display-v2-5-0592bd514958@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add the LTDC node for stm32mp235 SoC and handle its loopback clocks.
ck_ker_ltdc has the CLK_SET_RATE_PARENT flag. While having this flag is
semantically correct, it for now leads to an improper setting of the
clock rate. The ck_ker_ltdc parent clock is the flexgen 27, which does
not support changing rates yet. To overcome this issue, a fixed clock
can be used for the kernel clock.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Link: https://lore.kernel.org/r/20260210-display-v2-3-0592bd514958@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The LCD-TFT Display Controller (LTDC) handles display composition,
scaling and rotation. It provides a parallel digital RGB flow to be
used by display interfaces.
Add the LTDC node.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Link: https://lore.kernel.org/r/20260210-display-v2-2-0592bd514958@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
stm32mp25-pinctrl.dtsi gathers all pinctrl groups from current and future
STM32MP25-based boards. Some groups may remain unused by any board,
resulting in wasted binary space.
Adding /omit-if-no-ref/ to the groups will remove unused groups from the
device tree blobs.
Use the following regex to update the file:
's/^\t[^:]\+: [^ ]\+ {$/\t\/omit-if-no-ref\/\n&/'
Also, merge the duplicated pinctrl_z node.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20260311-mp25_pinctrl_omit-v1-1-5a3d40046b10@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add BSEC support to STM32MP21 SoC family with SoC information:
- RPN = Device part number (BSEC_OTP_DATA9)
- PKG = package data register (Bits 2:0 of BSEC_OTP_DATA122)
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20260211-upstream_stm32mp21_bsec_nodes-v1-1-8379bf97b0bc@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add a 2nd set of i2c2 pinmux nodes (i2c2_pins_b/i2c2_sleep_pins_b)
in stm32mp25-pinctrl.dtsi in order to be used on the stm32mp257f-dk
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/20260224-stm32-i2c-dt-updates-v1-6-347cf6fca7d1@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Update all i2c nodes with the following properties:
- replace interrupts with interrupts-extended and rely on exti
- add the wakeup-source property
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/20260224-stm32-i2c-dt-updates-v1-5-347cf6fca7d1@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Update all i2c nodes with the following properties:
- replace interrupts with interrupts-extended and rely on exti
- add the wakeup-source property
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/20260224-stm32-i2c-dt-updates-v1-4-347cf6fca7d1@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
These .dtsi files are not included anywhere in the tree and can't be
tested.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20260113201340.36950-1-robh@kernel.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DTS coding style prefers hyphens instead of underscores in the node
names. Change should be safe, because node names are not considered an
ABI.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251223152544.155637-3-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Similarly to stm32mp23x/25x platforms, the RIFSC is a firewall
controller. Declare it as an access controller, keep the "simple-bus"
compatible in case CONFIG_STM32_FIREWALL is not set and update the
child nodes.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20251106-rifsc_debugfs-v2-2-f90e94ae756d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
On board stm32mp257f-ev1, the propagation delay between eth1/eth2
and the external PHY requires a compensation to guarantee that no
packet get lost in all the working conditions.
Add I/O synchronization properties in pinctrl on all the RGMII
data pins, activating re-sampling on both edges of the clock.
Co-developed-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20251023132700.1199871-13-antonio.borneo@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
In order to set the AMCR register, which configures the
memory-region split between ospi1 and ospi2, we need to
identify the ospi instance.
By using memory-region-names, it allows to identify the
ospi instance this memory-region belongs to.
Fixes: cad2492de9 ("arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20251031-upstream_fix_dts_omm-v4-1-e4a059a50074@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
STM32MP23x SoCs provide a DDR controller supporting up to 4GB/16-bit.
The control pin to properly configure 4GB/16-bit is not routed on
stm32mp235f-dk, that's why the board only supports 2GB.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250910-stm32mp231_gpio_update-v2-2-8510efa2c5cf@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
STM32MP23x supports AJ, AK and AL packages, where PI12 to PI15, PJ0 to
PJ15 (whole J bank) and PK0 to PK7 (whole K bank) pins are not available.
It means gpioj and gpiok nodes are useless in stm32mp231. Remove them.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250910-stm32mp231_gpio_update-v2-1-8510efa2c5cf@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
ethernet1 controller is connected to the RTL8211F-CG Realtek PHY in
RGMII mode. Enable this peripheral on the stm32mp235f-dk board.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20250904-mp2_ethernet-v2-4-05a060157fb7@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
ethernet1 controller is connected to the RTL8211F-CG Realtek PHY in
RGMII mode. It can either be used as a standalone Ethernet controller
or be connected to the internal TSN capable switch. For this board,
keep the standalone setup. Also enable this peripheral on the
stm32mp257f-ev1 board.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20250904-mp2_ethernet-v2-3-05a060157fb7@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
ethernet1 controller is connected to the RTL8211F-CG Realtek PHY in
RGMII mode. Enable this peripheral on the stm32mp257f-dk board.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20250904-mp2_ethernet-v2-2-05a060157fb7@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Eth1 ethernet controller is present on every stm32mp2x vendor boards.
Describe the pinctrl of eth1 for each of them.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20250904-mp2_ethernet-v2-1-05a060157fb7@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Make the syscfg node a clock provider so clock consumers can reach child
clocks through device-tree.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-12-9c825e28f733@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The LVDS is used on STM32MP2 as a display interface.
Add the LVDS node.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-11-9c825e28f733@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add the LTDC node for stm32mp255 SoC and handle its loopback clocks.
ck_ker_ltdc has the CLK_SET_RATE_PARENT flag. While having this flag is
semantically correct, it for now leads to an improper setting of the
clock rate. The ck_ker_ltdc parent clock is the flexgen 27, which does
not support changing rates yet. To overcome this issue, a fixed clock
can be used for the kernel clock.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-10-9c825e28f733@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The LCD-TFT Display Controller (LTDC) handles display composition,
scaling and rotation. It provides a parallel digital RGB flow to be
used by display interfaces.
Add the LTDC node.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-9-9c825e28f733@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
