arm64: dts: st: add ltdc support on stm32mp255

Add the LTDC node for stm32mp255 SoC and handle its loopback clocks.

ck_ker_ltdc has the CLK_SET_RATE_PARENT flag.  While having this flag is
semantically correct, it for now leads to an improper setting of the
clock rate.  The ck_ker_ltdc parent clock is the flexgen 27, which does
not support changing rates yet.  To overcome this issue, a fixed clock
can be used for the kernel clock.

Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-10-9c825e28f733@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
Raphael Gallais-Pou 2025-08-22 16:34:19 +02:00 committed by Alexandre Torgue
parent 114e282d51
commit 84b78bc2cb
2 changed files with 12 additions and 0 deletions

View File

@ -52,6 +52,12 @@ clk_rcbsec: clk-rcbsec {
compatible = "fixed-clock";
clock-frequency = <64000000>;
};
clk_flexgen_27_fixed: clk-54000000 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <54000000>;
};
};
firmware {

View File

@ -5,6 +5,12 @@
*/
#include "stm32mp253.dtsi"
&ltdc {
compatible = "st,stm32mp255-ltdc";
clocks = <&clk_flexgen_27_fixed>, <&rcc CK_BUS_LTDC>, <&syscfg>, <&lvds>;
clock-names = "lcd", "bus", "ref", "lvds";
};
&rifsc {
vdec: vdec@480d0000 {
compatible = "st,stm32mp25-vdec";