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3990334628
* Fix the incorrect parent number of the 32k clock on GXBB * Add the AO and peripheral clock controllers for the new A9 chip -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE9OFZrhjz9W1fG7cb5vwPHDfy2oUFAmpspMEACgkQ5vwPHDfy 2oUc2BAAr4p6ygDoxRof6N/NjNlJebaYWviWhwaKDdM9a8UaKKtYeqQP1ye/1Nzv qIUcLCMDqQP1UU4xsErIDcuOLBEZ9l9WWUvL8aMJwNWyZ+l1BFdxROhnHTqfUj+i j636C+7/t9/c7PVu5C+v7i7cAMPCQQx48p1KQskmWiEJBfOt8fgIbfpdIpy9HM4V FprCnyMZdqx9DjUB1n9LWFwAN2skEwplZp3Vg0UZCtKLxdW6RGJ9ALYlknrWTkKL hqWMMQFofNBlBlMaXKrNKAlZfaegn/0pNrAeIpX3rSk8a/bdjQ7FVPtFfSfIHcw+ Z8uoxef3yuLI+c8x/SrRCPSLe83ZalOGtontmuWGT6prE7E89HqS1IqUbVoiMlDD EwbPUEGxLMMJUa3IP5WMGOCqTtnbiI/8gQVC4EgxPxWHiMr8qYHNRwVCfZhzZIic iinEU4UqehOoySapEZum/neBCbl9eJbr5bxxt2aKl60fQcXBJDEDUcju5JG56zuT m3OQAcAcKQoPcA4Fggdvyzc1eZMiEGjdYepT1WFNFq8aAA/qct0nse5GWyvZ9ZU8 tWDFKGwBfI1BfvGnFV7r1CN+wwF77I8d0Yf/6tx64iLYG+OVoGT1764fq+xOp/wu 33BNxGNfW6+tPrHrQp6QHPaC/lTAGVKimGe7usDSomLjDpyZBfU= =pzDk -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmp7/0AUHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSU0QhAAhtpaF2R3Dnp2+rNaCBEnqmdEqU8f LgK48CXz/a97wJi1QIXfVihajkEBrxi1+j01TJNzEQcFuW2UkXoRbn97ZaPathd+ GoOv+da5IU6e1FwctdHCWXff8Y6tkdkYTP7bAC6/n7m146muNt99MSO1Htkb3x5i 0klXsu+fHQQ+EYcUo31secuMJbC1R94JhF1Oz+MOsSygNbe64e6aJJS3XkZ1x1py 2TeP+/AF53AwYtUx1z0zdHP/xLsyIJnsPmt5Jfzbt3UtKTBOP/IAoyvDSjGRa9kb E7wWnJ7z5GRwZAk4L7kbtrs7nruNSQT8QbHERw87b1uFA2N+gl5k7M+j3pEXdQgo K63uzCoNPyoIsghgg0f5fXBz28eE2UsG9W4JkNfEGcjJK7cSAX7/68dsY4is/tJs Rjy+uLRcBCLtcHOgMZQNTSISAqWt1RBdU6AElKviFNR1nw05xCN9jDRB9xEwYNo/ ZEW9hwjAVfjeD/Yrzs8vqBRYZqyD6lgZkGcM5cNUGTClPbrK+QmVQZXhuDH1HT4o aw1mwFX6FFUrfYKm5nHUWIelh6hETFt2T6L8L3edxRAzC/NYVcrx7KFzTq5387eV HXy/Y4xSimaaCR32tgkeUyv6ZRd8M/m7G4BW6q4ObJq/mKFYsv5VcQYgpAXHRxa8 mW1136cLsgBTRpk= =Dxt8 -----END PGP SIGNATURE----- Merge tag 'clk-meson-v7.3-1' of ssh://github.com/BayLibre/clk-meson into clk-amlogic Pull Amlogic clk driver updates from Jerome Brunet: - Fix the incorrect parent number of the 32k clock on Amlogic GXBB - Add the AO and peripheral clock controllers for the new Amlogic A9 chip * tag 'clk-meson-v7.3-1' of ssh://github.com/BayLibre/clk-meson: clk: amlogic: Add A9 peripherals clock controller driver dt-bindings: clock: Add Amlogic A9 peripherals clock controller clk: amlogic: Add A9 AO clock controller driver dt-bindings: clock: Add Amlogic A9 AO clock controller clk: meson: align gxbb_32k_clk_sel number of parents with actual count |
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| .. | ||
| a1-peripherals.c | ||
| a1-pll.c | ||
| a9-aoclk.c | ||
| a9-peripherals.c | ||
| axg-aoclk.c | ||
| axg-audio.c | ||
| axg.c | ||
| c3-peripherals.c | ||
| c3-pll.c | ||
| clk-cpu-dyndiv.c | ||
| clk-cpu-dyndiv.h | ||
| clk-dualdiv.c | ||
| clk-dualdiv.h | ||
| clk-mpll.c | ||
| clk-mpll.h | ||
| clk-phase.c | ||
| clk-phase.h | ||
| clk-pll.c | ||
| clk-pll.h | ||
| clk-regmap.c | ||
| clk-regmap.h | ||
| g12a-aoclk.c | ||
| g12a.c | ||
| gxbb-aoclk.c | ||
| gxbb.c | ||
| Kconfig | ||
| Makefile | ||
| meson-aoclk.c | ||
| meson-aoclk.h | ||
| meson-clkc-utils.c | ||
| meson-clkc-utils.h | ||
| meson8-ddr.c | ||
| meson8b.c | ||
| parm.h | ||
| s4-peripherals.c | ||
| s4-pll.c | ||
| sclk-div.c | ||
| sclk-div.h | ||
| t7-peripherals.c | ||
| t7-pll.c | ||
| vclk.c | ||
| vclk.h | ||
| vid-pll-div.c | ||
| vid-pll-div.h | ||