github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-12 16:18:45 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity

clk: amlogic: use probe helper in mmio based controllers

Browse Source 
Factorize the probe function of the mmio based amlogic clock controllers
using the newly introduced probe helper. This removes a fair amount
of duplicated code.

Reviewed-by: Chuan Liu <chuan.liu@amlogic.com>
Link: https://lore.kernel.org/r/20250825-meson-clk-cleanup-24-v2-3-0f402f01e117@baylibre.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
This commit is contained in:
Jerome Brunet 2025-08-25 16:26:28 +02:00
parent 480197ceec
commit d7c001bd76
7 changed files with 63 additions and 301 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

50
drivers/clk/meson/a1-peripherals.c
View File

@ -2057,54 +2057,24 @@ static struct clk_hw *a1_peripherals_hw_clks[] = {
[CLKID_DMC_SEL2] = &a1_dmc_sel2.hw,
};
static const struct regmap_config a1_peripherals_regmap_cfg = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.max_register = DMC_CLK_CTRL,
static const struct meson_clkc_data a1_peripherals_clkc_data = {
.hw_clks = {
.hws = a1_peripherals_hw_clks,
.num = ARRAY_SIZE(a1_peripherals_hw_clks),
},
};
static struct meson_clk_hw_data a1_peripherals_clks = {
.hws = a1_peripherals_hw_clks,
.num = ARRAY_SIZE(a1_peripherals_hw_clks),
};
static int a1_peripherals_clkc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
void __iomem *base;
struct regmap *map;
int clkid, err;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return dev_err_probe(dev, PTR_ERR(base),
"can't ioremap resource\n");
map = devm_regmap_init_mmio(dev, base, &a1_peripherals_regmap_cfg);
if (IS_ERR(map))
return dev_err_probe(dev, PTR_ERR(map),
"can't init regmap mmio region\n");
for (clkid = 0; clkid < a1_peripherals_clks.num; clkid++) {
err = devm_clk_hw_register(dev, a1_peripherals_clks.hws[clkid]);
if (err)
return dev_err_probe(dev, err,
"clock[%d] registration failed\n",
clkid);
}
return devm_of_clk_add_hw_provider(dev, meson_clk_hw_get, &a1_peripherals_clks);
}
static const struct of_device_id a1_peripherals_clkc_match_table[] = {
{ .compatible = "amlogic,a1-peripherals-clkc", },
{
.compatible = "amlogic,a1-peripherals-clkc",
.data = &a1_peripherals_clkc_data,
},
{}
};
MODULE_DEVICE_TABLE(of, a1_peripherals_clkc_match_table);
static struct platform_driver a1_peripherals_clkc_driver = {
.probe = a1_peripherals_clkc_probe,
.probe = meson_clkc_mmio_probe,
.driver = {
.name = "a1-peripherals-clkc",
.of_match_table = a1_peripherals_clkc_match_table,

52
drivers/clk/meson/a1-pll.c
View File

@ -295,56 +295,24 @@ static struct clk_hw *a1_pll_hw_clks[] = {
[CLKID_HIFI_PLL] = &a1_hifi_pll.hw,
};
static const struct regmap_config a1_pll_regmap_cfg = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.max_register = ANACTRL_HIFIPLL_STS,
static const struct meson_clkc_data a1_pll_clkc_data = {
.hw_clks = {
.hws = a1_pll_hw_clks,
.num = ARRAY_SIZE(a1_pll_hw_clks),
},
};
static struct meson_clk_hw_data a1_pll_clks = {
.hws = a1_pll_hw_clks,
.num = ARRAY_SIZE(a1_pll_hw_clks),
};
static int a1_pll_clkc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
void __iomem *base;
struct regmap *map;
int clkid, err;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return dev_err_probe(dev, PTR_ERR(base),
"can't ioremap resource\n");
map = devm_regmap_init_mmio(dev, base, &a1_pll_regmap_cfg);
if (IS_ERR(map))
return dev_err_probe(dev, PTR_ERR(map),
"can't init regmap mmio region\n");
/* Register clocks */
for (clkid = 0; clkid < a1_pll_clks.num; clkid++) {
err = devm_clk_hw_register(dev, a1_pll_clks.hws[clkid]);
if (err)
return dev_err_probe(dev, err,
"clock[%d] registration failed\n",
clkid);
}
return devm_of_clk_add_hw_provider(dev, meson_clk_hw_get,
&a1_pll_clks);
}
static const struct of_device_id a1_pll_clkc_match_table[] = {
{ .compatible = "amlogic,a1-pll-clkc", },
{
.compatible = "amlogic,a1-pll-clkc",
.data = &a1_pll_clkc_data,
},
{}
};
MODULE_DEVICE_TABLE(of, a1_pll_clkc_match_table);
static struct platform_driver a1_pll_clkc_driver = {
.probe = a1_pll_clkc_probe,
.probe = meson_clkc_mmio_probe,
.driver = {
.name = "a1-pll-clkc",
.of_match_table = a1_pll_clkc_match_table,

49
drivers/clk/meson/c3-peripherals.c
View File

@ -2091,52 +2091,17 @@ static struct clk_hw *c3_peripherals_hw_clks[] = {
[CLKID_VAPB] = &c3_vapb.hw,
};
static const struct regmap_config c3_peripherals_regmap_cfg = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.max_register = NNA_CLK_CTRL,
static const struct meson_clkc_data c3_peripherals_clkc_data = {
.hw_clks = {
.hws = c3_peripherals_hw_clks,
.num = ARRAY_SIZE(c3_peripherals_hw_clks),
},
};
static struct meson_clk_hw_data c3_peripherals_clks = {
.hws = c3_peripherals_hw_clks,
.num = ARRAY_SIZE(c3_peripherals_hw_clks),
};
static int c3_peripherals_clkc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct regmap *regmap;
void __iomem *base;
int clkid, ret;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return PTR_ERR(base);
regmap = devm_regmap_init_mmio(dev, base, &c3_peripherals_regmap_cfg);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
for (clkid = 0; clkid < c3_peripherals_clks.num; clkid++) {
/* array might be sparse */
if (!c3_peripherals_clks.hws[clkid])
continue;
ret = devm_clk_hw_register(dev, c3_peripherals_clks.hws[clkid]);
if (ret) {
dev_err(dev, "Clock registration failed\n");
return ret;
}
}
return devm_of_clk_add_hw_provider(dev, meson_clk_hw_get,
&c3_peripherals_clks);
}
static const struct of_device_id c3_peripherals_clkc_match_table[] = {
{
.compatible = "amlogic,c3-peripherals-clkc",
.data = &c3_peripherals_clkc_data,
},
{ /* sentinel */ }
};
@ -2144,7 +2109,7 @@ static const struct of_device_id c3_peripherals_clkc_match_table[] = {
MODULE_DEVICE_TABLE(of, c3_peripherals_clkc_match_table);
static struct platform_driver c3_peripherals_clkc_driver = {
.probe = c3_peripherals_clkc_probe,
.probe = meson_clkc_mmio_probe,
.driver = {
.name = "c3-peripherals-clkc",
.of_match_table = c3_peripherals_clkc_match_table,

49
drivers/clk/meson/c3-pll.c
View File

@ -653,59 +653,24 @@ static struct clk_hw *c3_pll_hw_clks[] = {
[CLKID_MCLK1] = &c3_mclk1.hw
};
static const struct regmap_config c3_pll_regmap_cfg = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.max_register = ANACTRL_MPLL_CTRL4,
static const struct meson_clkc_data c3_pll_clkc_data = {
.hw_clks = {
.hws = c3_pll_hw_clks,
.num = ARRAY_SIZE(c3_pll_hw_clks),
},
};
static struct meson_clk_hw_data c3_pll_clks = {
.hws = c3_pll_hw_clks,
.num = ARRAY_SIZE(c3_pll_hw_clks),
};
static int c3_pll_clkc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct regmap *regmap;
void __iomem *base;
int clkid, ret;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return PTR_ERR(base);
regmap = devm_regmap_init_mmio(dev, base, &c3_pll_regmap_cfg);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
for (clkid = 0; clkid < c3_pll_clks.num; clkid++) {
/* array might be sparse */
if (!c3_pll_clks.hws[clkid])
continue;
ret = devm_clk_hw_register(dev, c3_pll_clks.hws[clkid]);
if (ret) {
dev_err(dev, "Clock registration failed\n");
return ret;
}
}
return devm_of_clk_add_hw_provider(dev, meson_clk_hw_get,
&c3_pll_clks);
}
static const struct of_device_id c3_pll_clkc_match_table[] = {
{
.compatible = "amlogic,c3-pll-clkc",
.data = &c3_pll_clkc_data,
},
{}
};
MODULE_DEVICE_TABLE(of, c3_pll_clkc_match_table);
static struct platform_driver c3_pll_clkc_driver = {
.probe = c3_pll_clkc_probe,
.probe = meson_clkc_mmio_probe,
.driver = {
.name = "c3-pll-clkc",
.of_match_table = c3_pll_clkc_match_table,

57
drivers/clk/meson/meson8-ddr.c
View File

@ -83,57 +83,26 @@ static struct clk_hw *meson8_ddr_hw_clks[] = {
[DDR_CLKID_DDR_PLL] = &meson8_ddr_pll.hw,
};
static struct meson_clk_hw_data meson8_ddr_clks = {
.hws = meson8_ddr_hw_clks,
.num = ARRAY_SIZE(meson8_ddr_hw_clks),
static const struct meson_clkc_data meson8_ddr_clkc_data = {
.hw_clks = {
.hws = meson8_ddr_hw_clks,
.num = ARRAY_SIZE(meson8_ddr_hw_clks),
},
};
static const struct regmap_config meson8_ddr_regmap_cfg = {
.reg_bits = 8,
.val_bits = 32,
.reg_stride = 4,
.max_register = DDR_CLK_STS,
};
static int meson8_ddr_clkc_probe(struct platform_device *pdev)
{
struct regmap *regmap;
void __iomem *base;
struct clk_hw *hw;
int ret, i;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return PTR_ERR(base);
regmap = devm_regmap_init_mmio(&pdev->dev, base,
&meson8_ddr_regmap_cfg);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
/* Register all clks */
for (i = 0; i < meson8_ddr_clks.num; i++) {
hw = meson8_ddr_clks.hws[i];
ret = devm_clk_hw_register(&pdev->dev, hw);
if (ret) {
dev_err(&pdev->dev, "Clock registration failed\n");
return ret;
}
}
return devm_of_clk_add_hw_provider(&pdev->dev, meson_clk_hw_get,
&meson8_ddr_clks);
}
static const struct of_device_id meson8_ddr_clkc_match_table[] = {
{ .compatible = "amlogic,meson8-ddr-clkc" },
{ .compatible = "amlogic,meson8b-ddr-clkc" },
{
.compatible = "amlogic,meson8-ddr-clkc",
.data = &meson8_ddr_clkc_data,
}, {
.compatible = "amlogic,meson8b-ddr-clkc",
.data = &meson8_ddr_clkc_data,
},
{ /* sentinel */ }
};
static struct platform_driver meson8_ddr_clkc_driver = {
.probe = meson8_ddr_clkc_probe,
.probe = meson_clkc_mmio_probe,
.driver = {
.name = "meson8-ddr-clkc",
.of_match_table = meson8_ddr_clkc_match_table,

49
drivers/clk/meson/s4-peripherals.c
View File

@ -3449,59 +3449,24 @@ static struct clk_hw *s4_peripherals_hw_clks[] = {
[CLKID_HDCP22_SKPCLK] = &s4_hdcp22_skpclk.hw,
};
static const struct regmap_config s4_peripherals_regmap_cfg = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.max_register = CLKCTRL_DEMOD_CLK_CTRL,
static const struct meson_clkc_data s4_peripherals_clkc_data = {
.hw_clks = {
.hws = s4_peripherals_hw_clks,
.num = ARRAY_SIZE(s4_peripherals_hw_clks),
},
};
static struct meson_clk_hw_data s4_peripherals_clks = {
.hws = s4_peripherals_hw_clks,
.num = ARRAY_SIZE(s4_peripherals_hw_clks),
};
static int s4_peripherals_clkc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct regmap *regmap;
void __iomem *base;
int ret, i;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return dev_err_probe(dev, PTR_ERR(base),
"can't ioremap resource\n");
regmap = devm_regmap_init_mmio(dev, base, &s4_peripherals_regmap_cfg);
if (IS_ERR(regmap))
return dev_err_probe(dev, PTR_ERR(regmap),
"can't init regmap mmio region\n");
for (i = 0; i < s4_peripherals_clks.num; i++) {
/* array might be sparse */
if (!s4_peripherals_clks.hws[i])
continue;
ret = devm_clk_hw_register(dev, s4_peripherals_clks.hws[i]);
if (ret)
return dev_err_probe(dev, ret,
"clock[%d] registration failed\n", i);
}
return devm_of_clk_add_hw_provider(dev, meson_clk_hw_get, &s4_peripherals_clks);
}
static const struct of_device_id s4_peripherals_clkc_match_table[] = {
{
.compatible = "amlogic,s4-peripherals-clkc",
.data = &s4_peripherals_clkc_data,
},
{}
};
MODULE_DEVICE_TABLE(of, s4_peripherals_clkc_match_table);
static struct platform_driver s4_peripherals_clkc_driver = {
.probe = s4_peripherals_clkc_probe,
.probe = meson_clkc_mmio_probe,
.driver = {
.name = "s4-peripherals-clkc",
.of_match_table = s4_peripherals_clkc_match_table,

58
drivers/clk/meson/s4-pll.c
View File

@ -798,66 +798,26 @@ static const struct reg_sequence s4_pll_init_regs[] = {
{ .reg = ANACTRL_MPLL_CTRL0, .def = 0x00000543 },
};
static const struct regmap_config s4_pll_clkc_regmap_cfg = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.max_register = ANACTRL_HDMIPLL_CTRL0,
static const struct meson_clkc_data s4_pll_clkc_data = {
.hw_clks = {
.hws = s4_pll_hw_clks,
.num = ARRAY_SIZE(s4_pll_hw_clks),
},
.init_regs = s4_pll_init_regs,
.init_count = ARRAY_SIZE(s4_pll_init_regs),
};
static struct meson_clk_hw_data s4_pll_clks = {
.hws = s4_pll_hw_clks,
.num = ARRAY_SIZE(s4_pll_hw_clks),
};
static int s4_pll_clkc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct regmap *regmap;
void __iomem *base;
int ret, i;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return dev_err_probe(dev, PTR_ERR(base),
"can't ioremap resource\n");
regmap = devm_regmap_init_mmio(dev, base, &s4_pll_clkc_regmap_cfg);
if (IS_ERR(regmap))
return dev_err_probe(dev, PTR_ERR(regmap),
"can't init regmap mmio region\n");
ret = regmap_multi_reg_write(regmap, s4_pll_init_regs, ARRAY_SIZE(s4_pll_init_regs));
if (ret)
return dev_err_probe(dev, ret,
"Failed to init registers\n");
/* Register clocks */
for (i = 0; i < s4_pll_clks.num; i++) {
/* array might be sparse */
if (!s4_pll_clks.hws[i])
continue;
ret = devm_clk_hw_register(dev, s4_pll_clks.hws[i]);
if (ret)
return dev_err_probe(dev, ret,
"clock[%d] registration failed\n", i);
}
return devm_of_clk_add_hw_provider(dev, meson_clk_hw_get,
&s4_pll_clks);
}
static const struct of_device_id s4_pll_clkc_match_table[] = {
{
.compatible = "amlogic,s4-pll-clkc",
.data = &s4_pll_clkc_data,
},
{}
};
MODULE_DEVICE_TABLE(of, s4_pll_clkc_match_table);
static struct platform_driver s4_pll_clkc_driver = {
.probe = s4_pll_clkc_probe,
.probe = meson_clkc_mmio_probe,
.driver = {
.name = "s4-pll-clkc",
.of_match_table = s4_pll_clkc_match_table,