Commit Graph

1444636 Commits

Author SHA1 Message Date
Krzysztof Kozlowski
9f2f61e336 aspeed: First batch of driver changes for v7.2
While bc13f14f5c ("soc: aspeed: cleanup dead default for
 ASPEED_SOCINFO") was committed just now it has been in -next for a while as
 b333a0f1c857411d83a02aa6f1d9ecc7666d6179. The commit is fresh as I moved it
 between branches.
 
 Other than that it's just the one other patch from Krzysztof tidying up the
 location of MODULE_DEVICE_TABLE().
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Merge tag 'aspeed-7.2-drivers-0' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/drivers

aspeed: First batch of driver changes for v7.2

While bc13f14f5c ("soc: aspeed: cleanup dead default for
ASPEED_SOCINFO") was committed just now it has been in -next for a while as
b333a0f1c857411d83a02aa6f1d9ecc7666d6179. The commit is fresh as I moved it
between branches.

Other than that it's just the one other patch from Krzysztof tidying up the
location of MODULE_DEVICE_TABLE().

* tag 'aspeed-7.2-drivers-0' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/bmc/linux:
  soc: aspeed: cleanup dead default for ASPEED_SOCINFO
  soc: aspeed: Move MODULE_DEVICE_TABLE next to the table itself

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-06-09 14:05:28 +02:00
Krzysztof Kozlowski
a68c459ac6 Allwinner driver changes for 7.2
Mostly changes to the SRAM driver to allow for one SRAM region to be
 "claimed" by multiple changes. When a region is "claimed" it is removed
 or disconnected from the CPU's view. This is needed on the H6 and H616,
 which have one alias region seemingly shared between the video codec
 engine and the display engine.
 
 One minor fix for the RSB driver is also included.
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Merge tag 'sunxi-drivers-for-7.2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/drivers

Allwinner driver changes for 7.2

Mostly changes to the SRAM driver to allow for one SRAM region to be
"claimed" by multiple changes. When a region is "claimed" it is removed
or disconnected from the CPU's view. This is needed on the H6 and H616,
which have one alias region seemingly shared between the video codec
engine and the display engine.

One minor fix for the RSB driver is also included.

* tag 'sunxi-drivers-for-7.2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  bus: sunxi-rsb: Always check register address validity
  soc: sunxi: sram: Add H616 SRAM regions
  soc: sunxi: sram: Support claiming multiple regions per device
  soc: sunxi: sram: Allow SRAM to be claimed multiple times
  soc: sunxi: sram: Const-ify sunxi_sram_func data and references
  dt-bindings: sram: sunxi-sram: Add H616 SRAM regions
  dt-bindings: sram: Document Allwinner H616 VE SRAM

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-06-09 13:38:15 +02:00
Krzysztof Kozlowski
a451dd4b43 Renesas driver updates for v7.2 (take two)
- Identify the R-Car M3Le SoC,
   - Add Multifunctional Interface (MFIS) support for R-Car V4H and V4M.
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Merge tag 'renesas-drivers-for-v7.2-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers

Renesas driver updates for v7.2 (take two)

  - Identify the R-Car M3Le SoC,
  - Add Multifunctional Interface (MFIS) support for R-Car V4H and V4M.

* tag 'renesas-drivers-for-v7.2-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: rcar-mfis: Add R-Car V4H/V4M support
  dt-bindings: soc: renesas: mfis: Add R-Car V4H/V4M support
  soc: renesas: Identify R-Car R8A779MD M3Le SoC

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-06-09 12:51:41 +02:00
Krzysztof Kozlowski
adbd66a8f7 MediaTek SoC driver updates
This adds subsys ID compatibility in MediaTek CMDQ, paving
 the way for adding support for the MT8196 SoC, and fixes
 the Multimedia System (MMSYS) routing masks for the MT8167
 SoC.
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Merge tag 'mtk-soc-for-v7.2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers

MediaTek SoC driver updates

This adds subsys ID compatibility in MediaTek CMDQ, paving
the way for adding support for the MT8196 SoC, and fixes
the Multimedia System (MMSYS) routing masks for the MT8167
SoC.

* tag 'mtk-soc-for-v7.2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
  soc: mediatek: mtk-mmsys: Restore MT8167 routing masks lost during merge
  soc: mediatek: mtk-cmdq: Add cmdq_pkt_jump_rel_temp() for removing shift_pa
  soc: mediatek: Use pkt_write function pointer for subsys ID compatibility

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-06-09 12:41:41 +02:00
Linus Walleij
6bd8fb9f1c arm64: Xilinx SOC changes for 7.2
firmware:
 - Add CSU register discovery with sysfs interface
 
 zynqmp_power:
 - Fix race condition in event registration
 - Fix shutdown and free rx mailbox channel
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Merge tag 'zynqmp-soc-for-7.2' of https://github.com/Xilinx/linux-xlnx into soc/drivers

arm64: Xilinx SOC changes for 7.2

firmware:
- Add CSU register discovery with sysfs interface

zynqmp_power:
- Fix race condition in event registration
- Fix shutdown and free rx mailbox channel

* tag 'zynqmp-soc-for-7.2' of https://github.com/Xilinx/linux-xlnx:
  firmware: zynqmp: Add dynamic CSU register discovery and sysfs interface
  Documentation: ABI: add sysfs interface for ZynqMP CSU registers
  soc: xilinx: Shutdown and free rx mailbox channel
  soc: xilinx: Fix race condition in event registration

Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-06-04 09:38:57 +02:00
Julian Braha
bc13f14f5c soc: aspeed: cleanup dead default for ASPEED_SOCINFO
The same kconfig 'default' statement appears twice for ASPEED_SOCINFO,
which is unnecessary.

This dead code was found by kconfirm, a static analysis tool for Kconfig.

Signed-off-by: Julian Braha <julianbraha@gmail.com>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2026-06-03 10:47:55 +09:30
Arnd Bergmann
1f512d1f74 OP-TEE updates for 7.2
- Fix kernel-doc warnings in optee_private.h and optee_msg.h
 - Allow MT_NORMAL_TAGGED shared memory to support ARM64 MTE buffers
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Merge tag 'optee-for-v7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee into soc/drivers

OP-TEE updates for 7.2

- Fix kernel-doc warnings in optee_private.h and optee_msg.h
- Allow MT_NORMAL_TAGGED shared memory to support ARM64 MTE buffers

* tag 'optee-for-v7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee:
  tee: optee: fix kernel-doc warnings
  tee: optee: Allow MT_NORMAL_TAGGED shared memory

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-05-30 00:25:12 +02:00
Arnd Bergmann
1e09b55daf AMD-TEE update for 7.2
Store buffer ID in tee_shm->sec_world_id and remove internal tracking
 structures to align with other TEE drivers
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Merge tag 'amdtee-for-v7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee into soc/drivers

AMD-TEE update for 7.2

Store buffer ID in tee_shm->sec_world_id and remove internal tracking
structures to align with other TEE drivers

* tag 'amdtee-for-v7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee:
  tee: amdtee: store buffer ID in tee_shm->sec_world_id

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-05-30 00:23:15 +02:00
Arnd Bergmann
9f468bd841 Arm FF-A + SMCCC updates for v7.2
1. The FF-A core is moved onto the driver model by reverting the earlier
    rootfs initcall change and registering the core as a platform driver with
    a synthetic arm-ffa platform device. Enumerated FF-A devices are now
    parented below the FF-A core device, and probing is deferred until pKVM
    has completed its FF-A proxy initialisation.
 
 2. The platform-driver conversion is also adjusted so systems without FF-A
    support treat early unsupported transport/version discovery as a quiet
    probe miss rather than a failed matched probe.
 
 3. The register-based partition discovery path now honors the descriptor
    size reported by FFA_PARTITION_INFO_GET_REGS. This keeps parsing aligned
    for newer FF-A descriptor layouts while still copying only the fields the
    driver understands.
 
 4. Also included is an Arm SMCCC fix for the optional SOC_ID name call: the
    name query now uses the SMC64 function ID required for returning eight
    characters per register.
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Merge tag 'ffa-updates-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers

Arm FF-A + SMCCC updates for v7.2

1. The FF-A core is moved onto the driver model by reverting the earlier
   rootfs initcall change and registering the core as a platform driver with
   a synthetic arm-ffa platform device. Enumerated FF-A devices are now
   parented below the FF-A core device, and probing is deferred until pKVM
   has completed its FF-A proxy initialisation.

2. The platform-driver conversion is also adjusted so systems without FF-A
   support treat early unsupported transport/version discovery as a quiet
   probe miss rather than a failed matched probe.

3. The register-based partition discovery path now honors the descriptor
   size reported by FFA_PARTITION_INFO_GET_REGS. This keeps parsing aligned
   for newer FF-A descriptor layouts while still copying only the fields the
   driver understands.

4. Also included is an Arm SMCCC fix for the optional SOC_ID name call: the
   name query now uses the SMC64 function ID required for returning eight
   characters per register.

* tag 'ffa-updates-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  firmware: arm_ffa: Treat missing FF-A feature on a platform as a probe miss
  firmware: smccc: Fix Arm SMCCC SOC_ID name call
  firmware: arm_ffa: Honor partition info descriptor size
  firmware: arm_ffa: Defer probe until pKVM is initialized
  firmware: arm_ffa: Set the core device as FF-A device parent
  firmware: arm_ffa: Register core as a platform driver
  Revert "firmware: arm_ffa: Change initcall level of ffa_init() to rootfs_initcall"
  firmware: arm_ffa: Fix sched-recv callback partition lookup
  firmware: arm_ffa: Snapshot notifier callbacks under lock
  firmware: arm_ffa: Align RxTx buffer size before mapping
  firmware: arm_ffa: Validate framework notification message layout
  firmware: arm_ffa: Keep framework RX release under lock
  firmware: arm_ffa: Bound PARTITION_INFO_GET_REGS copies
  firmware: arm_ffa: Unregister bus notifier on teardown for FF-A v1.0
  firmware: arm_ffa: Fix per-vcpu self notifications handling in workqueue
  firmware: arm_ffa: Avoid collapsing NPI work from different CPUs
  firmware: arm_ffa: Skip free_pages on RX buffer alloc failure
  firmware: arm_ffa: Check for NULL FF-A ID table while driver registration

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-05-30 00:18:07 +02:00
Arnd Bergmann
1499b84142 Arm SCMI updates for v7.2
1. Improve SCMI clock handling with a protocol-level determine_rate operation,
    simplified per-clock rate properties, dynamic rate allocation, bounded
    iterator support, lazy full-rate discovery, and hardened parent/rate
    enumeration.
 
 2. Fix several SCMI bounds and payload validation issues, including clock rate
    discovery OOB handling, power domain name lookup, Powercap domain state
    access, BASE_ERROR_EVENT and SENSOR_UPDATE payload sizing, and sensor config
    width handling.
 
 3. Rework SCMI transport probing for virtio and OP-TEE using per-instance
    transport handles and a generic transport supplier, removing the need to
    register SCMI core drivers from transport probe paths.
 
 4. Add i.MX SCMI MISC reset reason support and print i.MX95 boot/shutdown
    reasons via the System Manager interface.
 
 5. Clean up SCMI core internals, including base-info naming, quirk parsing and
    table iteration, and list iteration.
 
 6. Fix SCPI clock provider removal so child clock providers are unregistered
    using the same DT nodes used at registration time.
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Merge tag 'scmi-updates-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers

Arm SCMI updates for v7.2

1. Improve SCMI clock handling with a protocol-level determine_rate operation,
   simplified per-clock rate properties, dynamic rate allocation, bounded
   iterator support, lazy full-rate discovery, and hardened parent/rate
   enumeration.

2. Fix several SCMI bounds and payload validation issues, including clock rate
   discovery OOB handling, power domain name lookup, Powercap domain state
   access, BASE_ERROR_EVENT and SENSOR_UPDATE payload sizing, and sensor config
   width handling.

3. Rework SCMI transport probing for virtio and OP-TEE using per-instance
   transport handles and a generic transport supplier, removing the need to
   register SCMI core drivers from transport probe paths.

4. Add i.MX SCMI MISC reset reason support and print i.MX95 boot/shutdown
   reasons via the System Manager interface.

5. Clean up SCMI core internals, including base-info naming, quirk parsing and
   table iteration, and list iteration.

6. Fix SCPI clock provider removal so child clock providers are unregistered
   using the same DT nodes used at registration time.

* tag 'scmi-updates-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: (31 commits)
  firmware: arm_scmi: optee: Rework transport probe sequence
  firmware: arm_scmi: virtio: Rework transport probe sequence
  firmware: arm_scmi: Add a generic transport supplier
  firmware: arm_scmi: Add transport instance handles
  firmware: arm_scmi: Fix OOB in scmi_power_name_get()
  firmware: arm_scmi: Validate Powercap domains before state access
  firmware: arm_scmi: Validate SENSOR_UPDATE payload size
  firmware: arm_scmi: Validate BASE_ERROR_EVENT payload size
  firmware: arm_scmi: Read sensor config as 32-bit value
  clk: scpi: Unregister child clock providers on remove
  firmware: arm_scmi: Introduce all_rates_get clock operation
  firmware: arm_scmi: Fix OOB in scmi_clock_describe_rates_get_lazy()
  firmware: arm_scmi: Use bound iterators to minimize discovered rates
  firmware: arm_scmi: Use proper iter_response_bound_cleanup() name
  firmware: arm_scmi: Fix bound iterators returning too many items
  firmware: arm_scmi: Add bound iterators support
  firmware: arm_scmi: Refactor iterators internal allocation
  firmware: arm_scmi: Harden clock parents discovery
  firmware: arm_scmi: Make clock rates allocation dynamic
  firmware: arm_scmi: Drop unused clock rate interfaces
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-05-30 00:04:46 +02:00
Arnd Bergmann
b6a6fae6c5 Qualcomm driver updates for v7.2
Enable QSEECOM and with that access to UEFI variables on the Surface Pro
 12in laptop.
 
 Refactor the Geni Serial-Engine helper code to allow the serial engine
 drivers (such as I2C) to operate on targets where power and performance
 is controlled through an SCMI server instead of individual resources in
 Linux.
 
 Extend the LLCC driver to support reading its data from a System Cache
 Table (SCT) in memory instead of being hard coded per platform in the
 driver. Also add support for the Eliza platform.
 
 Add support for the Hawi platform to pd-mapper.
 
 Switch the SMEM driver to track partitions using xarray to handle the
 ever growing number of hosts better.
 
 Extend the socinfo driver with knowledge about the Nord, SM7750,
 IPQ9650, and Shikra SoCs, as well as PMAU0102, PMC1020H, PMIV0102, and
 PMIV0104 PMICs.
 
 Define UBWC 3.1 and add a couple of convenient helpers in the UBWC
 library for MDSS and Adreno.
 
 Fix a memory leak in the WCNSS firmware download mechanism.
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Merge tag 'qcom-drivers-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v7.2

Enable QSEECOM and with that access to UEFI variables on the Surface Pro
12in laptop.

Refactor the Geni Serial-Engine helper code to allow the serial engine
drivers (such as I2C) to operate on targets where power and performance
is controlled through an SCMI server instead of individual resources in
Linux.

Extend the LLCC driver to support reading its data from a System Cache
Table (SCT) in memory instead of being hard coded per platform in the
driver. Also add support for the Eliza platform.

Add support for the Hawi platform to pd-mapper.

Switch the SMEM driver to track partitions using xarray to handle the
ever growing number of hosts better.

Extend the socinfo driver with knowledge about the Nord, SM7750,
IPQ9650, and Shikra SoCs, as well as PMAU0102, PMC1020H, PMIV0102, and
PMIV0104 PMICs.

Define UBWC 3.1 and add a couple of convenient helpers in the UBWC
library for MDSS and Adreno.

Fix a memory leak in the WCNSS firmware download mechanism.

* tag 'qcom-drivers-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (40 commits)
  soc: qcom: geni-se: Introduce helper APIs for performance control
  soc: qcom: geni-se: Introduce helper API for attaching power domains
  soc: qcom: geni-se: Add resources activation/deactivation helpers
  soc: qcom: geni-se: Handle core clk in geni_se_clks_off() and geni_se_clks_on()
  soc: qcom: geni-se: Introduce helper API for resource initialization
  soc: qcom: geni-se: Add geni_icc_set_bw_ab() function
  soc: qcom: geni-se: Refactor geni_icc_get() and make qup-memory ICC path optional
  soc: qcom: llcc-qcom: Fix NULL vs IS_ERR() bug in qcom_llcc_get_fw_config()
  soc: qcom: llcc-qcom: Add support for Eliza
  dt-bindings: cache: qcom,llcc: Document Eliza LLCC block
  soc: qcom: ubwc: add helper controlling AMSBC enablement
  soc: qcom: ubwc: define helper for MDSS and Adreno drivers
  soc: qcom: ubwc: define UBWC 3.1
  soc: qcom: socinfo: Add SoC ID for Nord SA8797P
  dt-bindings: arm: qcom,ids: Add SoC ID for Nord SA8797P
  soc: qcom: socinfo: Add SoC ID for SM7750
  dt-bindings: arm: qcom,ids: Add SoC ID for SM7750
  soc: qcom: socinfo: Add PMIC PMAU0102
  soc: qcom: socinfo: Add PMIV0102 & PMIV0104 PMICs
  firmware: qcom: scm: Allow QSEECOM on Surface Pro 12in
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-05-30 00:02:42 +02:00
Wolfram Sang
b4d41ffa75 soc: renesas: rcar-mfis: Add R-Car V4H/V4M support
The above SoCs have a weird register layout for the mailbox registers.
So, encapsulate register offset calculation in a per-SoC callback. Other
than that, only a separate config struct and compatibles are needed.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260519075620.4128-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-29 14:42:29 +02:00
Wolfram Sang
2e9b940f07 dt-bindings: soc: renesas: mfis: Add R-Car V4H/V4M support
The above SoCs have only 12 mailboxes and do not have an extra register
space for mailboxes.  Everything is contained in the common register
set.  In addition to adding these SoCs, the other entries get updated to
enforce 2 register spaces and their specific number of interrupts.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260519075620.4128-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-29 14:42:29 +02:00
Sudeep Holla
18706ea68f firmware: arm_ffa: Treat missing FF-A feature on a platform as a probe miss
When FF-A initialisation is driven from a platform device probe, systems
that do not implement FF-A can return -EOPNOTSUPP from the early transport
or version discovery paths. Driver core treats that as a matched probe
failure and prints:

  |  arm-ffa arm-ffa: probe with driver arm-ffa failed with error -95

That is noisy for a firmware interface that can be absent on otherwise
valid systems. Driver core already treats -ENODEV and -ENXIO as quiet
rejected matches, so translate only the early unsupported discovery cases
to -ENODEV. Keep later setup failures unchanged so real FF-A
initialisation problems are still reported as probe failures.

Reported-by: Nathan Chancellor <nathan@kernel.org>
Closes: https://lore.kernel.org/all/20260523001148.GA1319283@ax162
Reviewed-by: Yeoreum Yun <yeoreum.yun@arm.com>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Link: https://patch.msgid.link/20260526103649.5684-1-sudeep.holla@kernel.org
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-27 10:14:23 +01:00
Ronak Jain
47d7bca76d firmware: zynqmp: Add dynamic CSU register discovery and sysfs interface
Add support for dynamically discovering and exposing Configuration
Security Unit (CSU) registers through sysfs. Leverage the existing
PM_QUERY_DATA API to discover available registers at runtime, making
the interface flexible and maintainable.

Key features:
- Dynamic register discovery using PM_QUERY_DATA API
  * PM_QID_GET_NODE_COUNT: Query number of available registers
  * PM_QID_GET_NODE_NAME: Query register names by index
- Automatic sysfs attribute creation under csu_registers/ group
- Read operations via existing IOCTL_READ_REG API
- Write operations via existing IOCTL_MASK_WRITE_REG API

The sysfs interface is created at:
  /sys/devices/platform/firmware:zynqmp-firmware/csu_registers/

Currently supported registers include:
  - multiboot (CSU_MULTI_BOOT)
  - idcode (CSU_IDCODE, read-only)
  - pcap-status (CSU_PCAP_STATUS, read-only)

The dynamic discovery approach allows firmware to control which
registers are exposed without requiring kernel changes, improving
maintainability and security.

The firmware does not currently expose per-register access mode
information, so the kernel cannot distinguish read-only registers
from read-write ones at discovery time. All discovered registers are
therefore created with sysfs mode 0644, and the firmware is
responsible for rejecting writes to registers it treats as read-only
(for example idcode and pcap-status); that error is propagated back
to userspace from the store callback. If a per-register access-mode
query is added to the firmware in the future, sysfs permissions can
be tightened to match.

CSU register discovery is an optional feature: on firmware that lacks
support for PM_QID_GET_NODE_COUNT or PM_QID_GET_NODE_NAME, the probe
returns gracefully without exposing any sysfs entries. To keep the
memory footprint minimal on that path, partial devm allocations made
during discovery are explicitly released on failure so that no memory
lingers until device unbind when the feature is unavailable.

Signed-off-by: Ronak Jain <ronak.jain@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260520093654.3303917-3-ronak.jain@amd.com
2026-05-25 16:09:15 +02:00
Ronak Jain
8ebebccf15 Documentation: ABI: add sysfs interface for ZynqMP CSU registers
Document the new sysfs interface that exposes Configuration Security
Unit (CSU) registers through the zynqmp-firmware driver.

The interface is available under:

  /sys/devices/platform/firmware:zynqmp-firmware/csu_registers/

The CSU registers are discovered at boot time using the PM_QUERY_DATA
firmware API. The following registers are currently supported:

  - multiboot     (CSU_MULTI_BOOT)
  - idcode        (CSU_IDCODE, read-only)
  - pcap-status   (CSU_PCAP_STATUS, read-only)

Read operations use the existing IOCTL_READ_REG firmware interface,
while write operations use IOCTL_MASK_WRITE_REG.

Access control is enforced by the firmware. Write attempts to
read-only registers are rejected by firmware even though the sysfs file
permissions allow writes.

Document the ABI entry accordingly.

Signed-off-by: Ronak Jain <ronak.jain@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260520093654.3303917-2-ronak.jain@amd.com
2026-05-25 16:09:12 +02:00
Marek Vasut
eaad5f2cb0 soc: renesas: Identify R-Car R8A779MD M3Le SoC
Add support for identifying the R-Car M3Le (R8A779MD) SoC.

The Renesas R-Car R8A779MD M3Le SoC is a variant of the already
supported R-Car M3-N SoC with reduced peripherals.
Enable support for the M3Le SoC through already existing ARCH_R8A77965
configuration symbol.  PRR reads 0x67c05501.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20260504144534.43745-6-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-25 12:03:04 +02:00
Samuel Holland
61192938a5 bus: sunxi-rsb: Always check register address validity
The register address was already validated for read operations in
regmap_sunxi_rsb_reg_read before being truncated to a u8. Write operations
have the same set of possible addresses, and the address is being truncated
from u32 to u8 here as well, so the same check is needed.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Fixes: d787dcdb9c ("bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus")
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20260301144939.1832806-1-andrej.skvortzov@gmail.com
Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-05-25 06:37:11 +08:00
Bjorn Andersson
23cee0d07a Merge branch '20260227061544.1785978-1-praveen.talari@oss.qualcomm.com' into drivers-for-7.2
Merge the refactoring and helper functions in the Qualcomm GENI Serial
Engine driver through a topic branch.

These changes will provide the ability to add support managing power and
performance for the GENI instances in platforms where these are
controlled as SCMI resources.

The patches are merged through a topic branch to avoid conflicts with other
changes, while making them available to other subsystems.

Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 22:00:31 -05:00
Praveen Talari
c012e28e9a soc: qcom: geni-se: Introduce helper APIs for performance control
The GENI Serial Engine (SE) drivers (I2C, SPI, and SERIAL) currently
manage performance levels and operating points directly. This resulting
in code duplication across drivers. such as configuring a specific level
or find and apply an OPP based on a clock frequency.

Introduce two new helper APIs, geni_se_set_perf_level() and
geni_se_set_perf_opp(), addresses this issue by providing a streamlined
method for the GENI Serial Engine (SE) drivers to find and set the OPP
based on the desired performance level, thereby eliminating redundancy.

Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260227061544.1785978-8-praveen.talari@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 21:56:38 -05:00
Praveen Talari
f1a325d281 soc: qcom: geni-se: Introduce helper API for attaching power domains
The GENI Serial Engine drivers (I2C, SPI, and SERIAL) currently handle
the attachment of power domains. This often leads to duplicated code
logic across different driver probe functions.

Introduce a new helper API, geni_se_domain_attach(), to centralize
the logic for attaching "power" and "perf" domains to the GENI SE
device.

Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260227061544.1785978-7-praveen.talari@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 21:56:38 -05:00
Praveen Talari
8f4ce470ff soc: qcom: geni-se: Add resources activation/deactivation helpers
The GENI SE protocol drivers (I2C, SPI, UART) implement similar resource
activation/deactivation sequences independently, leading to code
duplication.

Introduce geni_se_resources_activate()/geni_se_resources_deactivate() to
power on/off resources.The activate function enables ICC, clocks, and TLMM
whereas the deactivate function disables resources in reverse order
including OPP rate reset, clocks, ICC and TLMM.

Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260227061544.1785978-6-praveen.talari@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 21:56:38 -05:00
Praveen Talari
e5f54cda9d soc: qcom: geni-se: Handle core clk in geni_se_clks_off() and geni_se_clks_on()
Currently, core clk is handled individually in protocol drivers like
the I2C driver. Move this clock management to the common clock APIs
(geni_se_clks_on/off) that are already present in the common GENI SE
driver to maintain consistency across all protocol drivers.

Core clk is now properly managed alongside the other clocks (se->clk
and wrapper clocks) in the fundamental clock control functions,
eliminating the need for individual protocol drivers to handle this
clock separately.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260227061544.1785978-5-praveen.talari@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 21:56:38 -05:00
Praveen Talari
5b8a39dcf9 soc: qcom: geni-se: Introduce helper API for resource initialization
The GENI Serial Engine drivers (I2C, SPI, and SERIAL) currently duplicate
code for initializing shared resources such as clocks and interconnect
paths.

Introduce a new helper API, geni_se_resources_init(), to centralize this
initialization logic, improving modularity and simplifying the probe
function.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260227061544.1785978-4-praveen.talari@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 21:56:38 -05:00
Praveen Talari
f746fedb89 soc: qcom: geni-se: Add geni_icc_set_bw_ab() function
Add a new function geni_icc_set_bw_ab() that allows callers to set
average bandwidth values for all ICC (Interconnect) paths in a single
call. This function takes separate parameters for core, config, and DDR
average bandwidth values and applies them to the respective ICC paths.

This provides a more convenient API for drivers that need to configure
specific average bandwidth values.

Co-developed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260227061544.1785978-3-praveen.talari@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 21:56:38 -05:00
Praveen Talari
e231930279 soc: qcom: geni-se: Refactor geni_icc_get() and make qup-memory ICC path optional
The "qup-memory" interconnect path is optional and may not be defined
in all device trees. Unroll the loop-based ICC path initialization to
allow specific error handling for each path type.

The "qup-core" and "qup-config" paths remain mandatory and will fail
probe if missing, while "qup-memory" is now handled as optional and
skipped when not present in the device tree.

Co-developed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
Reviewed-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>
[...]
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260227061544.1785978-2-praveen.talari@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 21:56:37 -05:00
Dan Carpenter
db0ec1ad72 soc: qcom: llcc-qcom: Fix NULL vs IS_ERR() bug in qcom_llcc_get_fw_config()
The devm_memremap() function doesn't return NULL, it returns error
pointers.  Fix the error checking to match.

Fixes: ac23106a9b ("soc: qcom: llcc-qcom: get SCT descriptors from fw-populated memory")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/ag1N_rAHEQ1YJsa7@stanley.mountain
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 21:51:04 -05:00
Abel Vesa
0a4d53ae2c soc: qcom: llcc-qcom: Add support for Eliza
Eliza uses a 4-region LLCC register layout made up of two per-bank base
register regions together with the broadcast OR and AND regions.

So add this SoC specific configuration and its compatible string.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260513-eliza-llcc-v2-2-27381ae833d5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 16:16:03 -05:00
Abel Vesa
6487b12a87 dt-bindings: cache: qcom,llcc: Document Eliza LLCC block
Document the Last Level Cache Controller on Eliza SoC. Eliza LLCC has 2
base register regions and an additional AND, OR broadcast region, total 4
register regions.

Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260513-eliza-llcc-v2-1-27381ae833d5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21 16:15:49 -05:00
Cristian Marussi
524abd2fa6 firmware: arm_scmi: optee: Rework transport probe sequence
Use the new per-instance transport handles helpers to synchronize and
optionally defer the core SCMI driver probe up until the transport driver
has completely been initialized and it is fully operational as a supplier.

Introduce proper module init/exit routines while removing the ugly trick of
registering a driver from within the probe sequence of another one, just to
avoid to have to deal with probe deferrals.

Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://patch.msgid.link/20260510160527.3537474-5-cristian.marussi@arm.com
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-21 17:31:51 +01:00
Cristian Marussi
c08051901a firmware: arm_scmi: virtio: Rework transport probe sequence
Use the new per-instance transport handles helpers to synchronize and
optionally defer the core SCMI driver probe up until the transport driver
has completely been initialized and it is fully operational as a supplier.

Introduce proper module init/exit routines while removing the ugly trick of
registering a driver from within the probe sequence of another one, just to
avoid to have to deal with probe deferrals.

Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://patch.msgid.link/20260510160527.3537474-4-cristian.marussi@arm.com
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-21 17:31:51 +01:00
Cristian Marussi
ab6eb28a47 firmware: arm_scmi: Add a generic transport supplier
Add the capability to define a common generic transport supplier which
embeds the logic needed to support one single unique instance of transport
supplier.

Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://patch.msgid.link/20260510160527.3537474-3-cristian.marussi@arm.com
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-21 17:31:51 +01:00
Cristian Marussi
9dfae7d2ed firmware: arm_scmi: Add transport instance handles
SCMI transport drivers are initialized first and then the control is passed
to the SCMI core stack: some of these transports are dependent also on some
external subsytem which will have to be initialized upfront, before the
transport driver itself can be deemed operational.

Transport drivers like virtio or optee need a way to defer the core SCMI
probing till they are fully initialized and operational and also a way to
pass back the device reference to be used as a supplier while building the
devlink relations.

SCMI transport drivers can be probed multiple times when used in a multiple
instance configuration but the capability to carry-on with multiple probes
depends on the support provided by the underlying transport driver.

This change will also allow for the removal of the frowned-upon trick of
registering a platform driver only after the end of the transport drivers
porbe to avoid explicit probe deferrals.

Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://patch.msgid.link/20260510160527.3537474-2-cristian.marussi@arm.com
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-21 17:31:51 +01:00
Geert Uytterhoeven
f9ef3f66f4 firmware: arm_scmi: Fix OOB in scmi_power_name_get()
scmi_power_name_get() does not validate the domain number passed by the
external caller, which may lead to an out-of-bounds access.

Fix this by returning "unknown" for invalid domains, like
scmi_reset_name_get() does.

Fixes: 76a6550990 ("firmware: arm_scmi: add initial support for power protocol")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://patch.msgid.link/75caae28bdffb55199a0bc6cac5df112a966c608.1778838987.git.geert+renesas@glider.be
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-21 17:31:51 +01:00
Arnd Bergmann
b1700f8d6c Renesas driver updates for v7.2
- Add Multifunctional Interface (MFIS) mailbox and product register
     support for R-Car X5H,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-drivers-for-v7.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers

Renesas driver updates for v7.2

  - Add Multifunctional Interface (MFIS) mailbox and product register
    support for R-Car X5H,
  - Miscellaneous fixes and improvements.

* tag 'renesas-drivers-for-v7.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Convert to of_machine_get_match()
  soc: renesas: Add R-Car X5H PRR support
  soc: renesas: Add Renesas R-Car MFIS driver
  dt-bindings: soc: renesas: Document MFIS IP core
  soc: renesas: r9a09g057-sys: Move common code to a helper
  soc: renesas: r9a09g056-sys: Move common code to a helper
  soc: renesas: r9a09g047-sys: Move common code to a helper
  soc: renesas: r9a08g046-sysc: Move common code to a helper
  soc: renesas: r9a08g045-sysc: Move common code to a helper

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-05-20 12:19:01 +02:00
Sudeep Holla
fcca603c6a firmware: arm_scmi: Validate Powercap domains before state access
Powercap protocol v2 keeps local enable and last-cap state per domain.
The v2 enable helpers and disabled-domain cap_set path indexed that state
before checking that the supplied domain id was valid.

Validate the domain before touching the per-domain state.

Link: https://patch.msgid.link/20260517-scmi_fixes-v1-4-d86daec4defd@kernel.org
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-20 10:00:10 +01:00
Sudeep Holla
32bc5496b4 firmware: arm_scmi: Validate SENSOR_UPDATE payload size
SENSOR_UPDATE carries one or more sensor readings after the fixed
notification header. The parser derives the expected reading count
from the sensor description, but it did not verify that the received
payload contains those entries before parsing them.

Reject truncated update notifications before reading the variable
array.

Link: https://patch.msgid.link/20260517-scmi_fixes-v1-3-d86daec4defd@kernel.org
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-20 10:00:10 +01:00
Sudeep Holla
56e7e64cdd firmware: arm_scmi: Validate BASE_ERROR_EVENT payload size
BASE_ERROR_EVENT carries a variable number of message reports,
with the count encoded in error_status. The notification parser used
that count without checking whether the received payload contained all
reported entries.

Reject truncated payloads before copying the report array.

Link: https://patch.msgid.link/20260517-scmi_fixes-v1-2-d86daec4defd@kernel.org
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-20 10:00:10 +01:00
Sudeep Holla
f6fe7c3c00 firmware: arm_scmi: Read sensor config as 32-bit value
The SENSOR_CONFIG_GET response contains a 32-bit sensor_config field,
and the xfer is initialized with a 4-byte RX buffer. Reading it with
get_unaligned_le64() can consume bytes past the returned payload.

Use get_unaligned_le32() to match the protocol layout and the allocated
response size.

Fixes: 7b83c5f410 ("firmware: arm_scmi: Add SCMI v3.0 sensor configuration support")
Link: https://patch.msgid.link/20260517-scmi_fixes-v1-1-d86daec4defd@kernel.org
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-20 10:00:09 +01:00
Andre Przywara
70492cfce2 firmware: smccc: Fix Arm SMCCC SOC_ID name call
Commit 5f9c23abc4 ("firmware: smccc: Support optional Arm SMCCC SOC_ID
name") introduced the SOC_ID name string call, which reports a human
readable string describing the SoC, as returned by firmware.

The SMCCC spec v1.6 describes this feature as AArch64 only, since we rely
on 8 characters to be transmitted per register. Consequently the SMCCC
call must use the AArch64 calling convention, which requires bit 30 of
the FID to be set. The spec is a bit confusing here, since it mentions
that in the parameter description ("2: SoC name (optionally implemented for
SMC64 calls, ..."), but still prints the FID explicitly as 0x80000002.

But as this FID is using the SMC32 calling convention (correct for the
other two calls), it will not match what any SMCCC conformant firmware is
expecting, so any call would return NOT_SUPPORTED.

Add a 64-bit version of the ARCH_SOC_ID FID macro, and use that for the
SoC name version of the call to fix the issue.

Fixes: 5f9c23abc4 ("firmware: smccc: Support optional Arm SMCCC SOC_ID name")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250902172053.304911-1-andre.przywara@arm.com
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-20 09:41:44 +01:00
Bjorn Andersson
51c4071888 Merge branch '20260507-ubwc-rework-v4-4-c19593d20c1d@oss.qualcomm.com' into drivers-for-7.2
Merge the initial set of UBWC rework through a topic branch, to allow it
being shared with the DRM/MSM branch for the continuation.
2026-05-19 21:30:01 -05:00
Dmitry Baryshkov
c5e3f2a3ab soc: qcom: ubwc: add helper controlling AMSBC enablement
Adreno and MDSS drivers need to know whether to enable AMSBC. Add
separate helper, describing that feature.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260507-ubwc-rework-v4-4-c19593d20c1d@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-19 21:29:19 -05:00
Dmitry Baryshkov
b5f7365c44 soc: qcom: ubwc: define helper for MDSS and Adreno drivers
Define special helper returning version setting for MDSS and A8xx
drivers.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260507-ubwc-rework-v4-3-c19593d20c1d@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-19 21:29:19 -05:00
Dmitry Baryshkov
ab7e4d7cf6 soc: qcom: ubwc: define UBWC 3.1
Follow the comment for the macrotile_mode and introduce separate
revision for UBWC 3.0 + 8-channel macrotiling mode. It is not used by
the database (since the drivers are not yet changed to handle it yet).

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260507-ubwc-rework-v4-2-c19593d20c1d@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-19 21:29:18 -05:00
Jamie Nguyen
01b9cae706 firmware: arm_ffa: Honor partition info descriptor size
FFA_PARTITION_INFO_GET_REGS reports the size of each partition
information descriptor in x2[63:48]. However, __ffa_partition_info_get_regs()
walks the returned register payload with a hardcoded 24-byte stride
(regs += 3), even though the size is already read into buf_sz.

That works for the FF-A v1.1/v1.2 24-byte descriptor layout, where each
descriptor consumes three registers. Newer FF-A revisions can extend the
descriptor while keeping the existing fields at the front. For example, a
48-byte descriptor consumes six registers, so advancing by only three
registers desynchronises the parser and can make it read subsequent entries
from the middle of a descriptor.

Use the advertised descriptor size to derive the register stride. Validate
that the size is register-aligned, large enough for the fields parsed by the
driver, and that the requested number of descriptors fits in the returned
x3..x17 register window. The driver still copies only the fields it
understands, but now skips over any trailing descriptor fields correctly.

Fixes: ba85c644ac ("firmware: arm_ffa: Add support for FFA_PARTITION_INFO_GET_REGS")
Suggested-by: Sudeep Holla <sudeep.holla@kernel.org>
Signed-off-by: Jamie Nguyen <jamien@nvidia.com>
Link: https://patch.msgid.link/20260518203116.42624-1-jamien@nvidia.com
(sudeep.holla: Minor rewordng of the commit message and subject)
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2026-05-19 19:04:28 +01:00
Deepti Jaggi
b0bc160c31 soc: qcom: socinfo: Add SoC ID for Nord SA8797P
Add Nord SA8797P SoC ID to socinfo driver.

Signed-off-by: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260427003531.229671-3-shengchao.guo@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18 22:39:45 -05:00
Deepti Jaggi
0670a10b7c dt-bindings: arm: qcom,ids: Add SoC ID for Nord SA8797P
Nord is a SoC family from Qualcomm designed as the next generation of
Lemans series. SA8797P is the automotive variant of Nord, where platform
resources such as clocks, regulators, interconnects, etc. are managed
by firmware through SCMI.

Add SoC ID for Nord SA8797P.

Signed-off-by: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260427003531.229671-2-shengchao.guo@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18 22:39:36 -05:00
Alexander Koskovich
d8eae83cef soc: qcom: socinfo: Add SoC ID for SM7750
Recognize the SM7750 SoC which is an Eliza SoC variant.

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260412-sm7550-id-v1-2-958a673ff791@pm.me
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18 22:39:05 -05:00
Alexander Koskovich
5073d28465 dt-bindings: arm: qcom,ids: Add SoC ID for SM7750
Document the ID for SM7750, an Eliza SoC variant that can be found on
the Nothing Phone (4a) Pro.

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260412-sm7550-id-v1-1-958a673ff791@pm.me
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18 22:39:05 -05:00
Shawn Guo
a92d3fdb44 soc: qcom: socinfo: Add PMIC PMAU0102
Add PMAU0102 found on Nord boards to pmic_models array.

Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260419131523.1232835-1-shengchao.guo@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18 22:38:50 -05:00