Commit Graph

1130169 Commits

Author SHA1 Message Date
qctecmdr
0bec87f184 Merge "defconfig: Enable qrtr over mhi transport for pineapple" 2022-11-22 14:31:31 -08:00
qctecmdr
1df00e4f0e Merge "defconfig: pineapple_tuivm: Enable the SMMU drivers" 2022-11-22 14:31:26 -08:00
qctecmdr
d18ebfc7cd Merge "defconfig: pineapple: Enable fastmap" 2022-11-22 14:31:23 -08:00
qctecmdr
e6e4cee2fa Merge "soc: qcom: pineapple_GKI: Enable panel notifier flag" 2022-11-22 11:43:25 -08:00
qctecmdr
9ae5566f8a Merge "wcd939x-usbss: Add support for WCD_USBSS_HSJ_CONNECT in the wcd939x i2c driver" 2022-11-22 11:43:24 -08:00
qctecmdr
55a06f0ea5 Merge "soc: rpmh-rsc: Initialize aoss_irq_sts" 2022-11-22 11:43:24 -08:00
qctecmdr
07cb78d7b7 Merge "modules.list.msm.pineapple: Add dcvs modules to first stage" 2022-11-22 11:43:24 -08:00
qctecmdr
4bab079e28 Merge "modules.list.msm.pineapple: add several SPMI and PMIC modules" 2022-11-22 11:43:23 -08:00
qctecmdr
5806ec7a8c Merge "soc: qcom: edac: Add a snapshot of LLCC EDAC driver" 2022-11-22 11:43:23 -08:00
qctecmdr
db84b5b107 Merge "defconfig: pineapple-gki: Enable LMH DCVS device driver" 2022-11-22 11:43:23 -08:00
Bruce Levy
fd965aa44d soc: qcom: pineapple_GKI: Enable panel notifier flag
Enable panel event notifier driver for pineapple gki defconfig.

Change-Id: I7ada21d7420c0eafcae01289b223d9fa4df40d0b
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
2022-11-21 20:56:45 -08:00
Sam Rainey
1b5b41d667 wcd939x-usbss: Add support for WCD_USBSS_HSJ_CONNECT in the wcd939x i2c driver
Add a case in the wcd939x i2c driver for connecting a headset microphone
via the USB subsystem. Update corresponding header file.

Change-Id: Ia01804a8ffde36d055a65c11692cef20297e30ca
Signed-off-by: Sam Rainey <quic_rainey@quicinc.com>
2022-11-21 16:24:28 -08:00
Phani Kumar Uppalapati
3de6b11564 defconfig: Enable wcd usbss related configs for pineapple
Enable wcd usb subsystem related configs for pineapple
target.

Change-Id: Ic477b329a6ca564a6bab515c0a159d72ee13e18c
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2022-11-21 16:22:12 -08:00
Deepak Kumar Singh
094e8fbf63 defconfig: Enable qrtr over mhi transport for pineapple
This patch is required for qrtr communication for attaches
over mhi.

Change-Id: I625c91590d0d080000a0aecd2a0ebeabb0ef6478
Signed-off-by: Deepak Kumar Singh <quic_deesin@quicinc.com>
Signed-off-by: Tony Truong <quic_truong@quicinc.com>
2022-11-21 16:02:15 -08:00
Phani Kumar Uppalapati
fa9df61628 abi_gki_aarch64_qcom: Add symbols for wcd usbss i2c driver
Add i2c_transfer and regulator_bulk_enable to the ABI list
to be used in the wcd usbss i2c driver.

Change-Id: I045618c55e63b91d3a316967a9ab942f7e658f45
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2022-11-21 16:01:12 -08:00
qctecmdr
043bb02f96 Merge "power: supply: qti_battery_charger: add support for charge control" 2022-11-21 13:08:56 -08:00
qctecmdr
77b95503a4 Merge "defconfig: pineapple-gki: enable SPMI PMIC arbiter debug driver" 2022-11-21 13:08:56 -08:00
qctecmdr
dbf06163bb Merge "defconfig: pineapple-gki: Enable QMI sensor and cooling driver" 2022-11-21 13:08:56 -08:00
qctecmdr
8ec0745083 Merge "soc: qcom: eud: Do USB spoof disconnect and connect with enable/disable EUD" 2022-11-21 13:08:55 -08:00
qctecmdr
32f46d5813 Merge "qcom-iommu-debug: handle unexpected dma_addr" 2022-11-21 10:54:05 -08:00
qctecmdr
1230185c62 Merge "leds: qti-flash:Show MAX_FLASH_CURRENT_MA for no battery use case" 2022-11-21 10:54:05 -08:00
qctecmdr
6210f2848e Merge "soc: qcom: panel_event_notifier: Add support for driver" 2022-11-21 10:54:05 -08:00
Tushar Nimkar
197cd9096c soc: rpmh-rsc: Initialize aoss_irq_sts
This change is to add missing initialization.

Change-Id: Icdec51afb78bb294b4649c85b6fef087dc554984
Signed-off-by: Tushar Nimkar <quic_tnimkar@quicinc.com>
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
2022-11-21 11:24:56 +05:30
Rashid Zafar
eee033db70 defconfig: pineapple-gki: Enable LMH DCVS device driver
Enable LMH DCVS driver to enable Isens vref regulators in
pineapple-gki.

Change-Id: I99d4f85df7280e32b44630b12fa3fdf1529b1992
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
2022-11-20 19:39:10 -08:00
Rashid Zafar
09ab65b5dc defconfig: pineapple-gki: Enable CPU pause cooling device driver
Enable CPU pause cooling device driver which is able to pause a CPU
from being scheduled and hence allow the CPU to power collapse.

Change-Id: If4f194d3ae2d47d0ec48bcb8e39ed88b9667e39d
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
2022-11-20 19:34:01 -08:00
Rashid Zafar
e5d19f7894 defconfig: pineapple-gki: Enable userspace cooling device driver
Enable userspace cooling device driver to be used by userspace
clients for pineapple.

Change-Id: Ib2b58a4cc6b7e8fe0f003c025cfa032c252d94c9
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
2022-11-20 19:31:05 -08:00
Rashid Zafar
f8e7aac5f7 defconfig: pineapple-gki: Enable DDR cooling device driver
Enable DDR cooling device driver to place a minimum DDR operating
level vote during thermal conditions.

Change-Id: I6701acb49ef158e5654f2a57633ed60b9033e011
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
2022-11-20 19:29:43 -08:00
Rashid Zafar
90309f01c6 defconfig: pineapple-gki: Enable CPU hotplug and voltage drivers
Enable CPU hotplug and CPU voltage cooling device drivers for
pineapple-gki. This cooling device will perform CPU cooling under
thermal conditions.

Change-Id: I850ac710e0acd4b32dd228276df92b24792562d1
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
2022-11-20 19:26:53 -08:00
John Moon
c2170f5e11 build: Change paths to Bazel extensions
The canonical location of msm_kernel_extensions.bzl is changing.

Update the load() calls to the new location.

Change-Id: I27df6131de155cd0592cad5d57202ca01c4affb5
Signed-off-by: John Moon <quic_johmoo@quicinc.com>
2022-11-20 17:40:14 -08:00
Chris Goldsworthy
ebc19c39b2 defconfig: pineapple_tuivm: Enable the SMMU drivers
Enable the SMMU drivers.

Change-Id: I7ffda8d8e421228aee8cee09ec068053809827b9
Signed-off-by: Chris Goldsworthy <quic_cgoldswo@quicinc.com>
2022-11-20 09:03:58 -08:00
Bruce Levy
9c6f80d9fe soc: qcom: panel_event_notifier: Add support for driver
Add Config and make rules for panel_event_notifier
driver.

Change-Id: Id8975ac19e3201a1ac7396821c1be0288bfa8617
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
2022-11-19 22:34:18 -08:00
Rashid Zafar
37d965eca6 defconfig: pineapple-gki: Enable QMI sensor and cooling driver
Enable QMI sensor and cooling device driver to register sensors
and cooling devices respectively from remote subsystem.

Change-Id: I18b54812b91a2a01f273e83b5627c05d1cbeab46
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
2022-11-19 15:33:56 -08:00
qctecmdr
db1207c6eb Merge "iio: qcom-spmi-adc5-gen3: Update immediate read handling" 2022-11-18 17:29:50 -08:00
qctecmdr
5dc6e460a1 Merge "soc: qcom: llcc: ioremap resource only when multi_ch_reg exists" 2022-11-18 15:21:16 -08:00
qctecmdr
9582642b83 Merge "pinctrl: qcom: Add wakeup_enable and wakeup_present bit" 2022-11-18 15:21:16 -08:00
qctecmdr
762d3e0b9a Merge "defconfig: pineapple: enable tmecom and hwkm" 2022-11-18 15:21:15 -08:00
qctecmdr
937267bb46 Merge "spi: spi-msm-geni: Keep IRQ disabled while requesting an IRQ" 2022-11-18 15:21:14 -08:00
qctecmdr
2df1d35e0b Merge "defconfig: pineapple-gki: enable regulator OCP notifier driver" 2022-11-18 15:21:13 -08:00
qctecmdr
7ae6acdb7b Merge "coresight-tmc: set StopOnFl bit for etf" 2022-11-18 15:21:12 -08:00
qctecmdr
5e00cbace8 Merge "remoteproc: qcom_q6v5_pas: Map modem DSM memory ownership to MPSS" 2022-11-18 15:21:10 -08:00
Amir Vajid
73f68048aa modules.list.msm.pineapple: Add dcvs modules to first stage
Add dcvs related modules to first stage.

Change-Id: I48941065322be2036d34221d2e86a395bb706c6e
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
2022-11-18 15:00:42 -08:00
Chris Goldsworthy
0e2621f585 defconfig: pineapple: Enable fastmap
Enable the fastmap driver for the IOMMU.

Change-Id: Ie3a01ffe230fd3459e6a1408f5f78b64fbfae3b6
Signed-off-by: Chris Goldsworthy <quic_cgoldswo@quicinc.com>
2022-11-18 14:22:53 -08:00
Chris Goldsworthy
6acada3f6e abi_gki_aarch64_qcom: Add fastmap symbols
Add symbols for fastmap.

Change-Id: Iad33c705b716b5268f42ed6e02c3de7d8717fe4d
Signed-off-by: Chris Goldsworthy <quic_cgoldswo@quicinc.com>
2022-11-18 14:22:52 -08:00
Chris Goldsworthy
f817953a3b dma-mapping-fast: IOMMU helper clean up
iommu_put_dma_cookie() is now called by the IOMMU framework code
before each driver's domain free callback function is invoked. Remove
iommu_put_dma_cookie() accordingly.

qcom_iommu_put_resv_regions() is now replaced by
iommu_put_resv_regions(), drop all references to our qcom_ function
versions.

Change-Id: Ib9c1c431faf4988707e449ad00c1e3fe7ee2dd47
Signed-off-by: Chris Goldsworthy <quic_cgoldswo@quicinc.com>
2022-11-18 14:22:51 -08:00
Sukadev Bhattiprolu
b6ae4515d3 qcom-iommu-debug: Fail incorrect fastmap usecases
In the current iommu-debug fastmap test device, we map and unmap the entire
iova range from 0..4G for each of the usecases. However for the following
secure usecase:

	$ cd /sys/kernel/debug/iommu-test
	$ cat usecase

	$ echo 4 > usecase
	$ cat functional_fast_dma_api

this mapping of iova range fails with following warning after about 496640
iterations of 8K-size mapping.

	batched_hyp_assign: Failed to assign memory protection, ret = -22
	------------[ cut here ]------------
	failed to assign memory to VMID: 10 rc:-99
	WARNING: CPU: 0 PID: 240 at drivers/iommu/qcom-io-pgtable-alloc.c:39 qcom_io_pgtable_alloc_page+0x110/0x120

Once this happens the memory is no longer usable by HLOS (according to
following comments batched_hyp_assign():

344         if (ret) {
345                 pr_info("%s: Failed to assign memory protection, ret= %d\n",
346                         __func__, ret);
347                 /*
348                  * Make it clear to clients that the memory may no
349                  * longer be in a usable state.
350                  */
351                 ret = -EADDRNOTAVAIL;
352                 break;
353         }

To run any other usecase, we must first destroy the device and recreate it.
But when destroying the device, we get the following warning continuously
(presumably for the 496640 mappings that succeeded):

	------------[ cut here ]------------
	failed to unassign memory from VMID: 10 rc: -99
	WARNING: CPU: 0 PID: 240 at drivers/iommu/qcom-io-pgtable-alloc.c:54 io_pgtable_pool_release+0x1b8/0x24c

	Call trace:
		io_pgtable_pool_release+0x1b8/0x24c
		qcom_io_pgtable_allocator_unregister+0x5c/0xa8
		arm_lpae_free_pgtable+0x30/0x4c
		qcom_free_io_pgtable_ops+0x80/0xa4
		arm_smmu_destroy_domain_context+0xd0/0x1ec
		arm_smmu_domain_free+0x34/0x50
		iommu_group_release+0x5c/0xa8
		kobject_cleanup+0x78/0x1dc
		kobject_cleanup+0xd8/0x1dc
		kobject_put+0x68/0xa8
		iommu_group_remove_device+0x114/0x184
		iommu_release_device+0x48/0x8c
		iommu_bus_notifier+0x4c/0xa4
		blocking_notifier_call_chain+0x5c/0xa8
		device_del+0x2d8/0x3d4
		platform_device_unregister+0x34/0xb4
		of_platform_device_destroy+0xac/0xe4
		iommu_debug_switch_usecase+0x38/0x194
		iommu_debug_usecase_reset+0x18/0x28
		iommu_debug_functional_fast_dma_api_show+0x13e8/0x1538

IOW, the device is unusable and requires a reboot. Its not clear what the
behavior should be for a fastmap test on a non-fastmap device. For now,
detect an invalid usecase and fail cleanly.

Change-Id: I77b827825215f262e836e8902143ea297448612e
Signed-off-by: Sukadev Bhattiprolu <quic_sukadev@quicinc.com>
2022-11-18 14:22:49 -08:00
Sukadev Bhattiprolu
7ff9dff2e6 qcom-iommu-debug: handle unexpected dma_addr
When __full_va_sweep(), __rand_va_sweep() and __tlb_stress_sweep(), do
their cleanup, they assume that the entire iova range 0..4G was mapped
correctly (i.e assigned iova starts at 0 and goes to 4G).

But if for some reason the iova starts at a different address (eg: with
fastmap, it could start at 0xFFFFF000), we end up with the following
warning from iommu_dma_unmap_page() because the iova 0 was never mapped.

 898         phys = iommu_iova_to_phys(domain, dma_handle);
 899         if (WARN_ON(!phys))
 900                 return;

Worse, since the cleanup tries to unmap the entire 0..4G range, this
warning is repeated a large number of times, making the device unusable.

Instead, report an error on the unexpected and unmap the incorrect dma
address immediately. And when unmapping the iova range, make sure to only
unmap regions that were correctly (when iova == dma_addr) mapped.

Change-Id: Ia0ab4fd49ba5021d4866daf69fb9a3fa7e61928d
Signed-off-by: Sukadev Bhattiprolu <quic_sukadev@quicinc.com>
2022-11-18 14:20:59 -08:00
Qingqing Zhou
86b4d3af60 iommu: Fix compilation issues on sdxbaagha
Current codes may don't consider the 32-bit possibility, some
compilation errors happen when try to enable smmu on sdxbaagha:
  1. arm-smmu-qcom.c:
    "error: shift count is negative" reports at
    "FIELD_GET(QTB_OVR_ECATS_OUTFLD0_PA, val)".
  2. qcom-iommu-debug-user.c:
    "error: incompatible pointer types passing" reports at
    "if (kstrtox_from_user(ubuf, count, 0, &iova))".
  3. qcom-io-pgtable-arm.c:
    "error: implicit declaration of function 'FIELD_GET'"
    reports at "FIELD_GET(TOP_IGNORED_MASK, table_pte)".
  4. qcom-iommu-debug-user.c:
    "error: implicit declaration of function 'FIELD_GET'"
    reports at "FIELD_GET(ARM_SMMU_SMR_ID, fwspec->ids[0])".
  5. qcom-iommu-debug.c:
    "error: implicit declaration of function 'FIELD_GET'"
    reports at "FIELD_GET(ARM_SMMU_SMR_ID, (fwspec->ids[0]))".

Change-Id: I38b96e411eaf37d87e48b4c9fe860a94643bc5b7
Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com>
2022-11-18 14:20:52 -08:00
qctecmdr
d977260b19 Merge "build: Refactor build_with_bazel.py to discover targets" 2022-11-18 11:59:19 -08:00
qctecmdr
c0d8c0c5b1 Merge "build: adding top-level DDK headers definition" 2022-11-18 11:59:19 -08:00
qctecmdr
ce5e2d75b4 Merge "build: Export UAPI headers as Bazel cc_library" 2022-11-18 11:59:18 -08:00