Commit Graph

207 Commits

Author SHA1 Message Date
Jon Hunter
e8014b2c83 soc/tegra: pmc: Add IO pads for Tegra264
Populate the IO pads and pins for Tegra264. Tegra264 has internal 1.8V
and 0.6V regulators that must be enabled when selecting the 1.8V mode
for the sdmmc1-hv IO pad. To support this a new 'ena_1v8' member is
added to the 'tegra_io_pad_vctrl' structure to populate the bits that
need to be set to enable these internal regulators. Although this is
enabling 1.8V (bit 1) and 0.6V (bit 2) regulators, it is simply called
'ena_1v8' because these are both enabled for 1.8V operation. Note that
these internal regulators are disabled when not using 1.8V mode.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:39 +01:00
Jon Hunter
db3c16b2b9 soc/tegra: pmc: Rename has_impl_33v_pwr flag
The flag 'has_impl_33v_pwr' is now only used to determine if we need to
set the write-enable bit before we can set the bit to select if 3.3V IO
is used or not. Therefore, rename the flag to 'has_io_pad_wren' to
indicate that the SoC supports the write-enable register.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:39 +01:00
Jon Hunter
edded7a903 soc/tegra: pmc: Refactor IO pad voltage control
For Tegra devices, only a subset of IO pads can be configured for 1.8V
or 3.3V. Therefore, in the 'tegra_io_pad_soc' structure for Tegra SoCs
either all or most of the 'voltage' entries are set to UINT_MAX to
indicate the IO pad voltage cannot be configured. So for the majority of
IO pads this configuration is not applicable. However, refactoring the
IO pad data to move this parameter into a separate structure does not
make sense because the benefits are marginal.

Support for the Tegra264 IO pads is currently missing and the control
for configuring the voltage for the IO pads for Tegra264 has changed.
Instead of having a single register that is used for setting the IO pad
voltage for all IO pads, there is now a register associated with the
specific IO pad. For Tegra264, there is now only one IO pad that can be
configured for 1.8V or 3.3V which is the sdmmc1-hv. While we could make
this work with by adding a new SoC flag, the implementation will be a
bit cumbersome. Therefore, it now seems reasonable to refactor the IO
pad code. Hence, introduce a new 'tegra_io_pad_vctrl' structure that
contains the register offset and bit for enabling/disabling 3.3V mode
and move the existing voltage control data for supported SoCs to this
structure. This has an added benefit of simplifying the code in the
functions tegra_io_pad_get_voltage and tegra_io_pad_set_voltage.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:39 +01:00
Jon Hunter
91d5b17fd3 soc/tegra: pmc: Add Tegra264 wake events
Populate the various wake events for the Tegra264 device.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:39 +01:00
Jon Hunter
bc8b07878c soc/tegra: pmc: Add AOWAKE regs for Tegra264
Populate the AOWAKE register offsets for Tegra264.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:39 +01:00
Jon Hunter
5f87dac892 soc/tegra: pmc: Add support for SoC specific AOWAKE offsets
For Tegra264, some of the AOWAKE registers have different register
offsets. Prepare for adding the Tegra264 AOWAKE register by moving the
offsets for the AOWAKE registers that are different for Tegra264 into
the 'tegra_pmc_regs' structure and populate these offsets for the SoCs
that support these registers.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:39 +01:00
Jon Hunter
8b3e944ee1 soc/tegra: pmc: Remove unused AOWAKE definitions
For Tegra264, the offsets for the AOWAKE registers have changed. Before
adding support for the Tegra264 AOWAKE register offsets, remove the
unused AOWAKE definitions.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:39 +01:00
Jon Hunter
e6ad1988e5 soc/tegra: pmc: Add kerneldoc for wake-up variables
Commit e6d96073af ("soc/tegra: pmc: Fix unsafe generic_handle_irq()
call") added the variables 'wake_work' and 'wake_status' to the
'tegra_pmc' structure but did not add the associated kerneldoc for these
new variables. Add the kerneldoc for these variables.

Fixes: e6d96073af ("soc/tegra: pmc: Fix unsafe generic_handle_irq() call")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:38 +01:00
Jon Hunter
ec0e4da5d6 soc/tegra: pmc: Correct function names in kerneldoc
Commit 70f752ebb0 ("soc/tegra: pmc: Add PMC contextual functions")
added the functions devm_tegra_pmc_get() and
tegra_pmc_io_pad_power_enable(), but the names of the functions in the
associated kerneldoc is incorrect. Update the kerneldoc for these
functions to correct their names.

Fixes: 70f752ebb0 ("soc/tegra: pmc: Add PMC contextual functions")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:38 +01:00
Jon Hunter
21669619e4 soc/tegra: pmc: Add kerneldoc for reboot notifier
Commit 48b7f802fb ("soc/tegra: pmc: Embed reboot notifier in PMC
context") added the reboot_notifier structure to the PMC SoC structure
but did not update the kerneldoc accordingly. Add this missing kerneldoc
description to fix this.

Fixes: 48b7f802fb ("soc/tegra: pmc: Embed reboot notifier in PMC context")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:38 +01:00
Svyatoslav Ryhel
8e2a2f5851 soc/tegra: pmc: Enable core domain support for Tegra114
Enable core domain support for Tegra114 since now it has power domains
fully configured.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:30 +01:00
Linus Torvalds
bf4afc53b7 Convert 'alloc_obj' family to use the new default GFP_KERNEL argument
This was done entirely with mindless brute force, using

    git grep -l '\<k[vmz]*alloc_objs*(.*, GFP_KERNEL)' |
        xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/'

to convert the new alloc_obj() users that had a simple GFP_KERNEL
argument to just drop that argument.

Note that due to the extreme simplicity of the scripting, any slightly
more complex cases spread over multiple lines would not be triggered:
they definitely exist, but this covers the vast bulk of the cases, and
the resulting diff is also then easier to check automatically.

For the same reason the 'flex' versions will be done as a separate
conversion.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21 17:09:51 -08:00
Kees Cook
69050f8d6d treewide: Replace kmalloc with kmalloc_obj for non-scalar types
This is the result of running the Coccinelle script from
scripts/coccinelle/api/kmalloc_objs.cocci. The script is designed to
avoid scalar types (which need careful case-by-case checking), and
instead replace kmalloc-family calls that allocate struct or union
object instances:

Single allocations:	kmalloc(sizeof(TYPE), ...)
are replaced with:	kmalloc_obj(TYPE, ...)

Array allocations:	kmalloc_array(COUNT, sizeof(TYPE), ...)
are replaced with:	kmalloc_objs(TYPE, COUNT, ...)

Flex array allocations:	kmalloc(struct_size(PTR, FAM, COUNT), ...)
are replaced with:	kmalloc_flex(*PTR, FAM, COUNT, ...)

(where TYPE may also be *VAR)

The resulting allocations no longer return "void *", instead returning
"TYPE *".

Signed-off-by: Kees Cook <kees@kernel.org>
2026-02-21 01:02:28 -08:00
Thierry Reding
70f752ebb0 soc/tegra: pmc: Add PMC contextual functions
Add implementations that take as argument a struct tegra_pmc * for most
public APIs, as well as a function to obtain the PMC for any given
device. This will allow transitioning away users from relying on a
global variable storing the PMC context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18 08:48:30 +01:00
Thierry Reding
e1fd5ad68a soc/tegra: pmc: Do not rely on global variable
The reset action for changing the suspend mode back on failure can take
a context-specific data argument that can be set to the PMC context in
order to avoid relying on a global variable.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18 08:48:30 +01:00
Thierry Reding
2e944c51d6 soc/tegra: pmc: Use driver-private data
Instead of relying on a global variable for the PMC context, use the
driver-private data for sysfs attributes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18 08:48:30 +01:00
Thierry Reding
bb946b0e11 soc/tegra: pmc: Use PMC context embedded in powergates
The powergates exposed by the PMC have a pointer to the PMC context
embedded. Use that embedded reference instead of relying on a global
variable.

For the core power domain a new structure needs to be introduced to wrap
the generic PM domain and store the PMC context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18 08:48:29 +01:00
Thierry Reding
b2a3e82000 soc/tegra: pmc: Pass PMC context as debugfs data
Each debugfs file can have private data associated with it. Use this to
pass the PMC context instead of relying on a global variable.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18 08:48:29 +01:00
Thierry Reding
a9f822b3ff soc/tegra: pmc: Pass PMC context via sys-off callback data
To avoid relying on global variables, use the sys-off callback data to
store a reference to the PMC context structure.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18 08:48:29 +01:00
Thierry Reding
48b7f802fb soc/tegra: pmc: Embed reboot notifier in PMC context
Instead of relying on a global variable to track the PMC context, embed
the reboot notifier into the PMC context so that the latter can be
resolved using container_of().

Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18 08:48:29 +01:00
Thierry Reding
0732dffeb0 soc/tegra: pmc: Store PMC context in clocks
Clocks exposed by the PMC need to reference the PMC context for register
programming. Store a reference to the context in the data structure for
each clock to avoid the need for a global variable.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18 08:48:29 +01:00
Thierry Reding
1c672945ce soc/tegra: pmc: Pass struct tegra_pmc to tegra_powergate_state()
By using the generic read_poll_timeout() instead of readx_poll_timeout()
we can pass additional parameters, which allows us to pass an additional
PMC context structure and avoid relying on a global variable for this.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18 08:48:29 +01:00
Thierry Reding
f59dbd0c93 soc/tegra: pmc: Use contextual data instead of global variable
Pass the driver-specific data via the syscore struct and use it in the
syscore ops.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18 08:48:28 +01:00
Prathamesh Shete
e6d96073af soc/tegra: pmc: Fix unsafe generic_handle_irq() call
Currently, when resuming from system suspend on Tegra platforms,
the following warning is observed:

WARNING: CPU: 0 PID: 14459 at kernel/irq/irqdesc.c:666
Call trace:
 handle_irq_desc+0x20/0x58 (P)
 tegra186_pmc_wake_syscore_resume+0xe4/0x15c
 syscore_resume+0x3c/0xb8
 suspend_devices_and_enter+0x510/0x540
 pm_suspend+0x16c/0x1d8

The warning occurs because generic_handle_irq() is being called from
a non-interrupt context which is considered as unsafe.

Fix this warning by deferring generic_handle_irq() call to an IRQ work
which gets executed in hard IRQ context where generic_handle_irq()
can be called safely.

When PREEMPT_RT kernels are used, regular IRQ work (initialized with
init_irq_work) is deferred to run in per-CPU kthreads in preemptible
context rather than hard IRQ context. Hence, use the IRQ_WORK_INIT_HARD
variant so that with PREEMPT_RT kernels, the IRQ work is processed in
hardirq context instead of being deferred to a thread which is required
for calling generic_handle_irq().

On non-PREEMPT_RT kernels, both init_irq_work() and IRQ_WORK_INIT_HARD()
execute in IRQ context, so this change has no functional impact for
standard kernel configurations.

Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: miscellaneous cleanups]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18 08:48:21 +01:00
Arnd Bergmann
aee7ea4681 soc/tegra: Changes for v6.19-rc1
A couple of small fixes across the board: ACPI support on FUSE no longer
 exposes duplicate SoC information, speedo IDs for Tegra210 are updated,
 some comments see typo fixes or kerneldoc additions. Finally, support
 for USB wake events is added on Tegra234, which allow these systems to
 resume from suspend on USB activity.
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Merge tag 'tegra-for-6.19-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

soc/tegra: Changes for v6.19-rc1

A couple of small fixes across the board: ACPI support on FUSE no longer
exposes duplicate SoC information, speedo IDs for Tegra210 are updated,
some comments see typo fixes or kerneldoc additions. Finally, support
for USB wake events is added on Tegra234, which allow these systems to
resume from suspend on USB activity.

* tag 'tegra-for-6.19-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Add USB wake events for Tegra234
  soc/tegra: pmc: Document tegra_pmc.syscore field
  soc/tegra: pmc: Don't fail if "aotag" is not present
  soc/tegra: fuse: speedo-tegra210: Add SoC speedo 2
  soc/tegra: fuse: speedo-tegra210: Update speedo IDs
  soc/tegra: Resolve a spelling error in the tegra194-cbb.c
  soc/tegra: fuse: Do not register SoC device on ACPI boot

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-11-25 10:49:10 +01:00
Haotien Hsu
dd03d34d6d soc/tegra: pmc: Add USB wake events for Tegra234
Add USB wake events for Tegra234 so that system can be woken up from
suspend when USB devices hot-plug/unplug event is detected.

Signed-off-by: Haotien Hsu <haotienh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-11-14 19:29:50 +01:00
Thierry Reding
aaca2e9933 soc/tegra: pmc: Document tegra_pmc.syscore field
This eliminates a warning from the documentation build targets.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-11-14 17:42:08 +01:00
Prathamesh Shete
1c458bbe4b soc/tegra: pmc: Don't fail if "aotag" is not present
The "aotog" is an optional aperture, so if that aperture is not defined
for a given device, then initialise the 'aotag' pointer to NULL instead
of returning an error. Note that the PMC driver will not use 'aotag'
pointer if initialised to NULL.

Co-developed-by: Shardar Mohammed <smohammed@nvidia.com>
Signed-off-by: Shardar Mohammed <smohammed@nvidia.com>
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-11-14 17:35:36 +01:00
Thierry Reding
a97fbc3ee3 syscore: Pass context data to callbacks
Several drivers can benefit from registering per-instance data along
with the syscore operations. To achieve this, move the modifiable fields
out of the syscore_ops structure and into a separate struct syscore that
can be registered with the framework. Add a void * driver data field for
drivers to store contextual data that will be passed to the syscore ops.

Acked-by: Rafael J. Wysocki (Intel) <rafael@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-11-14 10:01:52 +01:00
Jon Hunter
b6bcbce335 soc/tegra: pmc: Ensure power-domains are in a known state
After commit 13a4b7fb62 ("pmdomain: core: Leave powered-on genpds on
until late_initcall_sync") was applied, the Tegra210 Jetson TX1 board
failed to boot. Looking into this issue, before this commit was applied,
if any of the Tegra power-domains were in 'on' state when the kernel
booted, they were being turned off by the genpd core before any driver
had chance to request them. This was purely by luck and a consequence of
the power-domains being turned off earlier during boot. After this
commit was applied, any power-domains in the 'on' state are kept on for
longer during boot and therefore, may never transitioned to the off
state before they are requested/used. The hang on the Tegra210 Jetson
TX1 is caused because devices in some power-domains are accessed without
the power-domain being turned off and on, indicating that the
power-domain is not in a completely on state.

>From reviewing the Tegra PMC driver code, if a power-domain is in the
'on' state there is no guarantee that all the necessary clocks
associated with the power-domain are on and even if they are they would
not have been requested via the clock framework and so could be turned
off later. Some power-domains also have a 'clamping' register that needs
to be configured as well. In short, if a power-domain is already 'on' it
is difficult to know if it has been configured correctly. Given that the
power-domains happened to be switched off during boot previously, to
ensure that they are in a good known state on boot, fix this by
switching off any power-domains that are on initially when registering
the power-domains with the genpd framework.

Note that commit 05cfb988a4 ("soc/tegra: pmc: Initialise resets
associated with a power partition") updated the
tegra_powergate_of_get_resets() function to pass the 'off' to ensure
that the resets for the power-domain are in the correct state on boot.
However, now that we may power off a domain on boot, if it is on, it is
better to move this logic into the tegra_powergate_add() function so
that there is a single place where we are handling the initial state of
the power-domain.

Fixes: a38045121b ("soc/tegra: pmc: Add generic PM domain support")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20250731121832.213671-1-jonathanh@nvidia.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-08-11 12:24:43 +02:00
Linus Torvalds
fc8f5028eb pmdomain core:
- Leave powered-on genpds on until ->sync_state() or late_initcall_sync
  - Export a common ->sync_state() helper for genpd providers
  - Add generic ->sync_state() support
  - Add a bus/driver for genpd provider-devices
  - Introduce dev_pm_genpd_is_on() for consumers
 
 pmdomain providers:
  - cpuidle-psci: Drop redundant ->sync_state() support
  - cpuidle-riscv-sbi: Drop redundant ->sync_state() support
  - imx: Set ISI panic write for imx8m-blk-ctrl
  - qcom: Add support for Glymur and Milos RPMh power-domains
  - qcom: Use of_genpd_sync_state() for power-domains
  - rockchip: Add support for the RK3528 variant
  - samsung: Fix splash-screen handover by enforcing a ->sync_state()
  - sunxi: Add support for Allwinner A523's PCK600 power-controller
  - tegra: Opt-out from genpd's common ->sync_state() support for pmc
  - thead: Instantiate a GPU power sequencer via the auxiliary bus
  - renesas: Move init to postcore_initcalls
  - xilinx: Move ->sync_state() support to firmware driver
  - xilinx: Use of_genpd_sync_state() for power-domains
 
 pmdomain consumers:
  - remoteproc: imx_rproc: Fixup the detect/attach procedure for pre-booted cores
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Merge tag 'pmdomain-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

Pull pmdomain updates from Ulf Hansson:
 "pmdomain core:
   - Leave powered-on genpds on until ->sync_state() or late_initcall_sync
   - Export a common ->sync_state() helper for genpd providers
   - Add generic ->sync_state() support
   - Add a bus/driver for genpd provider-devices
   - Introduce dev_pm_genpd_is_on() for consumers

  pmdomain providers:
   - cpuidle-psci: Drop redundant ->sync_state() support
   - cpuidle-riscv-sbi: Drop redundant ->sync_state() support
   - imx: Set ISI panic write for imx8m-blk-ctrl
   - qcom: Add support for Glymur and Milos RPMh power-domains
   - qcom: Use of_genpd_sync_state() for power-domains
   - rockchip: Add support for the RK3528 variant
   - samsung: Fix splash-screen handover by enforcing a ->sync_state()
   - sunxi: Add support for Allwinner A523's PCK600 power-controller
   - tegra: Opt-out from genpd's common ->sync_state() support for pmc
   - thead: Instantiate a GPU power sequencer via the auxiliary bus
   - renesas: Move init to postcore_initcalls
   - xilinx: Move ->sync_state() support to firmware driver
   - xilinx: Use of_genpd_sync_state() for power-domains

  pmdomain consumers:
   - remoteproc: imx_rproc: Fixup the detect/attach procedure for
     pre-booted cores"

* tag 'pmdomain-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (44 commits)
  pmdomain: qcom: rpmhpd: Add Glymur RPMh Power Domains
  dt-bindings: power: rpmpd: Add Glymur power domains
  remoteproc: imx_rproc: detect and attach to pre-booted remote cores
  remoteproc: imx_rproc: skip clock enable when M-core is managed by the SCU
  pmdomain: core: introduce dev_pm_genpd_is_on()
  pmdomain: ti: Select PM_GENERIC_DOMAINS
  pmdomain: sunxi: sun20i-ppu: change to tristate and enable for ARCH_SUNXI
  pmdomain: sunxi: add driver for Allwinner A523's PCK-600 power controller
  pmdomain: sunxi: sun20i-ppu: add A523 support
  pmdomain: samsung: Fix splash-screen handover by enforcing a sync_state
  cpuidle: riscv-sbi: Drop redundant sync_state support
  cpuidle: psci: Drop redundant sync_state support
  pmdomain: core: Leave powered-on genpds on until sync_state
  pmdomain: core: Leave powered-on genpds on until late_initcall_sync
  pmdomain: core: Default to use of_genpd_sync_state() for genpd providers
  driver core: Add dev_set_drv_sync_state()
  pmdomain: core: Add common ->sync_state() support for genpd providers
  driver core: Export get_dev_from_fwnode()
  firmware: xilinx: Use of_genpd_sync_state()
  firmware: xilinx: Don't share zynqmp_pm_init_finalize()
  ...
2025-07-29 11:42:31 -07:00
Arnd Bergmann
985da98f29 soc/tegra: Updates for v6.17-rc1
The bulk of this is the addition of Tegra264 support for various low-
 level components. This also adds fabric descriptors for the new Tegra254
 and Tegra264 chips.
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Merge tag 'tegra-for-6.17-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

soc/tegra: Updates for v6.17-rc1

The bulk of this is the addition of Tegra264 support for various low-
level components. This also adds fabric descriptors for the new Tegra254
and Tegra264 chips.

* tag 'tegra-for-6.17-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: cbb: Add support for CBB fabrics in Tegra254
  soc/tegra: cbb: Add support for CBB fabrics in Tegra264
  soc/tegra: cbb: Support HW lookup to get timed out target address
  soc/tegra: cbb: Improve handling for per SoC fabric data
  soc/tegra: cbb: Make error interrupt enable and status per SoC
  soc/tegra: cbb: Change master/slave to initiator/target
  soc/tegra: cbb: Clear ERR_FORCE register with ERR_STATUS
  soc/tegra: Add Tegra264 APBMISC compatible string
  soc/tegra: pmc: Add Tegra264 support
  soc/tegra: Enable support for Tegra264

Link: https://lore.kernel.org/r/20250711220943.2389322-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21 18:18:11 +02:00
Ulf Hansson
8efc9b195b soc/tegra: pmc: Opt-out from genpd's common ->sync_state() support
Tegra implements its own specific ->sync_state() callback for the genpd
providers. Let's set the GENPD_FLAG_NO_SYNC_STATE to inform genpd about it.

Moreover, let's call of_genpd_sync_state() to make sure genpd tries to
power off unused PM domains.

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Tested-by: Hiago De Franco <hiago.franco@toradex.com> # Colibri iMX8X
Tested-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> # TI AM62A,Xilinx ZynqMP ZCU106
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20250701114733.636510-10-ulf.hansson@linaro.org
2025-07-09 13:29:06 +02:00
Jiri Slaby (SUSE)
76760b9dbb soc: Use dev_fwnode()
irq_domain_create_simple() takes fwnode as the first argument. It can be
extracted from the struct device using dev_fwnode() helper instead of
using of_node with of_fwnode_handle().

So use the dev_fwnode() helper.

Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org>
Cc: Qiang Zhao <qiang.zhao@nxp.com>
Cc: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/linuxppc-dev/20250611104348.192092-19-jirislaby@kernel.org/
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2025-07-08 10:29:28 +02:00
Thierry Reding
5273adad12 soc/tegra: pmc: Add Tegra264 support
The PMC block on Tegra264 has undergone a few small changes since it's
Tegra234 predecessor. Match on the new compatible string to select the
updated SoC-specific data.

Link: https://lore.kernel.org/r/20250506133118.1011777-8-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-07 14:30:56 +02:00
Jiri Slaby (SUSE)
6e4e30d70a soc: Switch to irq_domain_create_*()
irq_domain_add_*() interfaces are going away as being obsolete now.
Switch to the preferred irq_domain_create_*() ones. Those differ in the
node parameter: They take more generic struct fwnode_handle instead of
struct device_node. Therefore, of_fwnode_handle() is added around the
original parameter.

Note some of the users can likely use dev->fwnode directly instead of
indirect of_fwnode_handle(dev->of_node). But dev->fwnode is not
guaranteed to be set for all, so this has to be investigated on case to
case basis (by people who can actually test with the HW).

[ tglx: Fix up subject prefix ]

Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu> # For soc/fsl
Link: https://lore.kernel.org/all/20250319092951.37667-35-jirislaby@kernel.org
2025-05-16 21:06:11 +02:00
Krzysztof Kozlowski
5e63dfe213 soc/tegra: pmc: Use str_enable_disable-like helpers
Replace ternary (condition ? "enable" : "disable") syntax with helpers
from string_choices.h because:
1. Simple function call with one argument is easier to read.  Ternary
   operator has three arguments and with wrapping might lead to quite
   long code.
2. Is slightly shorter thus also easier to read.
3. It brings uniformity in the text - same string.
4. Allows deduping by the linker, which results in a smaller binary
   file.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250114203638.1013670-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-03-06 19:12:37 +01:00
Jinjie Ruan
4d57a84056 soc/tegra: pmc: Simplify with scoped for each OF child loop
Use scoped for_each_child_of_node_scoped() when iterating over device
nodes to make code a bit simpler.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:43:43 +02:00
Jon Hunter
cfcd6c46fe soc/tegra: pmc: Simplify resource lookup
Commit 6f4429e21a ("soc/tegra: pmc: Update address mapping sequence
for PMC apertures") updated the resource lookup code in the PMC driver.
Instead of calling platform_get_resource_byname() and
devm_ioremap_resource() simplify the code by simply calling
devm_platform_ioremap_resource_byname().

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-06-27 09:02:31 +02:00
Jon Hunter
de024f63ce soc/tegra: pmc: Add EQOS wake event for Tegra194 and Tegra234
Add the wake event for the EQOS ethernet controller on Tegra194 and
Tegra234 devices, so that system can be woken up by an event from this
ethernet controller.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-04-26 17:36:10 +02:00
Prathamesh Shete
ae7d2d9b8e soc/tegra: pmc: Add SD wake event for Tegra234
Add SD wake event for Tegra234 so that system can be woken up from
suspend when SD card hot-plug/unplug event is detected.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-16 12:35:56 +01:00
Petlozu Pravareshwar
ccd8e76fdb soc/tegra: pmc: Update scratch as an optional aperture
Scratch address space register is used to store reboot reason. For
some Tegra234 systems, the scratch space is not available to store
the reboot reason. This is because scratch region on these systems
is not accessible by the kernel as restricted by the Hypervisor.
Such systems would delist scratch aperture from PMC DT node.

Hence this change makes scratch as optional aperture and also avoids
registering reboot notifier if scratch address space isn't mapped.

Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-16 12:17:55 +01:00
Petlozu Pravareshwar
6f4429e21a soc/tegra: pmc: Update address mapping sequence for PMC apertures
On Tegra SoCs prior to Tegra186, PMC has single address range only.
Starting from and after Tegra186, PMC has additional address ranges
apart from base address range. Currently in PMC driver, we try to
map these additional address ranges on all SoCs and if we fail then
we assume that the range is not valid for an SoC. This change makes
it more explicit on which address ranges are expected to be present
on which SoCs and maps the additional address ranges only on SoCs
from and after Tegra186.

Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-16 12:17:54 +01:00
Christophe JAILLET
9863084dd9 soc/tegra: pmc: Remove some old and deprecated functions and constants
These TEGRA_IO_RAIL_... functions and constants have been deprecated in
commit 21b4991051 ("soc/tegra: pmc: Add I/O pad voltage support") in
2016-11.

There seems to be no users since kernel 4.16.

Remove them now.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-01 15:58:04 +01:00
Ulf Hansson
cda263907a soc/tegra: pmc: Drop the ->opp_to_performance_state() callback
Since commit 7c41cdcd3b ("OPP: Simplify the over-designed pstate <->
level dance"), there is no longer any need for genpd providers to assign
the ->opp_to_performance_state(), hence let's drop it.

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-13 13:58:36 +02:00
Thierry Reding
c954cd7ad0 soc/tegra: pmc: Use devm_clk_notifier_register()
Move to the device-managed version of clk_notifier_register() to remove
the need for manual cleanup. This fixes a potential issue where the
clock notifier would stick around after the driver fails to probe at a
later point.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-09 16:56:58 +02:00
Thierry Reding
bae9fb2d39 soc/tegra: pmc: Simplify debugfs initialization
debugfs calls should generally not be error-checked to simplify the case
where debugfs is disabled. Since this driver is built-in and has the
sysfs bind/unbind attributes disabled, it cannot be unloaded, so there
is no need to hold onto a reference to the debugfs files that are
created.

We can further simplify this by moving the debugfs file creation to a
later stage to avoid any cleanup we might have to do during error unwind
operations. This is also a little cleaner because the debugfs file
relies on data structures that are created at a later point than when
the file was previously created.

Suggested-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-09 16:56:57 +02:00
Viswanath L
c3a1c97c72 soc/tegra: pmc: Add AON SW Wake support for Tegra234
Wake-up signal 83 on Tegra234 is triggered by software writing to
WAKE_AOWAKE_SW_WAKE_TIER0_TRIGGER_0 register. This wake-up is mapped
to CPU interrupt 179 and is used by the Sensor Processing Engine (SPE)
in the Always-on (AON) power domain for waking up the system.

Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-08 18:35:04 +02:00
Petlozu Pravareshwar
a0941221c5 soc/tegra: pmc: Support software wake-up for SPE
The Sensor Processing Engine(SPE) can trigger a software wake-up of
the device. To support this wake-up for the SPE, set SR_CAPTURE_EN
bit in WAKE_AOWAKE_CNTRL register associated with the wake-up for
the SPE. This SR capturing logic is expected to be enabled for wakes
with short pulse signalling requirements.

Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-03 14:34:00 +02:00
Sushil Singh
cc026ccdd5 soc/tegra: pmc: Add wake source interrupt for MGBE
Add the GPIO wake interrupt for MGBE ethernet controller on Tegra234 SoC.

Signed-off-by: Sushil Singh <sushilkumars@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-03 14:31:42 +02:00