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arm64: Xilinx DT changes for 6.20

Browse Source 
- Cleanup SPI compatible strings
 - wwdt: Add optional power-domains property
 - ZynqMP: Fix OPP description and setup
 - ZynqMP: Remove OP-TEE node
 - Drop label from dlg,slg7xl45106
 - Remove ina260 IIO description
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Merge tag 'zynqmp-dt-for-6.20' of https://github.com/Xilinx/linux-xlnx into soc/dt

arm64: Xilinx DT changes for 6.20

- Cleanup SPI compatible strings
- wwdt: Add optional power-domains property
- ZynqMP: Fix OPP description and setup
- ZynqMP: Remove OP-TEE node
- Drop label from dlg,slg7xl45106
- Remove ina260 IIO description

* tag 'zynqmp-dt-for-6.20' of https://github.com/Xilinx/linux-xlnx:
  arm64: zynqmp: Remove ina260 IIO description
  arm64: dts: xilinx: Drop "label" property on dlg,slg7xl45106
  Revert "arm64: zynqmp: Add an OP-TEE node to the device tree"
  arm64: dts: xilinx: fix zynqmp opp-table-cpu
  dt-bindings: watchdog: xlnx,versal-wwdt: Add optional power-domains property
  arm64: dts: xilinx: add soc-specific spi compatibles for zynqmp/versal-net

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2026-01-26 16:02:40 +01:00
commit 915ed61356
9 changed files with 16 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
Documentation/devicetree/bindings/watchdog/xlnx,versal-wwdt.yaml
View File

@ -32,6 +32,9 @@ properties:
clocks:
maxItems: 1
power-domains:
maxItems: 1
required:
- compatible
- reg

4
arch/arm64/boot/dts/xilinx/versal-net.dtsi
View File

@ -1018,7 +1018,7 @@ smmu: iommu@ec000000 {
};
spi0: spi@f1960000 {
compatible = "cdns,spi-r1p6";
compatible = "xlnx,versal-net-spi-r1p6", "cdns,spi-r1p6";
status = "disabled";
interrupts = <0 23 4>;
reg = <0 0xf1960000 0 0x1000>;
@ -1026,7 +1026,7 @@ spi0: spi@f1960000 {
};
spi1: spi@f1970000 {
compatible = "cdns,spi-r1p6";
compatible = "xlnx,versal-net-spi-r1p6", "cdns,spi-r1p6";
status = "disabled";
interrupts = <0 24 4>;
reg = <0 0xf1970000 0 0x1000>;

2
arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
View File

@ -14,7 +14,7 @@ pss_ref_clk: pss-ref-clk {
bootph-all;
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33333333>;
clock-frequency = <33333000>;
clock-output-names = "pss_ref_clk";
};

7
arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso
View File

@ -26,11 +26,6 @@ aliases {
ethernet0 = "/axi/ethernet@ff0c0000"; /* &gem1 */
};
ina260-u3 {
compatible = "iio-hwmon";
io-channels = <&u3 0>, <&u3 1>, <&u3 2>;
};
clk_26: clock2 { /* u17 - USB */
compatible = "fixed-clock";
#clock-cells = <0>;
@ -67,7 +62,6 @@ &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
u3: ina260@40 { /* u3 */
compatible = "ti,ina260";
#io-channel-cells = <1>;
label = "ina260-u14";
reg = <0x40>;
};
@ -75,7 +69,6 @@ u3: ina260@40 { /* u3 */
slg7xl45106: gpio@11 { /* u13 - reset logic */
compatible = "dlg,slg7xl45106";
reg = <0x11>;
label = "resetchip";
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "USB0_PHY_RESET_B", "",

7
arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso
View File

@ -25,11 +25,6 @@ aliases {
ethernet1 = "/axi/ethernet@ff0c0000"; /* &gem1 */
};
ina260-u14 {
compatible = "iio-hwmon";
io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
};
clk_27: clock0 { /* u86 - DP */
compatible = "fixed-clock";
#clock-cells = <0>;
@ -95,7 +90,6 @@ &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
u14: ina260@40 { /* u14 */
compatible = "ti,ina260";
#io-channel-cells = <1>;
label = "ina260-u14";
reg = <0x40>;
};
@ -103,7 +97,6 @@ u14: ina260@40 { /* u14 */
slg7xl45106: gpio@11 { /* u19 - reset logic */
compatible = "dlg,slg7xl45106";
reg = <0x11>;
label = "resetchip";
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "USB0_PHY_RESET_B", "USB1_PHY_RESET_B",

7
arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dtso
View File

@ -25,11 +25,6 @@ aliases {
ethernet1 = "/axi/ethernet@ff0c0000"; /* &gem1 */
};
ina260-u14 {
compatible = "iio-hwmon";
io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
};
clk_125: clock0 { /* u87 - GEM0/1 */
compatible = "fixed-clock";
#clock-cells = <0>;
@ -96,7 +91,6 @@ &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
u14: ina260@40 { /* u14 */
compatible = "ti,ina260";
#io-channel-cells = <1>;
label = "ina260-u14";
reg = <0x40>;
};
@ -104,7 +98,6 @@ u14: ina260@40 { /* u14 */
slg7xl45106: gpio@11 { /* u19 - reset logic */
compatible = "dlg,slg7xl45106";
reg = <0x11>;
label = "resetchip";
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "USB0_PHY_RESET_B", "USB1_PHY_RESET_B",

6
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
View File

@ -32,11 +32,6 @@ aliases {
ethernet0 = "/axi/ethernet@ff0e0000"; /* &gem3 */
};
ina260-u14 {
compatible = "iio-hwmon";
io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
};
si5332_0: si5332-0 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
@ -96,7 +91,6 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
u14: ina260@40 { /* u14 */
compatible = "ti,ina260";
#io-channel-cells = <1>;
label = "ina260-u14";
reg = <0x40>;
};

6
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
View File

@ -27,11 +27,6 @@ aliases {
ethernet0 = "/axi/ethernet@ff0e0000"; /* &gem3 */
};
ina260-u14 {
compatible = "iio-hwmon";
io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
};
si5332_0: si5332-0 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
@ -92,7 +87,6 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
u14: ina260@40 { /* u14 */
compatible = "ti,ina260";
#io-channel-cells = <1>;
label = "ina260-u14";
reg = <0x40>;
};

25
arch/arm64/boot/dts/xilinx/zynqmp.dtsi
View File

@ -103,23 +103,23 @@ CPU_SLEEP_0: cpu-sleep-0 {
cpu_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <1199999988>;
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
opp01 {
opp-hz = /bits/ 64 <599999994>;
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
opp02 {
opp-hz = /bits/ 64 <399999996>;
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
opp03 {
opp-hz = /bits/ 64 <299999997>;
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
@ -192,11 +192,6 @@ psci {
};
firmware {
optee: optee {
compatible = "linaro,optee-tz";
method = "smc";
};
zynqmp_firmware: zynqmp-firmware {
compatible = "xlnx,zynqmp-firmware";
#power-domain-cells = <1>;
@ -1080,7 +1075,7 @@ smmu: iommu@fd800000 {
};
spi0: spi@ff040000 {
compatible = "cdns,spi-r1p6";
compatible = "xlnx,zynqmp-spi-r1p6", "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@ -1092,7 +1087,7 @@ spi0: spi@ff040000 {
};
spi1: spi@ff050000 {
compatible = "cdns,spi-r1p6";
compatible = "xlnx,zynqmp-spi-r1p6", "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;