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BACKPORT: FROMLIST: soc: rockchip: split rockchip_typec_phy struct to separate header

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we may use rockchip_phy_typec struct in other driver, so split
it to separate header.

Signed-off-by: Lin Huang <hl@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10420467/)

Conflicts:
	drivers/phy/phy-rockchip-typec.c
[phy-rockchip-typec.c is different path in upstream code]

BUG=b:72006974
TEST=DP display on Dru

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1069958

Change-Id: I709331d1577923be662660eb606f92b743903ba7
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
Lin Huang 2018-05-21 16:13:54 +08:00 committed by Tao Huang
parent b50719b859
commit 707ec089ca
2 changed files with 45 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

35
drivers/phy/rockchip/phy-rockchip-typec.c
View File

@ -63,6 +63,7 @@
#include <linux/mfd/syscon.h>
#include <linux/phy/phy.h>
#include <soc/rockchip/rockchip_phy_typec.h>
#define CMN_SSM_BANDGAP (0x21 << 2)
#define CMN_SSM_BIAS (0x22 << 2)
@ -351,40 +352,6 @@
#define POWER_ON_TRIES 5
struct usb3phy_reg {
u32 offset;
u32 enable_bit;
u32 write_enable;
};
struct rockchip_usb3phy_port_cfg {
struct usb3phy_reg typec_conn_dir;
struct usb3phy_reg usb3tousb2_en;
struct usb3phy_reg usb3host_disable;
struct usb3phy_reg usb3host_port;
struct usb3phy_reg external_psm;
struct usb3phy_reg pipe_status;
struct usb3phy_reg uphy_dp_sel;
};
struct rockchip_typec_phy {
struct device *dev;
void __iomem *base;
struct extcon_dev *extcon;
struct regmap *grf_regs;
struct clk *clk_core;
struct clk *clk_ref;
struct reset_control *uphy_rst;
struct reset_control *pipe_rst;
struct reset_control *tcphy_rst;
struct rockchip_usb3phy_port_cfg port_cfgs;
/* mutex to protect access to individual PHYs */
struct mutex lock;
bool flip;
u8 mode;
};
struct phy_reg {
u16 value;
u32 addr;

44
include/soc/rockchip/rockchip_phy_typec.h Normal file
View File

@ -0,0 +1,44 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
* Author: Lin Huang <hl@rock-chips.com>
*/
#ifndef __SOC_ROCKCHIP_PHY_TYPEC_H
#define __SOC_ROCKCHIP_PHY_TYPEC_H
struct usb3phy_reg {
u32 offset;
u32 enable_bit;
u32 write_enable;
};
struct rockchip_usb3phy_port_cfg {
struct usb3phy_reg typec_conn_dir;
struct usb3phy_reg usb3tousb2_en;
struct usb3phy_reg usb3host_disable;
struct usb3phy_reg usb3host_port;
struct usb3phy_reg external_psm;
struct usb3phy_reg pipe_status;
struct usb3phy_reg uphy_dp_sel;
};
struct rockchip_typec_phy {
struct device *dev;
void __iomem *base;
struct extcon_dev *extcon;
struct regmap *grf_regs;
struct clk *clk_core;
struct clk *clk_ref;
struct reset_control *uphy_rst;
struct reset_control *pipe_rst;
struct reset_control *tcphy_rst;
struct rockchip_usb3phy_port_cfg port_cfgs;
/* mutex to protect access to individual PHYs */
struct mutex lock;
bool flip;
u8 mode;
};
#endif