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FROMLIST: Documentation: dt-bindings: phy: add phy_config for Rockchip USB Type-C PHY

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If want to do training outside DP Firmware, need phy voltage swing
and pre_emphasis value.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
(am from https://patchwork.kernel.org/patch/10420463/)

BUG=b:72006974
TEST=DP display on Dru

Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/1069957
Commit-Ready: Brian Norris <briannorris@chromium.org>
Reviewed-by: Sean Paul <seanpaul@google.com>

Change-Id: Ib6fd1622c18e8f3371c2e859f448591f3ada7c6a
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
Lin Huang 2018-05-02 16:02:44 +08:00 committed by Tao Huang
parent afdd986c45
commit b50719b859
1 changed files with 37 additions and 0 deletions
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37
Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
View File

@ -20,6 +20,13 @@ Required properties:
<&tcphy0 1> and <&tcphy1 1> for USB3 PHY.
See ./phy-bindings.txt for details.
Optional properties:
- rockchip,phy-config : A list of voltage swing(mV) and pre-emphasis
(dB) pairs. They are 3 blocks of 4 entries and
correspond to s0p0 ~ s0p3, s1p0 ~ s1p3,
s2p0 ~ s2p3, s3p0 ~ s2p3 swing and pre-emphasis
values.
Note, there are 2 type-c phys for RK3399, and they are almost identical, except
these registers(description below), every register node contains 3 sections:
offset, enable bit, write mask bit.
@ -62,6 +69,21 @@ Example:
rockchip,external-psm = <0xe588 14 30>;
rockchip,pipe-status = <0xe5c0 0 0>;
rockchip,uphy-dp-sel = <0x6268 19 19>;
rockchip,phy-config = <0x2a 0x00>,
<0x1f 0x15>,
<0x14 0x22>,
<0x02 0x2b>,
<0x21 0x00>,
<0x12 0x15>,
<0x02 0x22>,
<0 0>,
<0x15 0x00>,
<0x00 0x15>,
<0 0>,
<0 0>;
};
tcphy1: phy@ff800000 {
@ -84,4 +106,19 @@ Example:
rockchip,external-psm = <0xe594 14 30>;
rockchip,pipe-status = <0xe5c0 16 16>;
rockchip,uphy-dp-sel = <0x6268 3 19>;
rockchip,phy-config = <0x2a 0x00>,
<0x1f 0x15>,
<0x14 0x22>,
<0x02 0x2b>,
<0x21 0x00>,
<0x12 0x15>,
<0x02 0x22>,
<0 0>,
<0x15 0x00>,
<0x00 0x15>,
<0 0>,
<0 0>;
};