drm/xe/pf: Don't use LMTT page size if no LMTT

While today all our DGFX platforms have LMTT, we already started
preparation to do not rely on this assumption. Add check for the
LMTT presence and return default page size as VRAM/LMEM alignment
if there is no LMTT.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/20260221152230.7071-4-michal.wajdeczko@intel.com
This commit is contained in:
Michal Wajdeczko 2026-02-21 16:22:30 +01:00
parent 494752bdc4
commit 6d09a56b49

View File

@ -1451,7 +1451,8 @@ int xe_gt_sriov_pf_config_set_fair_dbs(struct xe_gt *gt, unsigned int vfid,
static u64 pf_get_lmem_alignment(struct xe_gt *gt)
{
return xe_lmtt_page_size(&gt->tile->sriov.pf.lmtt);
return xe_device_has_lmtt(gt_to_xe(gt)) ?
xe_lmtt_page_size(&gt_to_tile(gt)->sriov.pf.lmtt) : XE_PAGE_SIZE;
}
static u64 pf_get_min_spare_lmem(struct xe_gt *gt)