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drm/xe/pf: Don't force 2MB VRAM alignment
There is no need to always request VRAM BO to have 2MB alignment as for now this is required by the LMTT only, which could be not present on some platforms with VRAM. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260221152230.7071-3-michal.wajdeczko@intel.com
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@ -1626,13 +1626,15 @@ static int pf_provision_vf_lmem(struct xe_gt *gt, unsigned int vfid, u64 size)
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struct xe_device *xe = gt_to_xe(gt);
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struct xe_tile *tile = gt_to_tile(gt);
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struct xe_bo *bo;
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u64 alignment;
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int err;
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xe_gt_assert(gt, vfid);
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xe_gt_assert(gt, IS_DGFX(xe));
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xe_gt_assert(gt, xe_gt_is_main_type(gt));
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size = round_up(size, pf_get_lmem_alignment(gt));
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alignment = pf_get_lmem_alignment(gt);
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size = round_up(size, alignment);
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if (config->lmem_obj) {
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err = pf_distribute_config_lmem(gt, vfid, 0);
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@ -1648,12 +1650,12 @@ static int pf_provision_vf_lmem(struct xe_gt *gt, unsigned int vfid, u64 size)
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if (!size)
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return 0;
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xe_gt_assert(gt, pf_get_lmem_alignment(gt) == SZ_2M);
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xe_gt_assert(gt, alignment == XE_PAGE_SIZE || alignment == SZ_2M);
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bo = xe_bo_create_pin_range_novm(xe, tile,
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ALIGN(size, PAGE_SIZE), 0, ~0ull,
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ttm_bo_type_kernel,
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XE_BO_FLAG_VRAM(tile->mem.vram) |
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XE_BO_FLAG_NEEDS_2M |
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(alignment == SZ_2M ? XE_BO_FLAG_NEEDS_2M : 0) |
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XE_BO_FLAG_PINNED |
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XE_BO_FLAG_PINNED_LATE_RESTORE |
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XE_BO_FLAG_FORCE_USER_VRAM);
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