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arm64: dts: renesas: rzt2h-n2h-evk: Configure SCI0 pins

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Configure the drive strength, slew rate, and Schmitt trigger settings for
the sci0 pin group shared by the RZ/T2H and RZ/N2H EVK boards.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260528134752.79813-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2026-05-28 14:47:52 +01:00 committed by Geert Uytterhoeven
parent 1f90a38214
commit 1417a63d16
1 changed files with 3 additions and 0 deletions
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arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
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@ -257,6 +257,9 @@ &pinctrl {
sci0_pins: sci0-pins {
pinmux = <RZT2H_PORT_PINMUX(27, 4, 0x14)>,
<RZT2H_PORT_PINMUX(27, 5, 0x14)>;
drive-strength-microamp = <9000>;
slew-rate = <1>;
input-schmitt-disable;
};
#if SD0_EMMC