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arm64: dts: renesas: rzt2h-n2h-evk: Configure ETH pins

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Update the gmac1 (ETH3) and gmac2 (ETH2) pin configurations on the
RZ/T2H and RZ/N2H EVK boards to comply with the electrical specifications
defined in Table 58.11 of the hardware user manual.

While restructuring the nodes into pin groups, fix a copy-paste comment
typo in the RZ/N2H device tree where the ETH3_TXD1 pin mux configuration
was mistakenly labeled as ETH3_TXD0.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260528134752.79813-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2026-05-28 14:47:51 +01:00 committed by Geert Uytterhoeven
parent c49ad13019
commit 1f90a38214
2 changed files with 191 additions and 68 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

130
arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts
View File

@ -258,23 +258,54 @@ can0_pins: can0-pins {
*
* SW2[8] ON - use pins P33_2-P33_7 and P34_0-P34_5 for Ethernet port 3
*/
gmac1_pins: gmac1-pins {
pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>, /* ETH3_TXCLK */
<RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */
<RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD1 */
<RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */
<RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */
<RZT2H_PORT_PINMUX(33, 7, 0xf)>, /* ETH3_TXEN */
<RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */
<RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */
<RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */
<RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */
<RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */
<RZT2H_PORT_PINMUX(34, 5, 0xf)>, /* ETH3_RXDV */
<RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */
<RZT2H_PORT_PINMUX(26, 2, 0x10)>, /* GMAC1_MDIO */
<RZT2H_PORT_PINMUX(34, 6, 0x2)>, /* ETH3_REFCLK */
<RZT2H_PORT_PINMUX(27, 2, 0x0)>; /* IRQ3 */
gmac1_pins: gmac1-group {
irq-pins {
pinmux = <RZT2H_PORT_PINMUX(27, 2, 0x0)>; /* IRQ3 */
drive-strength-microamp = <5000>;
slew-rate = <0>;
input-schmitt-disable;
};
md-pins {
pinmux = <RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */
<RZT2H_PORT_PINMUX(26, 2, 0x10)>; /* GMAC1_MDIO */
drive-strength-microamp = <5000>;
slew-rate = <0>;
input-schmitt-disable;
};
refclk-pins {
pinmux = <RZT2H_PORT_PINMUX(34, 6, 0x2)>; /* ETH3_REFCLK */
drive-strength-microamp = <5000>;
slew-rate = <1>;
};
rx-pins {
pinmux = <RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */
<RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */
<RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */
<RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */
<RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */
<RZT2H_PORT_PINMUX(34, 5, 0xf)>; /* ETH3_RXDV */
input-schmitt-disable;
};
txclk-pins {
pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>; /* ETH3_TXCLK */
drive-strength-microamp = <11800>;
slew-rate = <1>;
input-schmitt-disable;
};
txd-en-pins {
pinmux = <RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */
<RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD1 */
<RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */
<RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */
<RZT2H_PORT_PINMUX(33, 7, 0xf)>; /* ETH3_TXEN */
drive-strength-microamp = <11800>;
slew-rate = <1>;
};
};
/*
@ -283,23 +314,54 @@ gmac1_pins: gmac1-pins {
* SW2[6] OFF - connect MDC/MDIO of Ethernet port 2 to GMAC2
* SW2[7] ON - use pins P29_1-P29_7 and P30_0-P30_4 for Ethernet port 2
*/
gmac2_pins: gmac2-pins {
pinmux = <RZT2H_PORT_PINMUX(29, 1, 0xf)>, /* ETH2_TXCLK */
<RZT2H_PORT_PINMUX(29, 2, 0xf)>, /* ETH2_TXD0 */
<RZT2H_PORT_PINMUX(29, 3, 0xf)>, /* ETH2_TXD1 */
<RZT2H_PORT_PINMUX(29, 4, 0xf)>, /* ETH2_TXD2 */
<RZT2H_PORT_PINMUX(29, 5, 0xf)>, /* ETH2_TXD3 */
<RZT2H_PORT_PINMUX(29, 6, 0xf)>, /* ETH2_TXEN */
<RZT2H_PORT_PINMUX(29, 7, 0xf)>, /* ETH2_RXCLK */
<RZT2H_PORT_PINMUX(30, 0, 0xf)>, /* ETH2_RXD0 */
<RZT2H_PORT_PINMUX(30, 1, 0xf)>, /* ETH2_RXD1 */
<RZT2H_PORT_PINMUX(30, 2, 0xf)>, /* ETH2_RXD2 */
<RZT2H_PORT_PINMUX(30, 3, 0xf)>, /* ETH2_RXD3 */
<RZT2H_PORT_PINMUX(30, 4, 0xf)>, /* ETH2_RXDV */
<RZT2H_PORT_PINMUX(30, 5, 0x10)>, /* GMAC2_MDC */
<RZT2H_PORT_PINMUX(30, 6, 0x10)>, /* GMAC2_MDIO */
<RZT2H_PORT_PINMUX(31, 0, 0x2)>, /* ETH2_REFCLK */
<RZT2H_PORT_PINMUX(31, 1, 0x0)>; /* IRQ13 */
gmac2_pins: gmac2-group {
irq-pins {
pinmux = <RZT2H_PORT_PINMUX(31, 1, 0x0)>; /* IRQ13 */
drive-strength-microamp = <5000>;
slew-rate = <0>;
input-schmitt-disable;
};
md-pins {
pinmux = <RZT2H_PORT_PINMUX(30, 5, 0x10)>, /* GMAC2_MDC */
<RZT2H_PORT_PINMUX(30, 6, 0x10)>; /* GMAC2_MDIO */
drive-strength-microamp = <5000>;
slew-rate = <0>;
input-schmitt-disable;
};
refclk-pins {
pinmux = <RZT2H_PORT_PINMUX(31, 0, 0x2)>; /* ETH2_REFCLK */
drive-strength-microamp = <5000>;
slew-rate = <1>;
};
rx-pins {
pinmux = <RZT2H_PORT_PINMUX(29, 7, 0xf)>, /* ETH2_RXCLK */
<RZT2H_PORT_PINMUX(30, 0, 0xf)>, /* ETH2_RXD0 */
<RZT2H_PORT_PINMUX(30, 1, 0xf)>, /* ETH2_RXD1 */
<RZT2H_PORT_PINMUX(30, 2, 0xf)>, /* ETH2_RXD2 */
<RZT2H_PORT_PINMUX(30, 3, 0xf)>, /* ETH2_RXD3 */
<RZT2H_PORT_PINMUX(30, 4, 0xf)>; /* ETH2_RXDV */
input-schmitt-disable;
};
txclk-pins {
pinmux = <RZT2H_PORT_PINMUX(29, 1, 0xf)>; /* ETH2_TXCLK */
drive-strength-microamp = <11800>;
slew-rate = <1>;
input-schmitt-disable;
};
txd-en-pins {
pinmux = <RZT2H_PORT_PINMUX(29, 2, 0xf)>, /* ETH2_TXD0 */
<RZT2H_PORT_PINMUX(29, 3, 0xf)>, /* ETH2_TXD1 */
<RZT2H_PORT_PINMUX(29, 4, 0xf)>, /* ETH2_TXD2 */
<RZT2H_PORT_PINMUX(29, 5, 0xf)>, /* ETH2_TXD3 */
<RZT2H_PORT_PINMUX(29, 6, 0xf)>; /* ETH2_TXEN */
drive-strength-microamp = <11800>;
slew-rate = <1>;
};
};
/*

129
arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
View File

@ -341,23 +341,54 @@ can1_pins: can1-pins {
*
* DSW5[8] ON - use pins P33_2-P33_7 and P34_0-P34_6 for Ethernet port 3
*/
gmac1_pins: gmac1-pins {
pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>, /* ETH3_TXCLK */
<RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */
<RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD0 */
<RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */
<RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */
<RZT2H_PORT_PINMUX(33, 7, 0xf)>, /* ETH3_TXEN */
<RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */
<RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */
<RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */
<RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */
<RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */
<RZT2H_PORT_PINMUX(34, 5, 0xf)>, /* ETH3_RXDV */
<RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */
<RZT2H_PORT_PINMUX(26, 2, 0x10)>, /* GMAC1_MDIO */
<RZT2H_PORT_PINMUX(34, 6, 0x2)>, /* ETH3_REFCLK */
<RZT2H_PORT_PINMUX(17, 3, 0x0)>; /* IRQ15 */
gmac1_pins: gmac1-group {
irq-pins {
pinmux = <RZT2H_PORT_PINMUX(17, 3, 0x0)>; /* IRQ15 */
drive-strength-microamp = <5000>;
slew-rate = <0>;
input-schmitt-disable;
};
md-pins {
pinmux = <RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */
<RZT2H_PORT_PINMUX(26, 2, 0x10)>; /* GMAC1_MDIO */
drive-strength-microamp = <5000>;
slew-rate = <0>;
input-schmitt-disable;
};
refclk-pins {
pinmux = <RZT2H_PORT_PINMUX(34, 6, 0x2)>; /* ETH3_REFCLK */
drive-strength-microamp = <5000>;
slew-rate = <1>;
};
rx-pins {
pinmux = <RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */
<RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */
<RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */
<RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */
<RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */
<RZT2H_PORT_PINMUX(34, 5, 0xf)>; /* ETH3_RXDV */
input-schmitt-disable;
};
txclk-pins {
pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>; /* ETH3_TXCLK */
drive-strength-microamp = <11800>;
slew-rate = <1>;
input-schmitt-disable;
};
txd-en-pins {
pinmux = <RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */
<RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD1 */
<RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */
<RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */
<RZT2H_PORT_PINMUX(33, 7, 0xf)>; /* ETH3_TXEN */
drive-strength-microamp = <11800>;
slew-rate = <1>;
};
};
/*
@ -367,24 +398,54 @@ gmac1_pins: gmac1-pins {
* DSW5[7] ON - use pins P29_1-P29_7 and P30_0-P30_4 for Ethernet port 2
* DSW13[7] OFF; DSW13[8] ON - use pin P13_7 for IRQ14
*/
gmac2_pins: gmac2-pins {
pinmux = <RZT2H_PORT_PINMUX(29, 1, 0xf)>, /* ETH2_TXCLK */
<RZT2H_PORT_PINMUX(29, 2, 0xf)>, /* ETH2_TXD0 */
<RZT2H_PORT_PINMUX(29, 3, 0xf)>, /* ETH2_TXD1 */
<RZT2H_PORT_PINMUX(29, 4, 0xf)>, /* ETH2_TXD2 */
<RZT2H_PORT_PINMUX(29, 5, 0xf)>, /* ETH2_TXD3 */
<RZT2H_PORT_PINMUX(29, 6, 0xf)>, /* ETH2_TXEN */
<RZT2H_PORT_PINMUX(29, 7, 0xf)>, /* ETH2_RXCLK */
<RZT2H_PORT_PINMUX(30, 0, 0xf)>, /* ETH2_RXD0 */
<RZT2H_PORT_PINMUX(30, 1, 0xf)>, /* ETH2_RXD1 */
<RZT2H_PORT_PINMUX(30, 2, 0xf)>, /* ETH2_RXD2 */
<RZT2H_PORT_PINMUX(30, 3, 0xf)>, /* ETH2_RXD3 */
<RZT2H_PORT_PINMUX(30, 4, 0xf)>, /* ETH2_RXDV */
<RZT2H_PORT_PINMUX(30, 5, 0x10)>, /* GMAC2_MDC */
<RZT2H_PORT_PINMUX(30, 6, 0x10)>, /* GMAC2_MDIO */
<RZT2H_PORT_PINMUX(31, 0, 0x2)>, /* ETH2_REFCLK */
<RZT2H_PORT_PINMUX(13, 7, 0x0)>; /* IRQ14 */
gmac2_pins: gmac2-group {
irq-pins {
pinmux = <RZT2H_PORT_PINMUX(13, 7, 0x0)>; /* IRQ14 */
drive-strength-microamp = <5000>;
slew-rate = <0>;
input-schmitt-disable;
};
md-pins {
pinmux = <RZT2H_PORT_PINMUX(30, 5, 0x10)>, /* GMAC2_MDC */
<RZT2H_PORT_PINMUX(30, 6, 0x10)>; /* GMAC2_MDIO */
drive-strength-microamp = <5000>;
slew-rate = <0>;
input-schmitt-disable;
};
refclk-pins {
pinmux = <RZT2H_PORT_PINMUX(31, 0, 0x2)>; /* ETH2_REFCLK */
drive-strength-microamp = <5000>;
slew-rate = <1>;
};
rx-pins {
pinmux = <RZT2H_PORT_PINMUX(29, 7, 0xf)>, /* ETH2_RXCLK */
<RZT2H_PORT_PINMUX(30, 0, 0xf)>, /* ETH2_RXD0 */
<RZT2H_PORT_PINMUX(30, 1, 0xf)>, /* ETH2_RXD1 */
<RZT2H_PORT_PINMUX(30, 2, 0xf)>, /* ETH2_RXD2 */
<RZT2H_PORT_PINMUX(30, 3, 0xf)>, /* ETH2_RXD3 */
<RZT2H_PORT_PINMUX(30, 4, 0xf)>; /* ETH2_RXDV */
input-schmitt-disable;
};
txclk-pins {
pinmux = <RZT2H_PORT_PINMUX(29, 1, 0xf)>; /* ETH2_TXCLK */
drive-strength-microamp = <11800>;
slew-rate = <1>;
input-schmitt-disable;
};
txd-en-pins {
pinmux = <RZT2H_PORT_PINMUX(29, 2, 0xf)>, /* ETH2_TXD0 */
<RZT2H_PORT_PINMUX(29, 3, 0xf)>, /* ETH2_TXD1 */
<RZT2H_PORT_PINMUX(29, 4, 0xf)>, /* ETH2_TXD2 */
<RZT2H_PORT_PINMUX(29, 5, 0xf)>, /* ETH2_TXD3 */
<RZT2H_PORT_PINMUX(29, 6, 0xf)>; /* ETH2_TXEN */
drive-strength-microamp = <11800>;
slew-rate = <1>;
};
};
/*