From 1417a63d16ba5681fe137e546aaa9c5b2828c5d5 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Thu, 28 May 2026 14:47:52 +0100 Subject: [PATCH] arm64: dts: renesas: rzt2h-n2h-evk: Configure SCI0 pins Configure the drive strength, slew rate, and Schmitt trigger settings for the sci0 pin group shared by the RZ/T2H and RZ/N2H EVK boards. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20260528134752.79813-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi index e86e6d3aa8a3..ceccddb92d40 100644 --- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi +++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi @@ -257,6 +257,9 @@ &pinctrl { sci0_pins: sci0-pins { pinmux = , ; + drive-strength-microamp = <9000>; + slew-rate = <1>; + input-schmitt-disable; }; #if SD0_EMMC