linux/arch/riscv
Michael Neuling 5d588c6848 riscv: lib: Fix ZBB strnlen reading past count boundary
The ZBB-optimized strnlen loop loads one word ahead before checking the
aligned boundary:

    REG_L   t1, SZREG(t0)       // load next word
    addi    t0, t0, SZREG       // advance
    orc.b   t1, t1
    bgeu    t0, t4, 4f          // boundary check AFTER load

where t4 = (s + count) & -SZREG.  When s is aligned and count is a
multiple of SZREG, t4 equals s + count and the loop loads a full word
starting at exactly s + count.  If s + count falls on a page boundary
with the next page unmapped, this faults.

Fix by computing the aligned boundary from the last valid byte
(s + count - 1) instead of s + count.  This makes the loop stop at the
word containing the last valid byte rather than potentially loading the
word after it.  The count == 0 case is already handled by the beqz
early exit.

Also add a pre-loop guard (bgeu t0, t4) for the case where all valid
bytes fit within the first word.  With the adjusted boundary, t4 can
equal t0, and entering the loop with stale register state from the
first-word processing would produce incorrect results.

The final minu clamp ensures the result is still correct when the last
loaded word extends past s + count - 1 within the same aligned word.

Fixes: 5ba15d419f ("riscv: lib: add strnlen() implementation")
Signed-off-by: Michael Neuling <mikey@neuling.org>
Assisted-by: Claude Opus4.6 High Thinking
Link: https://patch.msgid.link/20260413010738.1622423-1-mikey@neuling.org
Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-08-08 11:45:33 -06:00
..
boot soc: devicetree updates for 7.2 2026-06-17 11:16:56 -07:00
configs riscv: defconfig: enable ARCH_ULTRARISC 2026-07-08 10:41:40 -06:00
crypto crypto: riscv/aes - replace min_t with min in riscv64_aes_ctr_crypt 2026-05-22 20:25:29 +08:00
errata riscv/sifive: remove warning in errata 2026-07-29 11:43:28 -06:00
include riscv: time: Add missing __iomem in get_cycles() and get_cycles_hi() 2026-07-29 11:43:28 -06:00
kernel riscv: hwprobe: Register unaligned probes before usermode 2026-08-07 17:36:22 -06:00
kvm KVM: riscv: Fix Spectre-v1 in vector register access 2026-07-15 18:06:16 +05:30
lib riscv: lib: Fix ZBB strnlen reading past count boundary 2026-08-08 11:45:33 -06:00
mm RISC-V updates for v7.2-rc6 2026-08-02 12:12:21 -07:00
net bpf: Restrict JIT predictor flush to cBPF 2026-07-01 10:33:38 +02:00
purgatory riscv/purgatory: add asm/purgatory.h 2026-06-06 20:17:52 -06:00
tools riscv: Stop considering R_RISCV_NONE as bad relocations 2025-07-16 08:13:55 -07:00
Kbuild riscv: migrate to the generic rule for built-in DTB 2025-03-18 13:30:13 +00:00
Kconfig riscv: Gate FUNCTION_ALIGNMENT_4B on DYNAMIC_FTRACE 2026-07-13 11:38:56 -06:00
Kconfig.debug riscv: Add tests for riscv module loading 2023-11-07 14:59:32 -08:00
Kconfig.errata riscv: ERRATA_STARFIVE_JH7100: Fix missing dependency on new CONFIG_CACHEMAINT_FOR_DMA 2026-01-15 18:13:04 -07:00
Kconfig.socs riscv: add UltraRISC SoC family Kconfig support 2026-07-08 10:39:49 -06:00
Kconfig.vendor riscv: Add xmipsexectl as a vendor extension 2025-09-18 20:36:00 -06:00
Makefile riscv: vdso: Only try to install vDSO when present 2026-07-29 17:55:17 -06:00
Makefile.postlink kbuild: Create intermediate vmlinux build with relocations preserved 2025-03-17 00:29:50 +09:00