linux/arch/x86/kernel/cpu/microcode
Linus Torvalds 97cc7dc16a - Move the zero-revision fixup for AMD microcode to the patch level
retrieval function and restrict it to Zen family processors, ensuring
   patch level arithmetic always operates on a valid revision
 
 - Fix an incorrect comment about which CPUID bit is checked when
   determining whether the microcode loader should be disabled
 
 - Add the latest Intel microcode revision data for a broad range of
   processor models and steppings and add the script which generates the
   header of minimum expected Intel microcode revisions
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmowMfYACgkQEsHwGGHe
 VUq4jRAAiUoRmAPSgxfw6fNzn+VcH2pxRa987HtZM/teJO9dec2fswhnOsOdx1Y+
 hbQ1uxPdgZzowg2CJL/Il+QNGjpVkA0SaVbnlamX5bRMuEKdWXXawf0eeV3EMmmh
 f+LaN/jQ3+vuE5boSOh1tVGQOTPyuyOg977leXSPlXxyTMyrVuLAN6+Zs/qsuhSY
 vWTKY40E+1ZeDHCXcNtOhxKXR7tGjgGrjqLMx0bbs8z1DOP2OJpILHdgPB9igghb
 hg5uUSj2LTd+28/H0HIu5RqfI7/ulQPBmLFYmw6ENLSR4U3GEtg0gItZEXL6E8Dz
 UZVMqorpAMV41cPyBvStfK6R8cvGEe6m+iidmsTQDVvQWX9xnSNX1N+HV6Xr+fjN
 kuPZLEGhkmDRe8mup+n5t/wqw4iDFrfqhgPGgFN2fwDFcs9oJfAHTgMvpdvWGG/2
 hbME8PGWFv+N3Piy4GqROuVjcm0cbTTzdzWmWEZ8qO3OakSDC9vex5061/O5DmFB
 vI7QHanc3Xe3vuf20Jnbc8LFkw54zHBSITrguah0yJFsVqE4tktSsy3NIHLxdP87
 7e4oCzmP7oelCgxzvKyZiHzNtzrngGT9L0Nowcg9y/iibWzOkW8F9Ek5NqMaUyo4
 JEKXizudArM6oZUtk+E6CAhGotL1en/FhfBmungtaExA2BnCJtc=
 =KarZ
 -----END PGP SIGNATURE-----

Merge tag 'x86_microcode_for_v7.2_rc1' of gitolite.kernel.org:pub/scm/linux/kernel/git/tip/tip

Pull x86 microcode loader updates from Borislav Petkov:

 - Move the zero-revision fixup for AMD microcode to the patch level
   retrieval function and restrict it to Zen family processors, ensuring
   patch level arithmetic always operates on a valid revision

 - Fix an incorrect comment about which CPUID bit is checked when
   determining whether the microcode loader should be disabled

 - Add the latest Intel microcode revision data for a broad range of
   processor models and steppings and add the script which generates the
   header of minimum expected Intel microcode revisions

* tag 'x86_microcode_for_v7.2_rc1' of gitolite.kernel.org:pub/scm/linux/kernel/git/tip/tip:
  x86/microcode/AMD: Move the no-revision fixup to get_patch_level()
  x86/microcode: Fix comment in microcode_loader_disabled()
  scripts/x86/intel: Add a script to update the old microcode list
  x86/microcode/intel: Refresh old_microcode defines with Nov 2025 release
2026-06-16 05:45:36 +05:30
..
amd_shas.c x86/microcode/AMD: Add TSA microcode SHAs 2025-06-17 17:17:12 +02:00
amd.c - Move the zero-revision fixup for AMD microcode to the patch level 2026-06-16 05:45:36 +05:30
core.c - Move the zero-revision fixup for AMD microcode to the patch level 2026-06-16 05:45:36 +05:30
intel-ucode-defs.h x86/microcode/intel: Refresh old_microcode defines with Nov 2025 release 2026-04-29 15:53:19 -07:00
intel.c x86/cpu updates for v7.2: 2026-06-15 15:25:17 +05:30
internal.h x86/microcode: Do not access MSR_IA32_PLATFORM_ID when running as a guest 2026-05-26 13:36:23 -07:00
Makefile x86/microcode: Hide the config knob 2023-08-13 10:26:39 +02:00