linux/arch/x86/kernel/cpu
Linus Torvalds 97cc7dc16a - Move the zero-revision fixup for AMD microcode to the patch level
retrieval function and restrict it to Zen family processors, ensuring
   patch level arithmetic always operates on a valid revision
 
 - Fix an incorrect comment about which CPUID bit is checked when
   determining whether the microcode loader should be disabled
 
 - Add the latest Intel microcode revision data for a broad range of
   processor models and steppings and add the script which generates the
   header of minimum expected Intel microcode revisions
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmowMfYACgkQEsHwGGHe
 VUq4jRAAiUoRmAPSgxfw6fNzn+VcH2pxRa987HtZM/teJO9dec2fswhnOsOdx1Y+
 hbQ1uxPdgZzowg2CJL/Il+QNGjpVkA0SaVbnlamX5bRMuEKdWXXawf0eeV3EMmmh
 f+LaN/jQ3+vuE5boSOh1tVGQOTPyuyOg977leXSPlXxyTMyrVuLAN6+Zs/qsuhSY
 vWTKY40E+1ZeDHCXcNtOhxKXR7tGjgGrjqLMx0bbs8z1DOP2OJpILHdgPB9igghb
 hg5uUSj2LTd+28/H0HIu5RqfI7/ulQPBmLFYmw6ENLSR4U3GEtg0gItZEXL6E8Dz
 UZVMqorpAMV41cPyBvStfK6R8cvGEe6m+iidmsTQDVvQWX9xnSNX1N+HV6Xr+fjN
 kuPZLEGhkmDRe8mup+n5t/wqw4iDFrfqhgPGgFN2fwDFcs9oJfAHTgMvpdvWGG/2
 hbME8PGWFv+N3Piy4GqROuVjcm0cbTTzdzWmWEZ8qO3OakSDC9vex5061/O5DmFB
 vI7QHanc3Xe3vuf20Jnbc8LFkw54zHBSITrguah0yJFsVqE4tktSsy3NIHLxdP87
 7e4oCzmP7oelCgxzvKyZiHzNtzrngGT9L0Nowcg9y/iibWzOkW8F9Ek5NqMaUyo4
 JEKXizudArM6oZUtk+E6CAhGotL1en/FhfBmungtaExA2BnCJtc=
 =KarZ
 -----END PGP SIGNATURE-----

Merge tag 'x86_microcode_for_v7.2_rc1' of gitolite.kernel.org:pub/scm/linux/kernel/git/tip/tip

Pull x86 microcode loader updates from Borislav Petkov:

 - Move the zero-revision fixup for AMD microcode to the patch level
   retrieval function and restrict it to Zen family processors, ensuring
   patch level arithmetic always operates on a valid revision

 - Fix an incorrect comment about which CPUID bit is checked when
   determining whether the microcode loader should be disabled

 - Add the latest Intel microcode revision data for a broad range of
   processor models and steppings and add the script which generates the
   header of minimum expected Intel microcode revisions

* tag 'x86_microcode_for_v7.2_rc1' of gitolite.kernel.org:pub/scm/linux/kernel/git/tip/tip:
  x86/microcode/AMD: Move the no-revision fixup to get_patch_level()
  x86/microcode: Fix comment in microcode_loader_disabled()
  scripts/x86/intel: Add a script to update the old microcode list
  x86/microcode/intel: Refresh old_microcode defines with Nov 2025 release
2026-06-16 05:45:36 +05:30
..
mce x86/cpu updates for v7.2: 2026-06-15 15:25:17 +05:30
microcode - Move the zero-revision fixup for AMD microcode to the patch level 2026-06-16 05:45:36 +05:30
mtrr x86/mtrr: Use kstrtoul() in parse_mtrr_spare_reg() 2026-03-02 17:25:31 +01:00
resctrl Preparatory work for MPAM counter assignment: 2026-06-16 05:35:40 +05:30
sgx treewide: Explicitly include the x86 CPUID headers 2026-05-06 14:29:59 +02:00
.gitignore .gitignore: add SPDX License Identifier 2020-03-25 11:50:48 +01:00
acrn.c x86/irq: Make irqstats array based 2026-05-26 16:21:12 +02:00
amd_cache_disable.c Convert 'alloc_obj' family to use the new default GFP_KERNEL argument 2026-02-21 17:09:51 -08:00
amd.c x86/cpu updates for v7.2: 2026-06-15 15:25:17 +05:30
aperfmperf.c syscore: Pass context data to callbacks 2025-11-14 10:01:52 +01:00
bhyve.c x86/cpu: Detect FreeBSD Bhyve hypervisor 2025-09-15 14:06:44 +02:00
bugs.c x86/paravirt: Remove not needed includes of paravirt.h 2026-01-12 11:26:52 +01:00
bus_lock.c x86/split_lock: Don't warn about unknown split_lock_detect parameter 2026-04-05 23:12:40 +02:00
cacheinfo.c x86/cpu/cacheinfo: Simplify cacheinfo_amd_init_llc_id() using _cpuid4_info 2025-09-17 11:22:40 +02:00
centaur.c treewide: Explicitly include the x86 CPUID headers 2026-05-06 14:29:59 +02:00
common.c x86/cpuid: Introduce a centralized CPUID parser 2026-05-11 16:05:50 +02:00
cpu.h x86/cpu: Remove obsolete aperfmperf_get_khz() declaration 2026-06-05 15:10:25 +02:00
cpuid_0x2_table.c x86/cpu: Consolidate CPUID leaf 0x2 tables 2025-03-25 10:23:04 +01:00
cpuid_parser.c x86/cpuid: Introduce a centralized CPUID parser 2026-05-11 16:05:50 +02:00
cpuid_parser.h x86/cpuid: Introduce a centralized CPUID parser 2026-05-11 16:05:50 +02:00
cpuid-deps.c x86/mm: Disable broadcast TLB flush when PCID is disabled 2026-05-20 14:15:07 -07:00
cyrix.c x86/cpu: Drop vestigial PBE logic in AMD/Hygon/Centaur/Cyrix 2025-12-14 09:57:13 +01:00
debugfs.c x86/cpu: Prefix hexadecimal values with 0x in cpu_debug_show() 2025-02-27 13:26:53 +01:00
feat_ctl.c x86/msr: Add explicit includes of <asm/msr.h> 2025-05-02 10:23:47 +02:00
hygon.c treewide: Explicitly include the x86 CPUID headers 2026-05-06 14:29:59 +02:00
hypervisor.c x86/cpu: Detect FreeBSD Bhyve hypervisor 2025-09-15 14:06:44 +02:00
intel_epb.c syscore: Pass context data to callbacks 2025-11-14 10:01:52 +01:00
intel.c x86/cpu: Fix a F00F bug warning and clean up surrounding code 2026-05-28 18:41:32 -07:00
Makefile x86/cpuid: Introduce a centralized CPUID parser 2026-05-11 16:05:50 +02:00
match.c x86/cpu: Add platform ID to CPU matching structure 2026-03-05 12:25:38 -08:00
mkcapflags.sh x86/cpufeatures: Flip the /proc/cpuinfo appearance logic 2024-06-20 21:04:22 +02:00
mshyperv.c x86/cpu updates for v7.2: 2026-06-15 15:25:17 +05:30
perfctr-watchdog.c x86/nmi_watchdog: Fix old-style NMI watchdog regression on old Intel CPUs 2021-06-10 10:04:40 +02:00
powerflags.c
proc.c cpufreq: Allow arch_freq_get_on_cpu to return an error 2025-02-17 18:09:20 +00:00
rdrand.c x86/msr: Prepare for including <linux/percpu.h> into <asm/msr.h> 2024-03-04 12:01:39 +01:00
scattered.c treewide: Explicitly include the x86 CPUID headers 2026-05-06 14:29:59 +02:00
topology_amd.c x86/cpuid: Rename cpuid_leaf()/cpuid_subleaf() APIs 2026-05-08 23:10:14 +02:00
topology_common.c treewide: Explicitly include the x86 CPUID headers 2026-05-06 14:29:59 +02:00
topology_ext.c x86/cpuid: Rename cpuid_leaf()/cpuid_subleaf() APIs 2026-05-08 23:10:14 +02:00
topology.c x86/topology: use bitmap_weight_from() 2026-03-23 13:33:51 -04:00
topology.h x86/cpu/topology: Retrieve cores per package from topology bitmaps 2024-02-15 22:07:45 +01:00
transmeta.c treewide: Explicitly include the x86 CPUID headers 2026-05-06 14:29:59 +02:00
tsx.c x86/tsx: Get the tsx= command line parameter with early_param() 2025-10-24 18:35:17 +02:00
umwait.c syscore: Pass context data to callbacks 2025-11-14 10:01:52 +01:00
vmware.c treewide: Explicitly include the x86 CPUID headers 2026-05-06 14:29:59 +02:00
vortex.c x86/CPU: Add support for Vortex CPUs 2021-10-21 15:49:07 +02:00
zhaoxin.c treewide: Explicitly include the x86 CPUID headers 2026-05-06 14:29:59 +02:00