linux/rust/kernel/pci
Zhi Wang d4ffc4896b rust: pci: add extended capability and SR-IOV support
Rust PCI drivers have no typed interface for locating and accessing PCIe
extended capabilities.

The SR-IOV extended capability describes VF topology and VF BARs. Expose
this information through the Rust PCI abstraction so drivers can use the
existing typed configuration-space accessors instead of raw bindings.

Define ExtCapability to associate a capability ID with a register layout,
and add ConfigSpace::find_ext_capability() to locate and project that
layout. Bound the view at the next capability or the end of extended
configuration space. Add ExtSriovRegs and a decoded VF BAR iterator that
reads and validates all six VF BAR register slots up front, yields decoded
BAR addresses and widths in logical order, and keeps the raw
configuration-space slot advancement internal. Since PCI_EXT_CAP_NEXT() is
a function-like macro, expose it through a Rust helper.

Keep raw SR-IOV registers private because PCI core owns their state. Expose
the current First VF Offset through a read-only accessor because the Nova
GSP ABI needs the raw 16-bit First VF Offset in Routing ID space. The
pci_iov_virtfn_devfn() helper instead returns the low eight bits of a
calculated VF Routing ID.

Cc: Alexandre Courbot <acourbot@nvidia.com>
Cc: Gary Guo <gary@garyguo.net>
Cc: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Zhi Wang <zhiw@nvidia.com>
Link: https://patch.msgid.link/20260906060404.3336193-2-zhiw@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-10-13 01:12:58 +02:00
..
cap.rs rust: pci: add extended capability and SR-IOV support 2026-10-13 01:12:58 +02:00
id.rs rust: device: make Core and CoreInternal lifetime-parameterized 2026-05-27 16:22:42 +02:00
io.rs I/O type generalization and projection 2026-07-13 23:50:39 +02:00
irq.rs rust: pci: reject IRQ vector indices that do not fit in u32 2026-09-01 18:21:01 +02:00