Judith Mendez b0ea517535 dt-bindings: hwinfo: ti,k3-socinfo: Add nvmem-cells support ... Add optional nvmem-cells and nvmem-cell-names properties to support reading silicon revision information from alternate location using NVMEM providers. This is used on AM62P to read GP_SW1 register for accurate silicon revision detection. Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260209172330.53623-2-jm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>		2026-05-05 06:06:02 -05:00
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loongson,ls2k-chipid.yaml	dt-bindings: soc: add loongson-2 chipid	2022-11-14 16:02:10 +01:00
renesas,prr.yaml
samsung,exynos-chipid.yaml	dt-bindings: hwinfo: samsung,exynos-chipid: add exynos8890-chipid compatible	2025-10-18 18:14:35 +02:00
samsung,s5pv210-chipid.yaml
ti,k3-socinfo.yaml	dt-bindings: hwinfo: ti,k3-socinfo: Add nvmem-cells support	2026-05-05 06:06:02 -05:00
via,vt8500-scc-id.yaml	dt-bindings: hwinfo: Add VIA/WonderMedia SoC identification	2025-05-04 19:23:29 +02:00