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Hardware version from efuse prioritizes to the version from register. For WiFi 7 chips, this becomes required, so implement this in common flow. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20251229030926.27004-7-pkshih@realtek.com
37 lines
1.2 KiB
C
37 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/* Copyright(c) 2019-2020 Realtek Corporation
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*/
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#ifndef __RTW89_EFUSE_H__
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#define __RTW89_EFUSE_H__
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#include "core.h"
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#define RTW89_EFUSE_BLOCK_ID_MASK GENMASK(31, 16)
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#define RTW89_EFUSE_BLOCK_SIZE_MASK GENMASK(15, 0)
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#define RTW89_EFUSE_MAX_BLOCK_SIZE 0x10000
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#define EF_FV_OFSET 0x5EA
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#define EF_FV_OFSET_BE_V1 0x17CA
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#define EF_CV_MASK GENMASK(7, 4)
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#define EF_CV_INV 15
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struct rtw89_efuse_block_cfg {
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u32 offset;
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u32 size;
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};
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int rtw89_parse_efuse_map_ax(struct rtw89_dev *rtwdev);
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int rtw89_parse_phycap_map_ax(struct rtw89_dev *rtwdev);
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int rtw89_cnv_efuse_state_ax(struct rtw89_dev *rtwdev, bool idle);
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int rtw89_parse_efuse_map_be(struct rtw89_dev *rtwdev);
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int rtw89_parse_phycap_map_be(struct rtw89_dev *rtwdev);
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int rtw89_cnv_efuse_state_be(struct rtw89_dev *rtwdev, bool idle);
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int rtw89_read_efuse_ver(struct rtw89_dev *rtwdev, u8 *efv);
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int rtw89_efuse_recognize_mss_info_v1(struct rtw89_dev *rtwdev, u8 b1, u8 b2);
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int rtw89_efuse_read_fw_secure_ax(struct rtw89_dev *rtwdev);
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int rtw89_efuse_read_fw_secure_be(struct rtw89_dev *rtwdev);
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int rtw89_efuse_read_ecv_be(struct rtw89_dev *rtwdev);
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#endif
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