wifi: rtw89: efuse: read hardware version from efuse for WiFi 7 chips

Hardware version from efuse prioritizes to the version from register.
For WiFi 7 chips, this becomes required, so implement this in common flow.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20251229030926.27004-7-pkshih@realtek.com
This commit is contained in:
Ping-Ke Shih 2025-12-29 11:09:20 +08:00
parent 040af1ac80
commit 9e389ad5d1
6 changed files with 48 additions and 5 deletions

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@ -7,10 +7,6 @@
#include "mac.h"
#include "reg.h"
#define EF_FV_OFSET 0x5ea
#define EF_CV_MASK GENMASK(7, 4)
#define EF_CV_INV 15
#define EFUSE_B1_MSSDEVTYPE_MASK GENMASK(3, 0)
#define EFUSE_B1_MSSCUSTIDX0_MASK GENMASK(7, 4)
#define EFUSE_B2_MSSKEYNUM_MASK GENMASK(3, 0)

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@ -11,6 +11,11 @@
#define RTW89_EFUSE_BLOCK_SIZE_MASK GENMASK(15, 0)
#define RTW89_EFUSE_MAX_BLOCK_SIZE 0x10000
#define EF_FV_OFSET 0x5EA
#define EF_FV_OFSET_BE_V1 0x17CA
#define EF_CV_MASK GENMASK(7, 4)
#define EF_CV_INV 15
struct rtw89_efuse_block_cfg {
u32 offset;
u32 size;
@ -26,5 +31,6 @@ int rtw89_read_efuse_ver(struct rtw89_dev *rtwdev, u8 *efv);
int rtw89_efuse_recognize_mss_info_v1(struct rtw89_dev *rtwdev, u8 b1, u8 b2);
int rtw89_efuse_read_fw_secure_ax(struct rtw89_dev *rtwdev);
int rtw89_efuse_read_fw_secure_be(struct rtw89_dev *rtwdev);
int rtw89_efuse_read_ecv_be(struct rtw89_dev *rtwdev);
#endif

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@ -512,3 +512,29 @@ int rtw89_efuse_read_fw_secure_be(struct rtw89_dev *rtwdev)
return 0;
}
int rtw89_efuse_read_ecv_be(struct rtw89_dev *rtwdev)
{
u32 dump_addr;
u8 buff[4]; /* efuse access must 4 bytes align */
int ret;
u8 ecv;
u8 val;
dump_addr = ALIGN_DOWN(EF_FV_OFSET_BE_V1, 4);
ret = rtw89_dump_physical_efuse_map_be(rtwdev, buff, dump_addr, 4, false);
if (ret)
return ret;
val = buff[EF_FV_OFSET_BE_V1 & 0x3];
ecv = u8_get_bits(val, EF_CV_MASK);
if (ecv == EF_CV_INV)
return -ENOENT;
rtwdev->hal.cv = ecv;
return 0;
}
EXPORT_SYMBOL(rtw89_efuse_read_ecv_be);

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@ -1529,8 +1529,10 @@ static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on)
return ret;
if (on) {
if (!test_bit(RTW89_FLAG_PROBE_DONE, rtwdev->flags))
if (!test_bit(RTW89_FLAG_PROBE_DONE, rtwdev->flags)) {
rtw89_mac_efuse_read_ecv(rtwdev);
mac->efuse_read_fw_secure(rtwdev);
}
set_bit(RTW89_FLAG_POWERON, rtwdev->flags);
set_bit(RTW89_FLAG_DMAC_FUNC, rtwdev->flags);
@ -7281,6 +7283,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
.parse_phycap_map = rtw89_parse_phycap_map_ax,
.cnv_efuse_state = rtw89_cnv_efuse_state_ax,
.efuse_read_fw_secure = rtw89_efuse_read_fw_secure_ax,
.efuse_read_ecv = NULL,
.cfg_plt = rtw89_mac_cfg_plt_ax,
.get_plt_cnt = rtw89_mac_get_plt_cnt_ax,

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@ -1067,6 +1067,7 @@ struct rtw89_mac_gen_def {
int (*parse_phycap_map)(struct rtw89_dev *rtwdev);
int (*cnv_efuse_state)(struct rtw89_dev *rtwdev, bool idle);
int (*efuse_read_fw_secure)(struct rtw89_dev *rtwdev);
int (*efuse_read_ecv)(struct rtw89_dev *rtwdev);
int (*cfg_plt)(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt);
u16 (*get_plt_cnt)(struct rtw89_dev *rtwdev, u8 band);
@ -1602,6 +1603,16 @@ int rtw89_mac_get_dle_rsvd_qt_cfg(struct rtw89_dev *rtwdev,
struct rtw89_mac_dle_rsvd_qt_cfg *cfg);
int rtw89_mac_cpu_io_rx(struct rtw89_dev *rtwdev, bool wow_enable);
static inline int rtw89_mac_efuse_read_ecv(struct rtw89_dev *rtwdev)
{
const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
if (!mac->efuse_read_ecv)
return -ENOENT;
return mac->efuse_read_ecv(rtwdev);
}
static inline
void rtw89_fwdl_secure_idmem_share_mode(struct rtw89_dev *rtwdev, u8 mode)
{

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@ -2774,6 +2774,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
.parse_phycap_map = rtw89_parse_phycap_map_be,
.cnv_efuse_state = rtw89_cnv_efuse_state_be,
.efuse_read_fw_secure = rtw89_efuse_read_fw_secure_be,
.efuse_read_ecv = rtw89_efuse_read_ecv_be,
.cfg_plt = rtw89_mac_cfg_plt_be,
.get_plt_cnt = rtw89_mac_get_plt_cnt_be,