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wifi: rtw89: define TX/RX aggregation and MPDU capability per chip
Since TX/RX aggregation is different from chip to chip, define individual number according to hardware ability. Also the coming chip RTL8922DE can get expected performance. Signed-off-by: Kuan-Chung Chen <damon.chen@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20251229030926.27004-6-pkshih@realtek.com
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@ -5086,7 +5086,7 @@ static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev,
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}
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vht_cap->vht_supported = true;
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vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
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vht_cap->cap = chip->max_vht_mpdu_cap |
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IEEE80211_VHT_CAP_SHORT_GI_80 |
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IEEE80211_VHT_CAP_RXSTBC_1 |
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IEEE80211_VHT_CAP_HTC_VHT |
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@ -5214,7 +5214,7 @@ static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
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IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
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le16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
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IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
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le16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
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le16_encode_bits(chip->max_vht_mpdu_cap,
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IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
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iftype_data->he_6ghz_capa.capa = capa;
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}
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@ -5252,7 +5252,7 @@ static void rtw89_init_eht_cap(struct rtw89_dev *rtwdev,
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eht_cap->has_eht = true;
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eht_cap_elem->mac_cap_info[0] =
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u8_encode_bits(IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_7991,
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u8_encode_bits(chip->max_eht_mpdu_cap,
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IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_MASK);
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eht_cap_elem->mac_cap_info[1] = 0;
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@ -6399,8 +6399,8 @@ static int rtw89_core_register_hw(struct rtw89_dev *rtwdev)
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hw->extra_tx_headroom = tx_headroom;
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hw->queues = IEEE80211_NUM_ACS;
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hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM;
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hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM;
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hw->max_rx_aggregation_subframes = chip->max_rx_agg_num;
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hw->max_tx_aggregation_subframes = chip->max_tx_agg_num;
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hw->uapsd_max_sp_len = IEEE80211_WMM_IE_STA_QOSINFO_SP_ALL;
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hw->radiotap_mcs_details |= IEEE80211_RADIOTAP_MCS_HAVE_FEC |
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@ -3407,9 +3407,6 @@ struct rtw89_ra_info {
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#define RTW89_PPDU_MAC_RX_CNT_SIZE 96
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#define RTW89_PPDU_MAC_RX_CNT_SIZE_V1 128
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#define RTW89_MAX_RX_AGG_NUM 64
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#define RTW89_MAX_TX_AGG_NUM 128
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struct rtw89_ampdu_params {
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u16 agg_num;
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bool amsdu;
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@ -4429,6 +4426,10 @@ struct rtw89_chip_info {
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bool small_fifo_size;
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u32 dle_scc_rsvd_size;
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u16 max_amsdu_limit;
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u16 max_vht_mpdu_cap;
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u16 max_eht_mpdu_cap;
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u16 max_tx_agg_num;
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u16 max_rx_agg_num;
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bool dis_2g_40m_ul_ofdma;
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u32 rsvd_ple_ofst;
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const struct rtw89_hfc_param_ini *hfc_param_ini[RTW89_HCI_TYPE_NUM];
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@ -2591,6 +2591,10 @@ const struct rtw89_chip_info rtw8851b_chip_info = {
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.small_fifo_size = true,
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.dle_scc_rsvd_size = 98304,
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.max_amsdu_limit = 3500,
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.max_vht_mpdu_cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
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.max_eht_mpdu_cap = 0,
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.max_tx_agg_num = 128,
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.max_rx_agg_num = 64,
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.dis_2g_40m_ul_ofdma = true,
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.rsvd_ple_ofst = 0x2f800,
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.hfc_param_ini = {rtw8851b_hfc_param_ini_pcie,
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@ -2276,6 +2276,10 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
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.small_fifo_size = false,
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.dle_scc_rsvd_size = 0,
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.max_amsdu_limit = 3500,
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.max_vht_mpdu_cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
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.max_eht_mpdu_cap = 0,
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.max_tx_agg_num = 128,
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.max_rx_agg_num = 64,
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.dis_2g_40m_ul_ofdma = true,
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.rsvd_ple_ofst = 0x6f800,
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.hfc_param_ini = {rtw8852a_hfc_param_ini_pcie,
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@ -900,6 +900,10 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
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.small_fifo_size = true,
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.dle_scc_rsvd_size = 98304,
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.max_amsdu_limit = 5000,
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.max_vht_mpdu_cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
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.max_eht_mpdu_cap = 0,
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.max_tx_agg_num = 128,
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.max_rx_agg_num = 64,
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.dis_2g_40m_ul_ofdma = true,
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.rsvd_ple_ofst = 0x2f800,
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.hfc_param_ini = {rtw8852b_hfc_param_ini_pcie,
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@ -766,6 +766,10 @@ const struct rtw89_chip_info rtw8852bt_chip_info = {
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.small_fifo_size = true,
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.dle_scc_rsvd_size = 98304,
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.max_amsdu_limit = 5000,
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.max_vht_mpdu_cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
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.max_eht_mpdu_cap = 0,
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.max_tx_agg_num = 128,
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.max_rx_agg_num = 64,
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.dis_2g_40m_ul_ofdma = true,
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.rsvd_ple_ofst = 0x6f800,
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.hfc_param_ini = {rtw8852bt_hfc_param_ini_pcie, NULL, NULL},
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@ -3117,6 +3117,10 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
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.small_fifo_size = false,
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.dle_scc_rsvd_size = 0,
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.max_amsdu_limit = 8000,
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.max_vht_mpdu_cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
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.max_eht_mpdu_cap = 0,
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.max_tx_agg_num = 128,
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.max_rx_agg_num = 64,
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.dis_2g_40m_ul_ofdma = false,
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.rsvd_ple_ofst = 0x6f800,
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.hfc_param_ini = {rtw8852c_hfc_param_ini_pcie,
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@ -2890,6 +2890,10 @@ const struct rtw89_chip_info rtw8922a_chip_info = {
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.small_fifo_size = false,
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.dle_scc_rsvd_size = 0,
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.max_amsdu_limit = 8000,
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.max_vht_mpdu_cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
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.max_eht_mpdu_cap = IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_7991,
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.max_tx_agg_num = 128,
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.max_rx_agg_num = 64,
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.dis_2g_40m_ul_ofdma = false,
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.rsvd_ple_ofst = 0x8f800,
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.hfc_param_ini = {rtw8922a_hfc_param_ini_pcie, NULL, NULL},
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