linux/drivers/clk/hisilicon
Stephen Boyd df822f2e36
Merge tag 'clk-misc-round-two-for-v7.3' of ssh://github.com/masneyb/linux into clk-pile
Pull clk patches from Brian Masney:

 - New clock controller drivers for the Cix Sky1 audio subsystem (AUDSS),
   UltraRISC DP1000, and MediaTek MT8173 MFG_TOP, along with their devicetree
   bindings. Si549 support was added to the existing si544 driver.
 - New clock and reset support for the Aspeed AST2700 PECI controller and Airoha
   EN7523 PCIe PERSTOUT reset lines.
 - The clk core gains devm_clk_bulk_get_enable() as the mandatory counterpart to
   the existing optional variant, and exports
   devm_clk_hw_register_composite_pdata() for modular drivers.
 - Tegra gets a proper EMC clock implementation for Tegra114, 48MHz pll_p_out1
   support needed for UEFI on Surface2, and the Xilinx clocking-wizard gains PLL
   charge pump/lock parameter programming during dynamic reconfiguration.
 - Bug fixes for a NULL pointer dereference from uninitialized clk_init_data in
   the eswin driver, an IO remap leak in the MediaTek pllfh error path, inverted
   gate control for MT8135 devapc_ck, a missing OF node put in tegra124-emc on
   registration failure, a prepare reference leak in the palmas driver,
   unregistered PLLs on MT6735 probe failure, a missing kasprintf NULL check in
   pmc_atom, PCIe warm boot instability in the Airoha EN7523 driver, and a
   clocking-wizard clock difference detection bug.
 - Various cleanups across tegra, st, and mvebu providers to stop misusing the
   consumer clock API, along with other minor fixes and improvements.

Signed-off-by: Brian Masney <bmasney@redhat.com>

* tag 'clk-misc-round-two-for-v7.3' of ssh://github.com/masneyb/linux: (45 commits)
  clk: tegra: set up proper EMC clock implementation for Tegra114
  clk: clocking-wizard: remove 20kHz restriction
  clk: clocking-wizard: optimize clock search
  clk: clocking-wizard: fix clock difference detection
  clk: mediatek: mt8135: Fix inverted gate control for devapc_ck
  clk: clocking-wizard: Program PLL CP/RES and lock parameters on reconfig
  clk: tegra: support 48MHz clock for pll_p_out1
  clk: aspeed: add AST2700 PECI clock
  dt-bindings: clock: ast2700: add PECI clock
  clk: mediatek: Add mt8173-mfgtop driver
  dt-bindings: clock: mediatek: Add mt8173 mfgtop
  clk: tegra: clean-up simple provider misuse of the consumer API
  clk: st: clean-up simple provider misuse of the consumer API
  clk: mvebu: clean-up simple provider misuse of the consumer API
  clk: remove conditional return with no effect
  clk: Add devm_clk_bulk_get_enable()
  clk: en7523: add support for dedicated PCIe PERSTOUT reset
  dt-bindings: clock: airoha: Add additional reset for PCIe PERSTOUT
  arm64: dts: cix: sky1: add audss cru
  reset: cix: add sky1 audss auxiliary reset driver
  ...
2026-08-17 09:28:08 -07:00
..
clk-hi3519.c clk: Switch back to struct platform_driver::remove() 2024-09-21 14:12:05 -07:00
clk-hi3559a.c clk: Switch back to struct platform_driver::remove() 2024-09-21 14:12:05 -07:00
clk-hi3620.c Convert 'alloc_obj' family to use the new default GFP_KERNEL argument 2026-02-21 17:09:51 -08:00
clk-hi3660-stub.c Merge tag 'clk-misc-round-two-for-v7.3' of ssh://github.com/masneyb/linux into clk-pile 2026-08-17 09:28:08 -07:00
clk-hi3660.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
clk-hi3670.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
clk-hi6220-stub.c clk: hisilicon: hi6220-stub: convert from round_rate() to determine_rate() 2025-09-08 09:41:27 -04:00
clk-hi6220.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
clk-hip04.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
clk-hisi-phase.c clk: core: replace clk_{readl,writel} with {readl,writel} 2019-04-23 10:57:49 -07:00
clk-hix5hd2.c Convert 'alloc_obj' family to use the new default GFP_KERNEL argument 2026-02-21 17:09:51 -08:00
clk.c clk: hisilicon: Improve deallocation in error path 2026-04-28 20:52:43 -07:00
clk.h clk: hisilicon: Add clock driver for hi3559A SoC 2021-06-27 20:14:24 -07:00
clkdivider-hi6220.c clk: hisilicon: clkdivider-hi6220: use kzalloc_flex 2026-04-28 18:43:15 -07:00
clkgate-separated.c Convert 'alloc_obj' family to use the new default GFP_KERNEL argument 2026-02-21 17:09:51 -08:00
crg-hi3516cv300.c clk: Switch back to struct platform_driver::remove() 2024-09-21 14:12:05 -07:00
crg-hi3798cv200.c clk: Switch back to struct platform_driver::remove() 2024-09-21 14:12:05 -07:00
crg.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
Kconfig clk: hisilicon: allow COMPILE_TEST builds 2026-06-29 16:50:18 -04:00
Makefile clk: hisilicon: Add clock driver for hi3559A SoC 2021-06-27 20:14:24 -07:00
reset.c clk: hisilicon: reset: Use devm_kzalloc to initialize hisi_reset_controller 2026-06-29 15:56:44 -04:00
reset.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13 2019-05-21 11:28:45 +02:00