linux/arch/arm64/boot/dts/apple/s8003.dtsi
Nick Chan 1fd51c7303 arm64: dts: apple: Add cpufreq nodes for S8000/S8003
Add cpufreq nodes for the two variants of Apple A9 SoC. The difference is
that S8000 is slower than S8003 in state transitions.

Change the copyright information in s8000.dtsi and s8003.dtsi as well
since these are now essentially new files with the original content now
being in s800-0-3.dtsi.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
2025-02-09 11:49:40 +00:00

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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple S8003 "A9" (TSMC) SoC
*
* Other names: H8P, "Malta"
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
#include "s800-0-3.dtsi"
/ {
twister_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <500>;
};
opp02 {
opp-hz = /bits/ 64 <396000000>;
opp-level = <2>;
clock-latency-ns = <45000>;
};
opp03 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <3>;
clock-latency-ns = <22000>;
};
opp04 {
opp-hz = /bits/ 64 <912000000>;
opp-level = <4>;
clock-latency-ns = <25000>;
};
opp05 {
opp-hz = /bits/ 64 <1200000000>;
opp-level = <5>;
clock-latency-ns = <28000>;
};
opp06 {
opp-hz = /bits/ 64 <1512000000>;
opp-level = <6>;
clock-latency-ns = <35000>;
};
opp07 {
opp-hz = /bits/ 64 <1800000000>;
opp-level = <7>;
clock-latency-ns = <38000>;
};
#if 0
/* Not available until CPU deep sleep is implemented */
opp08 {
opp-hz = /bits/ 64 <1844000000>;
opp-level = <8>;
clock-latency-ns = <38000>;
turbo-mode;
};
#endif
};
};
/*
* The A9 was made by two separate fabs on two different process
* nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made
* the S8003 (APL1022) on 16nm. There are some minor differences
* such as timing in cpufreq state transistions.
*/