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arm64: dts: apple: Add cpufreq nodes for S8000/S8003

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Add cpufreq nodes for the two variants of Apple A9 SoC. The difference is
that S8000 is slower than S8003 in state transitions.

Change the copyright information in s8000.dtsi and s8003.dtsi as well
since these are now essentially new files with the original content now
being in s800-0-3.dtsi.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
This commit is contained in:
Nick Chan 2025-02-03 20:43:43 +08:00 committed by Sven Peter
parent 1b57d5bc62
commit 1fd51c7303
3 changed files with 114 additions and 2 deletions
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10
arch/arm64/boot/dts/apple/s800-0-3.dtsi
View File

@ -32,6 +32,8 @@ cpu0: cpu@0 {
compatible = "apple,twister";
reg = <0x0 0x0>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
operating-points-v2 = <&twister_opp>;
performance-domains = <&cpufreq>;
enable-method = "spin-table";
device_type = "cpu";
};
@ -40,6 +42,8 @@ cpu1: cpu@1 {
compatible = "apple,twister";
reg = <0x0 0x1>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
operating-points-v2 = <&twister_opp>;
performance-domains = <&cpufreq>;
enable-method = "spin-table";
device_type = "cpu";
};
@ -52,6 +56,12 @@ soc {
nonposted-mmio;
ranges;
cpufreq: performance-controller@202220000 {
compatible = "apple,s8000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
reg = <0x2 0x02220000 0 0x1000>;
#performance-domain-cells = <0>;
};
serial0: serial@20a0c0000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x0a0c0000 0x0 0x4000>;

53
arch/arm64/boot/dts/apple/s8000.dtsi
View File

@ -4,11 +4,62 @@
*
* Other names: H8P, "Maui"
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
#include "s800-0-3.dtsi"
/ {
twister_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <650>;
};
opp02 {
opp-hz = /bits/ 64 <396000000>;
opp-level = <2>;
clock-latency-ns = <75000>;
};
opp03 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <3>;
clock-latency-ns = <27000>;
};
opp04 {
opp-hz = /bits/ 64 <912000000>;
opp-level = <4>;
clock-latency-ns = <32000>;
};
opp05 {
opp-hz = /bits/ 64 <1200000000>;
opp-level = <5>;
clock-latency-ns = <35000>;
};
opp06 {
opp-hz = /bits/ 64 <1512000000>;
opp-level = <6>;
clock-latency-ns = <45000>;
};
opp07 {
opp-hz = /bits/ 64 <1800000000>;
opp-level = <7>;
clock-latency-ns = <58000>;
};
#if 0
/* Not available until CPU deep sleep is implemented */
opp08 {
opp-hz = /bits/ 64 <1844000000>;
opp-level = <8>;
clock-latency-ns = <58000>;
turbo-mode;
};
#endif
};
};
/*
* The A9 was made by two separate fabs on two different process
* nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made

53
arch/arm64/boot/dts/apple/s8003.dtsi
View File

@ -4,11 +4,62 @@
*
* Other names: H8P, "Malta"
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
#include "s800-0-3.dtsi"
/ {
twister_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <500>;
};
opp02 {
opp-hz = /bits/ 64 <396000000>;
opp-level = <2>;
clock-latency-ns = <45000>;
};
opp03 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <3>;
clock-latency-ns = <22000>;
};
opp04 {
opp-hz = /bits/ 64 <912000000>;
opp-level = <4>;
clock-latency-ns = <25000>;
};
opp05 {
opp-hz = /bits/ 64 <1200000000>;
opp-level = <5>;
clock-latency-ns = <28000>;
};
opp06 {
opp-hz = /bits/ 64 <1512000000>;
opp-level = <6>;
clock-latency-ns = <35000>;
};
opp07 {
opp-hz = /bits/ 64 <1800000000>;
opp-level = <7>;
clock-latency-ns = <38000>;
};
#if 0
/* Not available until CPU deep sleep is implemented */
opp08 {
opp-hz = /bits/ 64 <1844000000>;
opp-level = <8>;
clock-latency-ns = <38000>;
turbo-mode;
};
#endif
};
};
/*
* The A9 was made by two separate fabs on two different process
* nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made